SCLS527A − AUGUST 2003 − REVISED APRIL 2008
D Qualified for Automotive Applications
D ESD Protection Exceeds 1000 V Per
D
DW OR PW PACKAGE
(TOP VIEW)
MIL-STD-883, Method 3015; Exceeds 100 V
Using Machine Model (C = 200 pF, R = 0)
Operating Range 2-V to 5.5-V VCC
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
description/ordering information
The SN74AHC245 octal bus transceiver is designed
for asynchronous two-way communication between
data buses. The control-function implementation
minimizes external timing requirements.
This device allows data transmission from the A bus
to the B bus or from the B bus to the A bus, depending
on the logic level at the direction-control (DIR) input.
The output-enable (OE) input can be used to disable
the device so that the buses effectively are isolated.
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION{
−40°C to 125°C
ORDERABLE
PART NUMBER
PACKAGE‡
TA
TOP-SIDE
MARKING
SOIC − DW
Tape and reel
SN74AHC245QDWRQ1
AHC245Q1
TSSOP − PW
Tape and reel
SN74AHC245QPWRQ1
AHC245Q1
† For the most current package and ordering information, see the Package Option Addendum at the end of
this document, or see the TI web site at http://www.ti.com.
‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION TABLE
(each transceiver)
INPUTS
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2008, Texas Instruments Incorporated
!" # $%&" !# '%()$!" *!"&+
*%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"#
#"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*&
"&#"0 !)) '!!&"&#+
POST OFFICE BOX 655303
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1
SCLS527A − AUGUST 2003 − REVISED APRIL 2008
logic diagram (positive logic)
DIR
1
19
A1
OE
2
18
B1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1): Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I/O, output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0): Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
I/O, output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA
Package thermal impedance, θJA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
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• DALLAS, TEXAS 75265
SCLS527A − AUGUST 2003 − REVISED APRIL 2008
recommended operating conditions (see Note 3)
VCC
VIH
Supply voltage
VCC = 2 V
VCC = 3 V
High-level input voltage
VI
VO
IOH
MAX
2
5.5
2.1
∆t/∆v
V
0.5
0.9
V
1.65
Input voltage
OE or DIR
0
5.5
V
Output voltage
A or B
0
VCC
−50
mA
High-level output current
VCC = 2 V
VCC = 3.3 V ± 0.3 V
Low-level output current
Input transition rise or fall rate
V
−4
VCC = 5 V ± 0.5 V
VCC = 2 V
IOL
V
3.85
VCC = 3 V
VCC = 5.5 V
Low-level input voltage
UNIT
1.5
VCC = 5.5 V
VCC = 2 V
VIL
MIN
−8
50
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
4
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
100
8
20
mA
mA
mA
ns/V
TA
Operating free-air temperature
−40
125
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = −50 mA
VOH
IOH = −4 mA
IOH = −8 mA
IOL = 50 mA
VOL
IOL = 4 mA
IOL = 8 mA
A or B inputs
II
OE or DIR
VI = 5.5 V or GND
IOZ†
VO = VCC or GND,
VI (OE) = VIL or VIH
ICC
VI = VCC or GND,
Ci
OE or DIR
IO = 0
VI = VCC or GND
Cio
A or B inputs
VI = VCC or GND
† The parameter IOZ includes the input leakage current.
POST OFFICE BOX 655303
VCC
MIN
TA = 25°C
TYP
MAX
MIN
2V
1.9
2
1.9
2.9
3V
2.9
3
4.5 V
4.4
4.5
3V
2.58
4.5 V
3.94
MAX
4.4
UNIT
V
2.48
3.8
2V
0.1
0.1
3V
0.1
0.1
4.5 V
0.1
0.1
3V
0.36
0.5
4.5 V
0.36
0.5
5.5 V
±0.1
±1
0 V to 5.5 V
±0.1
±1
5.5 V
±0.25
±2.5
mA
5.5 V
4
40
mA
5V
2.5
5V
4
• DALLAS, TEXAS 75265
10
V
mA
A
pF
pF
3
SCLS527A − AUGUST 2003 − REVISED APRIL 2008
switching characteristics over recommended operating
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
A or B
B or A
CL = 15 pF
tPZH
tPZL
OE
A or B
CL = 15 pF
tPHZ
tPLZ
OE
A or B
CL = 15 pF
tPLH
tPHL
A or B
B or A
CL = 50 pF
tPZH
tPZL
OE
A or B
CL = 50 pF
tPHZ
tPLZ
OE
A or B
CL = 50 pF
MIN
switching characteristics over recommended operating
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
A or B
B or A
CL = 15 pF
tPZH
tPZL
OE
A or B
CL = 15 pF
tPHZ
tPLZ
OE
A or B
CL = 15 pF
tPLH
tPHL
A or B
B or A
CL = 50 pF
tPZH
tPZL
OE
A or B
CL = 50 pF
tPHZ
tPLZ
OE
A or B
CL = 50 pF
free-air
temperature
TA = 25°C
TYP
MAX
MIN
MAX
5.8
8.4
1
10
5.8
8.4
1
10
8.5
13.2
1
15.5
8.5
13.2
1
15.5
8.9
12.5
1
15.5
8.9
12.5
1
15.5
8.3
11.9
1
13.5
8.3
11.9
1
13.5
11
16.7
1
19
11
16.7
1
19
11.5
15.8
1
18
11.5
15.8
1
18
free-air
temperature
TA = 25°C
MIN
TYP
MAX
MIN
MAX
4
5.5
1
6.5
4
5.5
1
6.5
5.8
8.5
1
10
5.8
8.5
1
10
5.6
7.8
1
9.2
5.6
7.8
1
9.2
5.5
7.5
1
8.5
5.5
7.5
1
8.5
7.3
10.6
1
12
7.3
10.6
1
12
7
9.7
1
11
7
9.7
1
11
MIN
TYP
MAX
range,
UNIT
ns
ns
ns
ns
ns
ns
range,
UNIT
ns
ns
ns
ns
ns
ns
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4)
PARAMETER
UNIT
VOL(P)
VOL(V)
Quiet output, maximum dynamic VOL
0.9
V
Quiet output, minimum dynamic VOL
−0.9
V
VOH(V)
VIH(D)
Quiet output, minimum dynamic VOH
4.3
V
High-level dynamic input voltage
3.5
VIL(D)
Low-level dynamic input voltage
NOTE 4: Characteristics are for surface-mount packages only.
V
1.5
V
TYP
UNIT
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
4
TEST CONDITIONS
Power dissipation capacitance
No load,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
f = 1 MHz
14
pF
SCLS527A − AUGUST 2003 − REVISED APRIL 2008
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
RL = 1 kΩ
From Output
Under Test
Test
Point
S1
VCC
Open
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
VCC
50% VCC
Timing Input
tw
tsu
VCC
Input
50% VCC
50% VCC
0V
th
VCC
50% VCC
Data Input
50% VCC
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
50% VCC
Input
50% VCC
0V
tPLH
In-Phase
Output
tPHL
50% VCC
tPHL
Out-of-Phase
Output
VOH
50% VCC
VOL
Output
Waveform 1
S1 at VCC
(see Note B)
50% VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
50% VCC
50% VCC
0V
tPZL
tPLZ
≈VCC
50% VCC
tPZH
tPLH
VOH
50% VCC
VOL
VCC
Output
Control
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.3 V
VOL
tPHZ
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
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5
PACKAGE OPTION ADDENDUM
www.ti.com
17-Aug-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
TBD
Lead/
Ball Finish
Call TI
MSL Peak Temp
(3)
Samples
(Requires Login)
SN74AHC245QDWRQ1
ACTIVE
SOIC
DW
20
Call TI
SN74AHC245QPWRG4Q1
ACTIVE
TSSOP
PW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SN74AHC245QPWRQ1
ACTIVE
TSSOP
PW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74AHC245-Q1 :
• Catalog: SN74AHC245
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
17-Aug-2012
• Enhanced Product: SN74AHC245-EP
• Military: SN54AHC245
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
• Military - QML certified for Military and Defense Applications
Addendum-Page 2
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