SCLS596A − NOVEMBER 2004 − REVISED APRIL 2008
D
D
D
D
D
Qualified for Automotive Applications
Operating Range 2-V to 5.5-V VCC
Unbuffered Outputs
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
D OR PW PACKAGE
(TOP VIEW)
1A
1Y
2A
2Y
3A
3Y
GND
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
6A
6Y
5A
5Y
4A
4Y
description/ordering information
The SN74AHCU04 device contains six independent inverters. This device performs the Boolean function Y = A.
Internal circuitry consists of single-stage inverters that can be used in analog applications such as crystal
oscillators.
ORDERING INFORMATION{
ORDERABLE
PART NUMBER
PACKAGE‡
TA
SOIC − D
Tape and reel
SN74AHCU04QDRQ1
TOP-SIDE
MARKING
AHCU04Q
−40°C to 125°C
TSSOP − PW
Tape and reel
SN74AHCU04QPWRQ1
AHCU04Q
† For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at http://www.ti.com.
‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
logic diagram (positive logic)
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2008, Texas Instruments Incorporated
!" #!$% &"'
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&& *+' &! #", &" ""%+ %!&"
", %% #""'
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1
SCLS596A − NOVEMBER 2004 − REVISED APRIL 2008
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
VCC
VIH
VIL
VI
VO
IOH
Supply voltage
High-level input voltage
MAX
2
5.5
VCC = 2 V
VCC = 3 V
1.7
VCC = 5.5 V
VCC = 2 V
4.4
2.4
Low-level input voltage
Input voltage
Output voltage
VCC = 2 V
VCC = 3.3 V ± 0.3 V
High-level output current
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
Low-level output current
UNIT
V
V
0.3
VCC = 3 V
VCC = 5.5 V
VCC = 5 V ± 0.5 V
VCC = 2 V
IOL
MIN
0.6
V
1.1
0
5.5
V
0
VCC
−50
mA
V
−4
−8
50
mA
mA
4
8
mA
TA
Operating free-air temperature
−40
125
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
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• DALLAS, TEXAS 75265
SCLS596A − NOVEMBER 2004 − REVISED APRIL 2008
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = −50 mA
MAX
MIN
MAX
TA = −40°C
TO 85°C
MIN
TYP
2V
1.8
2
1.8
1.8
3V
2.7
3
2.7
2.7
4
4.5
4
4
4.5 V
VOH
TA = −40°C
TO 125°C
TA = 25°C
VCC
MIN
IOH = −4 mA
3V
2.58
2.3
2.4
IOH = −8 mA
4.5 V
3.94
3.5
3.65
IOL = 50 mA
UNIT
MAX
V
2V
0.2
0.2
0.2
3V
0.3
0.3
0.3
4.5 V
0.5
0.5
0.5
IOL = 4 mA
3V
0.36
0.5
0.44
IOL = 8 mA
4.5 V
0.36
0.5
0.44
0 V to 5.5 V
±0.1
±1
±1
mA
2
20
20
mA
10
pF
VOL
II
ICC
VI = 5.5 V or GND
VI = VCC or GND,
Ci
VI = VCC or GND
IO = 0
5.5 V
5V
2
10
V
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
A
Y
CL = 15 pF
tPLH
tPHL
A
Y
CL = 50 pF
PARAMETER
TA = −40°C
TO 125°C
TA = 25°C
MIN
TA = −40°C
TO 85°C
UNIT
TYP
MAX
MIN
MAX
MIN
MAX
5
7.1
1
10.5
1
8.5
5
7.1
1
10.5
1
8.5
7.5
10.6
1
14
1
12
7.5
10.6
1
14
1
12
ns
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
A
Y
CL = 15 pF
tPLH
tPHL
A
Y
CL = 50 pF
PARAMETER
POST OFFICE BOX 655303
TA = −40°C
TO 125°C
TA = 25°C
MIN
TA = −40°C
TO 85°C
UNIT
TYP
MAX
MIN
MAX
MIN
MAX
3.5
5.5
1
8.5
1
6.5
3.5
5.5
1
8.5
1
6.5
5
7
1
11
1
9
5
7
1
11
1
9
• DALLAS, TEXAS 75265
ns
ns
3
SCLS596A − NOVEMBER 2004 − REVISED APRIL 2008
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4)
PARAMETER
MIN
TYP
MAX
UNIT
VOL(P)
VOL(V)
Quiet output, maximum dynamic VOL
0.5
V
Quiet output, minimum dynamic VOL
−0.5
V
VOH(V)
VIH(D)
Quiet output, minimum dynamic VOH
4.3
V
High-level dynamic input voltage
4
VIL(D)
Low-level dynamic input voltage
NOTE 4: Characteristics are for surface-mount packages only.
V
1
V
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
4
TEST CONDITIONS
Power dissipation capacitance
No load,
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f = 1 MHz
TYP
UNIT
7.3
pF
SCLS596A − NOVEMBER 2004 − REVISED APRIL 2008
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
RL = 1 kΩ
From Output
Under Test
Test
Point
S1
VCC
Open
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
VCC
50% VCC
Timing Input
tw
tsu
VCC
Input
50% VCC
50% VCC
0V
th
VCC
50% VCC
Data Input
50% VCC
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
50% VCC
Input
50% VCC
0V
tPLH
In-Phase
Output
tPHL
50% VCC
tPHL
Out-of-Phase
Output
VOH
50% VCC
VOL
Output
Waveform 1
S1 at VCC
(see Note B)
50% VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
50% VCC
50% VCC
0V
tPZL
tPLZ
≈VCC
50% VCC
tPZH
tPLH
VOH
50% VCC
VOL
VCC
Output
Control
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.3 V
VOL
tPHZ
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time, with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
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5
PACKAGE OPTION ADDENDUM
www.ti.com
29-Dec-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74AHCU04QPWRG4Q1
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHCU04QPWRQ1
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74AHCU04-Q1 :
SN74AHCU04
• Catalog:
Product: SN74AHCU04-EP
• Enhanced
• Military: SN54AHCU04
NOTE: Qualified Version Definitions:
- TI's standard catalog product
• Catalog
Product - Supports Defense, Aerospace and Medical Applications
• Enhanced
• Military - QML certified for Military and Defense Applications
Addendum-Page 1
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