CYSTEKEC PL384XAP8

CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 1/15
High Performance Current Mode PWM Controllers
PL384XAP8
Description
The PL384XAP8 family of control ICs provides the necessary features to implement off-line or DC to DC fixed
frequency current mode control schemes with a minimal external parts count. Internally implemented circuits
include a trimmed oscillator for precise duty cycle control, under voltage lockout featuring start-up current less than
1.0mA, a precision reference trimmed for accuracy at the error amp input, logic to insure latched operation, a PWM
comparator which also provides current limit control, and a totem pole output stage designed to source or sink high
peak current. The output stage, suitable for driving N-channel MOSFETs, is low in the off-state.
Differences between members of this family are the under-voltage lockout thresholds and maximum duty cycle
ranges. The PL3842A and PL3844A have UVLO thresholds of 16V (on) and 10V (off), ideally suited off-line
applications. The corresponding thresholds for the PL3843A and PL3845A are 8.5V and 7.9V. The PL3842A and
PL3843A can operate to duty cycles approaching 100%. A range of the zero to <50% is obtained by the PL3844A
and PL3845A by the addition of an internal toggle flip flop which blanks the output off every other clock cycle.
Features
• Trimmed oscillator for precise frequency control
• Oscillator frequency guaranteed at 250 kHz
• Current mode operation to 500kHz
• Automatic feed forward compensation
• Latching PWM for cycle-by-cycle current limiting
• Internally trimmed reference with undervoltage lockout
• High current totem pole output
• Undervoltage lockout with hysteresis
• Low start-up and operating current
Block Diagram( toggle flip flop used only in PL3844A and PL3845A)
VI
7
UVLO
34V
GROUND
8
5V
REF
S/R
5
INTERNAL
BIAS
2.50V
VREF GOOD
LOGIC
6
4
RT/CT
2
S
2R
R
COMP
CURRENT
SENSE
PL384XAP8
1
3
OUTPUT
T
OSC
ERROR AMP.
VFB
VREF
5V50mA
1V
R
PWM
LATCH
CURRENT
SENSE
COMPARATOR
PL3842A
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 2/15
Absolute Maximum Ratings
Symbol
VI
VI
IO
EO
Ptot
Tstg
TJ
TL
Parameter
Supply Voltage (low impedance source)
Supply Voltage (Ii<30mA)
Output Current
Output Energy (capacitive load)
Analog Inputs (pins 2, 3)
Error Amplifier Output Sink Current
Power Dissipation at Tamb≤ 25℃
Storage Temperature Range
Junction Operating Temperature
Lead Temperature (soldering 10s)
Value
30
Self Limiting
± 1
5
-0.3 to 5.5
10
1.25
-65 to +150
-40 to +150
300
Unit
V
A
µJ
V
mA
W
℃
℃
℃
Note : All voltages are with respect to pin 5, all currents are positive into the specified terminal.
Pin Connection (top view)
COMP
VREF
VFB
VCC
ISENSE
RT/CT
OUTPUT
GROUND
Pin Functions
No Function
1 COMP
2
VFB
3
ISENSE
4
RT/CT
5
6
GROUND
OUTPUT
7
8
VCC
VREF
Description
This pin is the Error Amplifier output and is made available for loop compensation.
This is the inverting input of the Error Amplifier. It is normally connected to the switching
power supply output through a resistor divider.
A voltage proportional to inductor current is connected to this input. The PWM uses this
information to terminate the output switch conduction.
The oscillator frequency and maximum output duty cycle are programmed by connecting
resistor RT to VREF and capacitor CT to ground. Operation to 500kHz is possible.
This pin is the combined control circuitry and power ground.
This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced
and sunk by this pin.
This pin is the positive supply of the control IC.
This is the reference output. It provides charging current for capacitor CT through resistor RT.
Thermal Data
Symbol
Rth, j-amb
PL384XAP8
Description
Thermal Resistance, junction to ambient
Value
100
Unit
℃/W
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 3/15
Electrical Characteristics (〔note 1〕Unless otherwise stated, these specifications apply for
0≤Tamb≤70℃,Vi=15V(note 5),RT=10k,CT=3.3nF)
Parameter
Test Conditions
Symbol
Min. Typ. Max.
Unit
Tj=25℃,IO=1mA
12V ≤ VI≤ 25V
1mA ≤ IO ≤ 20mA
(Note 2)
Line, Load, Temperature
10Hz ≤ f ≤10kHz,Tj=25℃ (note 2)
Tamb=125℃, 1000 Hrs (note 2)
VREF
∆VREF
∆VREF
∆VREF / ∆T
4.9
5.0
5.1
2
20
3
25
0.2
4.82
5.18
50
5
25
-30 -100 -180
V
mV
mV
mV/℃
V
µV
mV
mA
Reference Section
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Output Short Circuit
Oscillator Section
Frequency
Frequency Change with Volt
Frequency Change with Temp
Oscillator Voltage Swing
Discharge Current (Vosc=2V)
Error Amp Section
Input Voltage
Input Bias Current
AVOL
Unity Gain Bandwidth
Power Supply Rejec. Ratio
Output Sink Current
Output Source Current
VOUT High
VOUT Low
Current Sense Section
Gain
Maximum Input Signal
Supply Voltage Rejection
Input Bias Current
Delay to Output
eN
ISC
Tj=25℃
TA= 0 to 70 ℃
Tj=25℃(RT=6.2k,CT=1nF)
VCC=12V to 25V
TA= 0 to 70 ℃
Peak to peak
TJ=25℃
TA= 0 to 70 ℃
VPIN 1=2.5V
VFB=5V
2V ≤ Vo ≤ 4V
TJ = 25℃
VI = 12V to 25V
VPIN 2 = 2.7V, VPIN 1 = 1.1V
VPIN 2 = 2.3V, VPIN 1 = 5V
VPIN 2 = 2.3V, RL = 15kΩ to ground
VPIN 2 = 2.7V, RL = 15kΩ to Pin 8
fosc
∆fosc/∆V
∆fosc/∆T
Vosc
Idischg
V2
Ib
BW
PSRR
IO
IO
49
48
2257.8
7.6
52
250
0.2
0.5
1.6
8.3
-
55
56
275
1.0
1.0
8.8
8.8
kHz
kHz
kHz
%
%
V
mA
mA
2.42
65
0.7
60
2
-0.5
5
-
2.50 2.58
-0.1 -2
90
1
70
12
-1
6.2
0.8 1.1
V
µA
dB
MHz
dB
mA
mA
V
V
3 3.15
1
1.1
70
-2
-10
150 300
V/V
V
dB
µA
ns
(note 3 & 4)
VPIN 1 = 5V (note 3)
12V ≤ VI ≤ 25V
GV
V3
SVR
Ib
2.85
0.9
-
ISINK = 20mA
ISINK = 200mA
ISOURCE = 20mA
ISOURCE = 200mA
VCC = 6V, ISINK = 1mA
Tj=25℃, CL=1nF (note 2)
Tj=25℃, CL=1nF (note 2)
VOL
13
12
-
Output Section
Output Low Level
Output High Level
UVLO Saturation
Rise Time
Fall Time
PL384XAP8
VOH
VOLS
tr
tf
0.1
1.6
13.5
13.5
0.1
50
50
0.4
2.2
1.1
150
150
V
V
V
V
V
ns
ns
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 4/15
Electrical Characteristics (continued)
Parameter
Test Conditions
Symbol
Min. Typ. Max.
Unit
Undervoltage Lockout Section
Start Threshold
PL3842A/PL3844A
14.5
16
17.5
V
PL3843A/PL3845A
PL3842A/PL3844A
PL3843A/PL3845A
7.8
8.5
7.0
8.4
10
7.6
9.0
11.5
8.2
V
PL3842A/PL3843A
94
96
100
%
PL3844A/PL3845A
47
48
50
%
-
-
0
%
-
0.17
0.3
mA
-
0.17
0.3
mA
-
12
17
mA
30
38
-
V
Min Operating Voltage
After Turn-on
V
PWM Section
Maximum Duty Cycle
Minimum Duty Cycle
Total Standby Current
Start-up Current
VI=6.5V for PL3843A/45A
Ist
VI=14V for PL3842A/44A
Operating Supply Current
VPIN 2 = VPIN 3 = 0V
II
Zener Voltage
II = 25 mA
VIZ
Notes: 1. Max. package power dissipation limits must be respected; low duty cycle pulse techniques are used during test
maintain Tj as close to Tamb as possible.
2.These parameters, although guaranteed, are not 100% tested in production.
3.Parameter measured at trip point of latch with VPIN 2= 0 .
4.Gain defined as:
A=
∆VPIN 1
∆VPIN 3
, 0 ≤ VPIN 3 ≤ 0.8V
5. Adjust VI above the start threshold before setting at 15V.
PL384XAP8
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 5/15
Figure 1: Open Loop Test Circuit
VREF
RT
4.7k
2N2222
A
VREF
100k
ERROR AMP.
ADJUST
COMP
VFB
1
0.1uF
8
7
2
VI
1k
0.1uF
ISENSE
ADJUST
4.7k
ISENSE
3
6
4
5
1W
1k
OUTPUT
OUTPUT
5k
RT/CT
VI
GROUND
CT
GROUND
High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass
capacitors should be connected close to pin 5 in a single point ground. The transistor and 5kΩ potentiometer are
used to sample the oscillator waveform and apply an adjustable ramp to pin 3.
Figure 3:Output Dead-Time vs Oscillator Frequency
Figure 2:Timing Resistor vs Oscillator Frequency
100
100
CT=100pF
CT=2nF
500pF
10
Output Dead Time---(%)
Timing Resistor---RT(kΩ)
200pF
10nF
5nF
2nF
1nF
10
CT=1nF
CT=500p
F
CT=200pF
10
CT=100pF
1
100
Oscillator Frequency---fosc(kHz)
PL384XAP8
CT=5nF
Vi=15V
TA=25
Vi=15V,TA=25
℃
1
CT=10nF
1000
10
100
1000
Oscillator Frequency---fosc(kHz)
CYStek Product Specification
CYStech Electronics Corp.
Figure 4:Oscillator Discharge Current vs Temperature
Figure 5:Maximum Output Duty Cycle vs Timing
Resistor
100
Vi=15V
VOSC=2V
8.5
Maximum Duty Cycle---Dmax(%)
Discharge Current---Idischg(mA)
9
8
7.5
7
90
80
Idischg=7.5mA
70
Idischg=8.8m
A
60
Vi=15V
CT=3.3nF
TA=25℃
50
40
-50
-25
0
25
50
75
100
125
0.1
1
Ambient Temperature---TA(℃)
10
Timing Resistor---RT(kΩ)
Figure 6:Error Amp Open-Loop Gain vs Frequency
Figure 7:Error Amp Phase vs Frequency
180
100
Vi=15V,Vo=2 to 4V
RL=100l,TA=25℃
80
Vi=15V,Vo=2 to
4V
RL=100k,TA=25
150
60
120
Phase---(deg)
Gain---(dB)
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 6/15
40
20
90
60
0
30
-20
10
100
1000
0
10000 100000 100000 1E+07
0
10
Frequency---f(Hz)
Figure 8:Current Sense Input Threshold vs Error Amp
Output Voltage
110
Vi=15V
1
Short Circuit Current---ISC(mA)
Threshold Voltage---Vth(V)
1000 10000 100000 100000 1E+07
Frequency---f(Hz)
0
Figure 9:Reference Short Circuit Current vs Temperature
1.2
TA=125℃
0.8
0.6
TA=25℃
0.4
TA=-40℃
0.2
0
0
2
4
6
Error Amp Output Voltage---Vo(V)
PL384XAP8
100
8
Vi=15V
RL≦0.1Ω
100
90
80
70
60
50
-50
-25
0
25
50
75
100
125
Ambient Temperature---TA(℃)
CYStek Product Specification
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 7/15
CYStech Electronics Corp.
Figure 10.Oscillator and Output Waveforms
Vi
7
CT
8
5V REG
PWM
RT
6
OUTPUT
OUTPUT
CLOCK
4
LARGE RT/SMALL CT
OSCILLATOR
ID
CT
CT
OUTPUT
5
SMALL RT/LARGE CT
GND
Figure 11:Error Amp Configuration
2.5V
1mA
VFB
Zi
Zf
PL384XAP8
COMP
2
1
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 8/15
Figure 12:Under Voltage Lockout
Figure 13:Current Sense Circuit
ERROR
AMP
2R
R
Is
COMP
R
1
1V
CURRENT
SENSE
COMPARATOR
3
CURRENT
SENSE
Rs
C
5
GND
Peak Current (is) is determined by the formula
IS max ≈1.0V/Rs
A small RC filter may be required to suppress switch transients.
PL384XAP8
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 9/15
Figure 14:Slope Compensation Techniques.
VREG
Is
VREG
8
RT
RT
RT/CT
Is
4
RT/CT
CT
Rslope
R1
8
4
CT
ISENSE
Rslope
3
R1
5
Rs
GND
ISENSE
3
5
GND
Rs
Figure 15:Isolated MOSFET Drive and Current Transformer Sensing
Vin
VCC
7
ISOLATION
BOUNDARY
5.0Vref
VGS Waveforms
Q1
0
0
6
50% DC
S
R
Ipk
Q
25% DC
V(pin 1)-1.4
3Rs
Ns
Np
COMP/LATCH
R
3
C
PL384XAP8
Rs
Ns
Np
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 10/15
Figure 16:Latched Shutdown
4
OSC
8
R
BIAS
R
1mA
2R
2
EA
R
1
5
2N
3905
2N
3903
SCR must be selected for a holding current of less than 0.5mA at TA(min).
The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10K.
Figure 17:External Clock Synchronization
8
R
BIAS
R
RT
4
OSC
+
CT
EXTERNAL
SYNC INPUT
0.01μF
2R
47Ω
2
R
1
5
The diode clamp is required if the Sync amplitude is large enough to cause
the bottom side of CT to go more than 300mV below ground.
PL384XAP8
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 11/15
Figure 18: Error Amplifier Compensation
+
From Vo
2.5V
1mA
Ri
Rd
2R
Cf
2
Rf
EA
R
1
5
Error Amp compensation circuit for stabilizing any current -mode topology except
for boost and flyback converters operating with continuous inductor current.
+
From Vo
Rp
Cp
2.5V
1mA
Ri
Rd
Cf
2
Rf
EA
2R
R
1
5
Error Amp compensation circuit for stabilizing current--mode boost and flyback
PL384XAP8
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 12/15
Figure 19:External Duty Cycle Clamp and Multi Unit Synchronization
PL384XAP8
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 13/15
Figure 20:Soft-Start Circuit
5Vref
8
R
BIAS
R
4
OSC
+
1mA
2
1MΩ
S
2R
EA
Q
R
R
1V
1
C
PL384XAP8
5
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 14/15
Figure 21:Soft-Start and Error Amplifier Output Duty Cycle Clamp.
Vcc
Vin
7
5Vref
8
R
BIAS
7
R
4
Q1
6
OSC
+
5
1mA
Vclamp
2
S
2R
Q
R
EA
R
R2
1V
Comp/Latch
3
1
5
C
BC109
Rs
R1
VCLAMP =
PL384XAP8
- R1
R 1+ R 2
where 0< VCLAMP <1V
I pk(max) =
VCLAMP
Rs
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C510P8-A
Issued Date : 2003.08.12
Revised Date :
Page No. : 15/15
DIP-8P Dimension
Marking :
5
6
7
8
A
2
1
3
4
384XA
B
J
F
E
C
I
α1 K
G
DIP-8P Plastic Package
CYStek Package Code : P8
M
D H
L
*:Typical
Inches
Min.
Max.
0.2480 0.2520
0.3630 0.3670
*0.0600
*0.0500
*0.0390
0.1280 0.1320
0.1250 0.1400
DIM
A
B
C
D
E
F
G
Millimeters
Min.
Max.
6.29
6.40
9.22
9.32
*1.52
*1.27
*0.99
3.25
3.35
3.17
3.55
DIM
H
I
J
K
L
M
α1
Inches
Min.
Max.
0.0150 0.0210
0.0898 0.1098
0.2950 0.3050
*0.1181
0.3370 0.7470
0.0090 0.0150
94°
97°
Millimeters
Min.
Max.
0.38
0.53
2.28
2.79
7.49
7.74
*3.00
8.56
8.81
0.229
0.381
94°
97°
Notes : 1.Controlling dimension : millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material :
• Lead : 42 Alloy ; solder plating
• Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
PL384XAP8
CYStek Product Specification