TI TLC552

TLC552C
DUAL LINCMOS TIMER
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988
D
D
D
D
D
D
D
D
D
Very Low Power Consumption . . . 2 mW
Typ at VDD = 5 V
Capable of Operation in Astable Mode
CMOS Output Capable of Swinging Rail to
Rail
High Output-Current Capability
Sink 100 mA Typ
Source 10 mA Typ
Output Fully Compatible With CMOS, TTL,
and MOS
Low Supply Current Reduces Spikes
During Output Transitions
High-Impedance Inputs . . . 1012 Ω Typ
Single-Supply Operation From 1 V to 18 V
Functionally Interchangeable With the
NE556; Has Same Pinout
D OR N PACKAGE
(TOP VIEW)
DSCH
THRES
CONT
RESET
OUT
TRIG
GND
TIMER
#1
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VDD
DSCH
THRES
CONT
RESET
OUT
TRIG
TIMER
#2
functional block diagram (each timer)
VDD
CONT
RESET
R
R1
THRES
R
description
1
OUT
S
The TLC552 is a dual monolithic timing circuit
fabricated using TI LinCMOS process, which
provides full compatibility with CMOS, TTL, and
MOS logic and operation at frequencies up to
2 MHz. Accurate time delays and oscillations are
possible with smaller, less-expensive timing
capacitors than the NE555 because of the high
input impedance. Power consumption is low
across the full range of power supply voltages.
R
TRIG
R
DSCH
GND
RESET can override TRIG and THRES.
TRIG can override THRES.
Like the NE556, the TLC552 has a trigger level
AVAILABLE OPTIONS
approximately one-third of the supply voltage and
SYMBOLIZATION
a threshold level approximately two-thirds of the
OPERATING
VT max
TEMPERATURE
PACKAGE
supply voltage. These levels can be altered by use
DEVICE
at 25°C
RANGE
SUFFIX
of the control voltage terminal. When the trigger
TLC552C
D,N
0°C to 70°C
3.8 mV
input falls below the trigger level, the flip-flop is set
and the output goes high. If the trigger input is
The D packages are available taped and reeled. Add the suffix R
above the trigger level and the threshold input is
to the device type when ordering (i.e., TLC552CDR).
above the threshold level, the flip-flop is reset and
the output is low. The reset input can override all other inputs and can be used to initiate a new
timing cycle. If the reset input is low, the flip-flop is reset and the output is low. Whenever the output is low, a
low-impedance path is provided between the discharge terminal and ground.
While the CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC552 exhibits greatly
reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling
capacitors required by the NE556.
LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright  1988, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TLC552C
DUAL LINCMOS TIMER
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988
description (continued)
These devices have internal electrostatic discharge (ESD) protection circuits that will prevent catastrophic
failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3105.2. However, care should be
exercised in handling these devices as exposure to ESD may result in a degradation of the device parametric
performance.
All unused inputs should be tied to an appropriate logic level to prevent false triggering.
The TLC552C is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
RESET VOLTAGE†
TRIGGER
VOLTAGE†
THRESHOLD
VOLTAGE†
OUTPUT
DISCHARGE
SWITCH
< MIN
Irrelevant
Irrelevant
Low
On
> MAX
< MIN
Irrelevant
High
Off
> MAX
> MAX
> MAX
Low
On
> MAX
> MAX
< MIN
As previously established
† For conditions shown as MIN or MAX, use the appropriate value specified under electrical characteristics.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Input voltage range (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to VDD
Sink current, DSCH or OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 mA
Source current, OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 mA
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 75°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
NOTES: 1. All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE
D
N
POWER RATING
DERATING FACTOR
ABOVE TA
7.6 mW/°C
9.2 mW/°C
25°C
25°C
950 mW
1150 mW
recommended operating conditions
MIN
MAX
Supply voltage, VDD
1
18
V
Operating free-air temperature range, TA
0
70
°C
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
TLC552C
DUAL LINCMOS TIMER
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988
electrical characteristics at specified free-air temperature, VDD = 1 V
PARAMETER
TEST CONDITIONS
Threshold voltage level
Threshold current
Trigger voltage level
Trigger current
Reset voltage level
Reset current
Control voltage (open-circuit) as a percentage of supply voltage
Discharge switch on-state
on state voltage
IOL = 100 µA
off state current
Discharge switch off-state
Low level output voltage
Low-level
IOL = 100 µA
High level output voltage
High-level
IOH = – 10 µA
TA†
25°C
MIN
TYP
MAX
0.475
0.67
0.85
Full range
0.45
25°C
10
MAX
75
25°C
0.15
Full range
0.1
0.33
10
MAX
75
25°C
0.4
Full range
0.3
0.7
10
MAX
75
MAX
66.7%
25°C
0.02
Full range
0.1
MAX
0.5
25°C
0.03
Full range
1
0.6
Full range
0.6
0.15
V
nA
0.2
0.98
30
V
pA
0.25
25°C
V
pA
0.2
25°C
Full range
0.425
1
25°C
V
pA
1.45
25°C
25°C
Supply current
0.875
UNIT
V
V
200
300
µA
† Full range (MIN to MAX) is 0°C to 70°C.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TLC552C
DUAL LINCMOS TIMER
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988
electrical characteristics at specified free-air temperature, VDD = 2 V
PARAMETER
TEST CONDITIONS
Threshold voltage level
Threshold current
Trigger voltage level
Trigger current
Reset voltage level
Reset current
Control voltage (open-circuit) as a percentage of supply voltage
Discharge switch on-state
on state voltage
IOL = 1 mA
off state current
Discharge switch off-state
Low level output voltage
Low-level
IOL = 1 mA
High level output voltage
High-level
IOH = – 300 µA
MIN
TYP
MAX
0.95
1.33
1.65
Full range
0.85
10
MAX
75
25°C
0.4
Full range
0.3
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
0.67
10
MAX
75
25°C
0.4
Full range
0.3
1.1
0.95
10
MAX
75
MAX
66.7%
25°C
0.03
Full range
1.5
0.1
MAX
0.5
25°C
0.07
Full range
0.2
1.5
Full range
1.5
0.3
1.9
130
V
V
nA
0.35
25°C
V
pA
0.25
25°C
V
pA
1.8
25°C
UNIT
pA
1.05
25°C
Full range
† Full range (MIN to MAX) is 0°C to 70°C.
1.75
25°C
25°C
Supply current
4
TA†
25°C
V
V
500
800
µA
TLC552C
DUAL LINCMOS TIMER
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988
electrical characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
TEST CONDITIONS
Threshold voltage level
Threshold current
Trigger voltage level
Trigger current
Reset voltage level
Reset current
Control voltage (open-circuit) as a percentage of supply voltage
Discharge switch on-state
on state voltage
IOL = 10 mA
off state current
Discharge switch off-state
IOL = 8 mA
Low level output voltage
Low-level
IOL = 5 mA
IOL = 3.2
3 2 mA
High level output voltage
High-level
IOH = – 1 mA
TA†
25°C
MIN
TYP
MAX
2.8
3.3
3.8
Full range
2.7
25°C
10
MAX
75
25°C
1.36
Full range
1.26
1.66
10
MAX
75
25°C
0.4
Full range
0.3
1.1
10
MAX
75
MAX
66.7%
25°C
0.14
Full range
0.1
MAX
0.5
25°C
0.21
Full range
V
pA
1.5
V
pA
0.5
0.6
25°C
V
nA
0.4
0.5
25°C
0.13
Full range
0.3
0.4
25°C
0.08
Full range
V
0.3
0.35
25°C
4.1
Full range
4.1
Full range
1.96
1.8
25°C
V
pA
2.06
25°C
25°C
Supply current
3.9
UNIT
4.8
340
V
700
1000
µA
† Full range (MIN to MAX) is 0°C to 70°C.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
TLC552C
DUAL LINCMOS TIMER
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988
electrical characteristics at specified free-air temperature, VDD = 15 V
PARAMETER
TEST CONDITIONS
Threshold voltage level
Threshold current
Trigger voltage level
Trigger current
Reset voltage level
Reset current
Control voltage (open-circuit) as a percentage of supply voltage
Discharge switch on-state
on state voltage
IOL = 100 mA
off state current
Discharge switch off-state
IOL = 100 mA
Low level output voltage
Low-level
IOL = 50 mA
IOL = 10 mA
IOH = – 10 mA
High level output voltage
High-level
IOH = – 5 mA
IOH = – 1 mA
MIN
TYP
MAX
9.45
10
10.55
Full range
9.35
10
MAX
75
25°C
4.65
Full range
4.55
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
10
MAX
75
25°C
0.4
Full range
0.3
1.1
5.35
10
MAX
75
MAX
66.7%
25°C
0.77
Full range
1.5
0.1
MAX
0.5
25°C
1.28
Full range
V
V
pA
1.7
1.8
25°C
V
pA
1.8
25°C
UNIT
pA
5.45
25°C
V
nA
3.2
3.6
25°C
0.63
Full range
1
1.3
25°C
0.12
Full range
V
0.3
0.4
25°C
12.5
Full range
12.5
25°C
13.5
Full range
13.5
25°C
14.2
Full range
14.2
Full range
† Full range (MIN to MAX) is 0°C to 70°C.
10.65
25°C
25°C
Supply current
6
TA†
25°C
14.2
14.6
V
14.9
0.72
1.2
1.6
mA
TLC552C
DUAL LINCMOS TIMER
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988
electrical characteristics at specified free-air temperature, VDD = 18 V
PARAMETER
TEST CONDITIONS
Threshold voltage level
Threshold current
Trigger voltage level
Trigger current
Reset voltage level
Reset current
Control voltage (open-circuit) as a percentage of supply voltage
Discharge switch on-state
on state voltage
IOL = 100 mA
off state current
Discharge switch off-state
Low level output voltage
Low-level
IOL = 3
3.2
2 mA
High level output voltage
High-level
IOH = – 1 mA
TA†
25°C
MIN
TYP
MAX
11.4
12
12.6
Full range
10.9
25°C
10
MAX
75
25°C
5.6
Full range
5.5
6
10
MAX
75
25°C
0.4
Full range
0.3
1.1
6.4
10
MAX
75
MAX
66.7%
25°C
0.72
Full range
1.5
0.1
MAX
0.5
25°C
0.04
Full range
1.5
17.3
Full range
17.3
0.3
17.9
0.84
Full range
V
nA
0.35
25°C
V
pA
1.6
25°C
V
pA
1.8
25°C
V
pA
6.5
25°C
25°C
Supply current
12.7
UNIT
V
V
1.2
1.6
mA
† Full range (MIN to MAX) is 0°C to 70°C.
operating characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
Initial error of timing interval‡
Supply voltage sensitivity of timing interval
Output pulse rise time
Output pulse fall time
Maximum frequency in astable mode
TEST CONDITIONS
VDD = 5 V to 15 V,,
CT = 0.1 µF,
MIN
RA = RB = 1 kΩ to 100 kΩ,,
See Note 2
RL = 10 MΩ,
MΩ
CL = 10 pF
RA = 470 Ω,
CT = 200 pF,
RB = 200 Ω,
See Note 2
1.2
TYP
MAX
1%
3%
0.1
0.5
20
75
15
60
2.8
UNIT
%/V
ns
MHz
‡ Timing interval error is defined as the difference between the measured value and the nominal value of a random sample.
NOTE 2: RA, RB, and CT are as defined in Figure 1.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
TLC552C
DUAL LINCMOS TIMER
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988
APPLICATION INFORMATION
VDD
0.1 µF
RA
0.1 µF
CONT
VDD
RL
RESET
DISCH
OUT
RB
Output
THRES
TRIG
CL
CT
GND
Figure 1. Circuit for Astable Operation
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
10-Mar-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
TLC552CD
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC552CDG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC552CDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC552CDRG4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC552CN
ACTIVE
PDIP
N
14
25
Pb-Free (RoHS)
CU NIPDAU N / A for Pkg Type
TLC552CNE4
ACTIVE
PDIP
N
14
25
Pb-Free (RoHS)
CU NIPDAU N / A for Pkg Type
(3)
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Mar-2011
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TLC552CDR
Package Package Pins
Type Drawing
SOIC
D
14
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
16.4
Pack Materials-Page 1
6.5
B0
(mm)
K0
(mm)
P1
(mm)
9.0
2.1
8.0
W
Pin1
(mm) Quadrant
16.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TLC552CDR
SOIC
D
14
2500
367.0
367.0
38.0
Pack Materials-Page 2
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