TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com PRECISION ADJUSTABLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES Check for Samples: TPS2556, TPS2557 FEATURES APPLICATIONS • • • • • • • • • • • • • • • • 1 2 Meets USB Current-Limiting Requirements Adjustable Current Limit, 500 mA–5 A (typ) +/- 6.5% Current-Limit Accuracy at 4.5 A Fast Overcurrent Response - 3.5-μS (typ) 22-mΩ High-Side MOSFET Operating Range: 2.5 V to 6.5 V 2-μA Maximum Standby Supply Current Built-in Soft-Start 15 kV / 8 kV System-Level ESD Capable UL Listed* – File No. E169910 CB & Nemko Certification* *RILIM ≥ 24.9 kΩ (5A maximum) USB Ports/Hubs Digital TV Set-Top Boxes VOIP Phones DESCRIPTION The TPS2556/57 power-distribution switches are intended for applications where precision current limiting is required or heavy capacitive loads and short circuits are encountered. These devices offer a programmable current-limit threshold between 500 mA and 5.0 A (typ) via an external resistor. The power-switch rise and fall times are controlled to minimize current surges during turn on/off. TPS2556/57 devices limit the output current to a safe level by switching into a constant-current mode when the output load exceeds the current-limit threshold. The FAULT logic output asserts low during overcurrent and over temperature conditions. TPS2556/57 DRB PACKAGE (TOP VIEW) GND IN IN EN 1 2 3 4 PAD 8 7 6 5 TPS2556/57 2.5V – 6.5V FAULT OUT OUT ILIM EN = Active Low for the TPS2556 EN = Active High for the TPS2557 RFAULT 100 kΩ Fault Signal Control Signal 0.1 uF IN IN FAULT EN VOUT OUT OUT ILIM RILIM CLOAD GND Power Pad Figure 1. Typical Application as USB Power Switch 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2012, Texas Instruments Incorporated TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. AVAILABLE OPTIONS AND ORDERING INFORMATION DEVICE (1) TPS2556 TPS2557 (1) (2) (3) AMBIENT TEMPERATURE ENABLE SON (3) (DRB) MARKING Active low TPS2556DRB 2556 Active high TPS2557DRB 2557 (2) –40°C to 85°C RECOMMENDED MAXIMUM CONTINUOUS LOAD CURRENT 5.0 A For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Maximum ambient temperature is a function of device junction temperature and system level considerations, such as power dissipation and board layout. See dissipation rating table and recommended operating conditions for specific information related to these devices. Add an R suffix to the device type for tape and reel. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) (2) Voltage range on IN, OUT, EN or EN, ILIM, FAULT VALUE UNIT –0.3 to 7 V –7 to 7 V Voltage range from IN to OUT I Continuous output current Internally Limited See the Dissipation Rating Table Continuous total power dissipation Continuous FAULT sink current 25 mA Internally Limited mA HBM 2 kV CDM 500 V 8/15 kV –40 to OTSD2 (4) °C ILIM source current ESD ESD – system level (contact/air) TJ (1) (2) (3) (4) (3) Maximum junction temperature Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Voltages are referenced to GND unless otherwise noted. Surges per EN61000-4-2, 1999 applied between USB and output ground of the TPS2556EVM (HPA423) evaluation module (documentation available on the Web.) These were the test levels, not the failure threshold. Ambient over temperature shutdown threshold DISSIPATION RATING TABLE BOARD PACKAGE High-K (2) DRB THERMAL RESISTANCE (1 ) THERMAL RESISTANCE θJC TA ≤ 25°C POWER RATING 10.7 °C/W 2403 mW θJA (1) (2) 2 41.6 °C/W TM Mounting per the PowerPAD Thermally Enhanced Package application report (SLMA002). The JEDEC high-K (2s2p) board used to derive this data was a 3in × 3in, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com RECOMMENDED OPERATING CONDITIONS VIN MIN MAX 2.5 6.5 TPS2556 0 6.5 TPS2557 0 6.5 Input voltage, IN VEN Enable voltage VEN VIH High-level input voltage on EN or EN VIL Low-level input voltage on EN or EN IOUT Continuous output current, OUT UNIT V V 1.1 V 0.66 0 Continuous FAULT sink current 5 A 0 10 mA TJ Operating virtual junction temperature –40 125 °C RILIM Recommended resistor limit range 20k 187k Ω ELECTRICAL CHARACTERISTICS over recommended operating conditions, V/EN = 0 V, or VEN = VIN (unless otherwise noted) TEST CONDITIONS (1) PARAMETER MIN TYP MAX 22 25 UNIT POWER SWITCH rDS(on) Static drain-source on-state resistance tr Rise time, output tf Fall time, output TJ = 25°C –40 °C ≤TJ ≤ 125°C 35 VIN = 6.5 V VIN = 2.5 V VIN = 6.5 V CL = 1 μF, RL = 100 Ω, (see Figure 2) VIN = 2.5 V 2 3 1 2 3 0.6 0.8 1.0 0.4 0.6 0.8 mΩ 4 ms ENABLE INPUT EN OR EN Enable pin turn on/off threshold 0.66 IEN Input current ton Turn-on time toff Turn-off time 1.1 55 (2) Hysteresis VEN = 0 V or 6.5 V, V/EN = 0 V or 6.5 V –0.5 CL = 1 μF, RL = 100 Ω, (see Figure 2) V mV 0.5 μA 9 ms 6 ms CURRENT LIMIT IOS tIOS (1) (2) Current-limit threshold (Maximum DC output current IOUT delivered to load) & Short-circuit current, OUT connected to GND Response time to short circuit RILIM = 24.9 kΩ 4130 4450 4695 RILIM = 61.9 kΩ 1590 1785 1960 RILIM = 100 kΩ 935 1100 1260 VIN = 5.0 V (see Figure 3) 3.5 (2) mA μs Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately. These parameters are provided for reference only, and do no constitute part of TI's published specifications for purposes of TI's product warranty. Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 Submit Documentation Feedback 3 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) over recommended operating conditions, V/EN = 0 V, or VEN = VIN (unless otherwise noted) TEST CONDITIONS (1) PARAMETER MIN TYP MAX UNIT SUPPLY CURRENT IIN_off Supply current, low-level output 0.1 2.0 μA RILIM = 24.9 kΩ 95 120 μA RILIM = 100 kΩ 85 110 μA 0.01 1 μA 2.35 2.45 VIN = 6.5 V, No load on OUT, V EN = 6.5 V or VEN = 0 V IIN_on Supply current, high-level output VIN = 6.5 V, No load on OUT IREV Reverse leakage current VOUT = 6.5 V, VIN = 0 V TJ = 25 °C UNDERVOLTAGE LOCKOUT UVLO Low-level input voltage, IN VIN rising 35 (3) Hysteresis, IN V mV FAULT FLAG VOL Output low voltage, FAULT I/FAULT = 1 mA 180 Off-state leakage V/FAULT = 6.5 V FAULT deglitch FAULT assertion or de-assertion due to overcurrent condition 6 9 mV 1 μA 13 ms THERMAL SHUTDOWN OTSD2 Thermal shutdown threshold 155 OTSD Thermal shutdown threshold in current-limit 135 Hysteresis (3) 4 °C °C 20 (3) °C These parameters are provided for reference only, and do no constitute part of TI's published specifications for purposes of TI's product warranty. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com DEVICE INFORMATION Pin Functions PIN NAME I/O DESCRIPTION TPS2556 TPS2557 EN 4 – I Enable input, logic low turns on power switch EN – 4 I Enable input, logic high turns on power switch GND 1 1 2, 3 2, 3 I Input voltage; connect a 0.1 μF or greater ceramic capacitor from IN to GND as close to the IC as possible. 8 8 O Active-low open-drain output, asserted during overcurrent or overtemperature conditions. OUT 6, 7 6, 7 O Power-switch output ILIM 5 5 O External resistor used to set current-limit threshold; recommended 20 kΩ ≤ RILIM ≤ 187 kΩ. PowerPAD™ – – IN FAULT Ground connection; connect externally to PowerPAD Internally connected to GND; used to heat-sink the part to the circuit board traces. Connect PowerPAD to GND pin externally. FUNCTIONAL BLOCK DIAGRAM CS IN OUT Current Sense Charge Pump Driver EN Current Limit FAULT UVLO GND Thermal Sense 8-ms Deglitch ILIM PARAMETER MEASUREMENT INFORMATION OUT CL RL tr VOUT tf 90% 90% 10% 10% TEST CIRCUIT VEN 50% 50% VEN ton toff 50% 50% toff ton 90% 90% VOUT 10% VOUT 10% VOLTAGE WAVEFORMS Figure 2. Test Circuit and Voltage Waveforms Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 Submit Documentation Feedback 5 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) IOS IOUT tIOS Figure 3. Response Time to Short Circuit Waveform Decreasing Load Resistance VOUT Decreasing Load Resistance IOUT IOS Figure 4. Output Voltage vs. Current-Limit Threshold TPS2556 VIN = 5 V RFAULT 100 kW Fault Signal Enable Signal 0.1 uF IN IN OUT OUT FAULT EN VOUT RLOAD 150 µF ILIM GND 24.9 kW Power Pad Figure 5. Typical Characteristics Reference Schematic 6 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com TYPICAL CHARACTERISTICS VOUT 2 V/div VOUT 2 V/div VEN_bar 5 V/div VEN_bar 5 V/div IIN 2 A/div IIN 2 A/div t - Time - 2 ms/div t - Time - 2 ms/div Figure 6. Turn-on Delay and Rise Time Figure 7. Turn-off Delay and Fall Time VEN_bar 5 V/div VOUT 2 V/div FAULT_bar FAULT_bar 5 V/div 5 V/div IIN 2 A/div IIN 5 A/div t - Time - 2 ms/div t - Time - 5 ms/div Figure 8. Device Enabled into Short-Circuit Figure 9. Full-Load to Short-Circuit Transient Response 2.335 2.33 UVLO - Undervoltage Lockout - V VOUT 2 V/div FAULT_bar 5 V/div IIN 5 A/div 2.325 UVLO Rising 2.32 2.315 2.31 2.305 UVLO Falling 2.3 2.295 2.29 -50 t - Time - 5 ms/div Figure 10. Short-Circuit to Full-Load Recovery Response 0 50 TJ - Junction Temperature - °C 100 150 Figure 11. UVLO – Undervoltage Lockout – V Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 Submit Documentation Feedback 7 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) 120 700 VIN = 6.5 V IIN - Supply Current, Output Enabled - mA IIN - Supply Current, Output Disabled - nA VIN = 5 V 600 500 400 VIN = 6.5 V 300 200 VIN = 2.5 V 100 0 -100 -50 0 50 TJ - Junction Temperature - °C 100 100 80 VIN = 2.5 V 40 RILIM = 24.9 kΩ 20 0 -50 150 Figure 12. IIN – Supply Current, Output Disabled – nA 0 50 TJ - Junction Temperature - °C 100 150 Figure 13. IIN – Supply Current, Output Enabled – μA 35 rDS(on) - Static Drain-Source On-State Resistance - mW 120 RILIM = 24.9kΩ IIN Supply Current vs. VIN Enabled - μA VIN = 3.3 V 60 110 TJ = 125°C 100 90 80 TJ = -40°C TJ = 25°C 70 3 4 5 Input Voltage - V 6 25 20 15 10 5 0 -50 60 2 30 7 Figure 14. IIN – Supply Current, Output Enabled – μA 0 50 TJ - Junction Temperature - °C 100 150 Figure 15. MOSFET rDS(on) Vs. Junction Temperature 1.2 2 1.0 IDS - Static Drain-Source Current - A IDS - Static Drain-Source Current - A 1.8 TA = -40°C 0.8 TA = 25°C TA = 125°C 0.6 0.4 RILIM = 100 kW 0.2 1.6 1.4 TA = -40°C 1.2 TA = 25°C 1.0 TA = 125°C 0.8 0.6 RILIM = 61.9 kW 0.4 0.2 0 0 50 100 VIN - VOUT - mV/div 150 Figure 16. Switch Current Vs. Drain-Source Voltage Across Switch 8 Submit Documentation Feedback 200 0 0 20 40 60 80 100 VIN - VOUT - mV/div 120 140 160 Figure 17. Switch Current Vs. Drain-Source Voltage Across Switch Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) 5.0 4.5 IDS - Static Drain-Source Current - A 4.0 TJ = -40°C 3.5 3.0 TJ = 25°C 2.5 2.0 1.5 TJ = 125°C 1.0 RILIM = 24.9kΩ 0.5 0 0 20 40 60 100 80 VIN-VOUT - mV 120 140 160 Figure 18. Switch Current vs. Drain-Source Voltage Across Switch DETAILED DESCRIPTION OVERVIEW The TPS2556/57 is a current-limited, power-distribution switch using N-channel MOSFETs for applications where short circuits or heavy capacitive loads will be encountered. This device allows the user to program the current-limit threshold between 500 mA and 5.0 A (typ) via an external resistor. This device incorporates an internal charge pump and the gate drive circuitry necessary to drive the N-channel MOSFET. The charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.5 V and requires little supply current. The driver controls the gate voltage of the power switch. The driver incorporates circuitry that controls the rise and fall times of the output voltage to limit large current and voltage surges and provides built-in soft-start functionality. The TPS2556/57 family limits the output current to the programmed current-limit threshold IOS during an overcurrent or short-circuit event by reducing the charge pump voltage driving the N-channel MOSFET and operating it in the linear range of operation. The result of limiting the output current to IOS reduces the output voltage at OUT because N-channel MOSFET is no longer fully enhanced. OVERCURRENT CONDITIONS The TPS2556/57 responds to overcurrent conditions by limiting their output current to IOS . When an overcurrent condition is detected, the device maintains a constant output current and the output voltage reduces accordingly. Two possible overload conditions can occur. The first condition is when a short circuit or partial short circuit is present when the device is powered-up or enabled. The output voltage is held near zero potential with respect to ground and the TPS2556/57 ramps the output current to IOS. The TPS2556/57 will limit the current to IOS until the overload condition is removed or the device begins to thermal cycle. The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is enabled and powered on. The device responds to the overcurrent condition within time tIOS (see Figure 3). The current-sense amplifier is overdriven during this time and momentarily disables the internal N-channel MOSFET. The current-sense amplifier recovers and ramps the output current to IOS. Similar to the previous case, the TPS2556/57 will limit the current to IOS until the overload condition is removed or the device begins to thermal cycle. The TPS2556/57 thermal cycles if an overload condition is present long enough to activate thermal limiting in any of the above cases. The device turns off when the junction temperature exceeds 135°C (min) while in current limit. The device remains off until the junction temperature cools 20°C (typ) and then restarts. The TPS2556/57 cycles on/off until the overload is removed (see Figure 10) . Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 Submit Documentation Feedback 9 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com FAULT RESPONSE The FAULT open-drain output is asserted (active low) during an overcurrent or overtemperature condition. The TPS2556/57 asserts the FAULT signal until the fault condition is removed and the device resumes normal operation. The TPS2556/57 is designed to eliminate false FAULTreporting by using an internal delay "deglitch" circuit for overcurrent (9-ms typ) conditions without the need for external circuitry. This ensures that FAULTis not accidentally asserted due to normal operation such as starting into a heavy capacitive load. The deglitch circuitry delays entering and leaving current-limit induced fault conditions. The FAULTsignal is not deglitched when the MOSFET is disabled due to an overtemperature condition but is deglitched after the device has cooled and begins to turn on. This unidirectional deglitch prevents FAULT oscillation during an overtemperature event. UNDERVOLTAGE LOCKOUT (UVLO) The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turn-on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage droop during turn on. ENABLE (EN OR EN) The logic enable controls the power switch and device supply current. The supply current is reduced to less than 2-μA when a logic high is present on EN or when a logic low is present on EN. A logic low input on EN or a logic high input on EN enables the driver, control circuits, and power switch. The enable input is compatible with both TTL and CMOS logic levels. THERMAL SENSE The TPS2556/57 self protects by using two independent thermal sensing circuits that monitor the operating temperature of the power switch and disable operation if the temperature exceeds recommended operating conditions. The TPS2556/57 device operates in constant-current mode during an overcurrent conditions, which increases the voltage drop across power switch. The power dissipation in the package is proportional to the voltage drop across the power switch, which increases the junction temperature during an overcurrent condition. The first thermal sensor (OTSD) turns off the power switch when the die temperature exceeds 135°C (min) and the part is in current limit. Hysteresis is built into the thermal sensor, and the switch turns on after the device has cooled approximately 20 °C. The TPS2556/57 also has a second ambient thermal sensor (OTSD2). The ambient thermal sensor turns off the power switch when the die temperature exceeds 155°C (min) regardless of whether the power switch is in current limit and will turn on the power switch after the device has cooled approximately 20 °C. The TPS2556/57 continues to cycle off and on until the fault is removed. APPLICATION INFORMATION INPUT AND OUTPUT CAPACITANCE Input and output capacitance improves the performance of the device; the actual capacitance should be optimized for the particular application. For all applications, a 0.1μF or greater ceramic bypass capacitor between IN and GND is recommended as close to the device as possible for local noise decoupling. This precaution reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the input to reduce voltage overshoot from exceeding the absolute-maximum voltage of the device during heavy transient conditions. This is especially important during bench testing when long, inductive cables are used to connect the evaluation board to the bench power supply. Output capacitance is not required, but placing a high-value electrolytic capacitor on the output pin is recommended when large transient currents are expected on the output. 10 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com PROGRAMMING THE CURRENT-LIMIT THRESHOLD The overcurrent threshold is user programmable via an external resistor. The TPS2556/57 uses an internal regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is proportional to the current sourced out of ILIM. The recommended 1% resistor range for RILIM is 20 kΩ ≤ RILIM ≤ 187 kΩ to ensure stability of the internal regulation loop. Many applications require that the minimum current limit is above a certain current level or that the maximum current limit is below a certain current level, so it is important to consider the tolerance of the overcurrent threshold when selecting a value for RILIM. The following equations approximate the resulting overcurrent threshold for a given external resistor value RILIM). Consult the Electrical Characteristics table for specific current limit settings. The traces routing the RILIM resistor to the TPS2556/57 should be as short as possible to reduce parasitic effects on the current-limit accuracy. IOSmax (mA) = 99038V RILIM0.947kW IOSnom (mA) = 111704V RILIM1.0028kW IOSmin (mA) = 127981V RILIM1.0708kW (1) 6000 5500 Current-Limit Threshold – mA 5000 4500 4000 3500 3000 2500 2000 IOS(max) IOS(typ) 1500 1000 IOS(min) 500 0 20 30 40 50 60 70 80 90 100 110 120 130 140 150 RILIM – Current Limit Resistor – kΩ Figure 19. Current-Limit Threshold vs. RILIM APPLICATION 1: DESIGNING ABOVE A MINIMUM CURRENT LIMIT Some applications require that current limiting cannot occur below a certain threshold. For this example, assume that 3 A must be delivered to the load so that the minimum desired current-limit threshold is 3000 mA. Use the IOS equations and Figure 19 to select RILIM. IOSmin (mA) = 3000mA IOSmin (mA) = 127981V RILIM1.0708kW 1 æ127981V ö÷1.0708 ÷÷ RILIM (kW ) = ççç çè I mA ø÷ OSmin RILIM (kW ) = 33.3kW (2) Select the closest 1% resistor less than the calculated value: RILIM = 33.2 kΩ. This sets the minimum current-limit threshold at 3000 mA . Use the IOS equations, Figure 19, and the previously calculated value for RILIM to calculate the maximum resulting current-limit threshold. Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 Submit Documentation Feedback 11 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com RILIM (kW ) = 33.2kW IOSmax (mA) = IOSmax (mA) = 99038V RILIM0.947kW 99038V 33.20.947kW IOSmax (mA) = 3592mA (3) The resulting maximum current-limit threshold is 3592 mA with a 33.2 kΩ resistor. APPLICATION 2: DESIGNING BELOW A MAXIMUM CURRENT LIMIT Some applications require that current limiting must occur below a certain threshold. For this example, assume that the desired upper current-limit threshold must be below 5000 mA to protect an up-stream power supply. Use the IOS equations and Figure 19 to select RILIM. IOSmax (mA) = 5000mA IOSmax (mA) = 99038V RILIM0.947kW 1 æ 99038V ÷ö0.947 ÷ RILIM (kW) = ççç çèIOSmax mA ÷÷ø RILIM (kW) = 23.4kW (4) Select the closest 1% resistor greater than the calculated value: RILIM = 23.7kΩ. This sets the maximum current-limit threshold at 5000 mA . Use the IOS equations, Figure 19, and the previously calculated value for RILIM to calculate the minimum resulting current-limit threshold. RILIM (kW) = 23.7kW IOSmin (mA) = IOSmin (mA) = 127981V RILIM1.0708kW 127981V 23.71.0708 kW IOSmin (mA) = 4316mA (5) The resulting minimum current-limit threshold is 4316 mA with a 23.7 kΩ resistor. ACCOUNTING FOR RESISTOR TOLERANCE The previous sections described the selection of RILIM given certain application requirements and the importance of understanding the current-limit threshold tolerance. The analysis focused only on the TPS2556/57 performance and assumed an exact resistor value. However, resistors sold in quantity are not exact and are bounded by an upper and lower tolerance centered around a nominal resistance. The additional RILIM resistance tolerance directly affects the current-limit threshold accuracy at a system level. The following table shows a process that accounts for worst-case resistor tolerance assuming 1% resistor values. Step one follows the selection process outlined in the application examples above. Step two determines the upper and lower resistance bounds of the selected resistor. Step three uses the upper and lower resistor bounds in the IOS equations to calculate the threshold limits. It is important to use tighter tolerance resistors, e.g. 0.5% or 0.1%, when precision current limiting is desired. Table 1. Common RILIM Resistor Selections Resistor Tolerance Actual Limits Desired Nominal Current Limit (mA) Ideal Resistor (kΩ) Closest 1% Resistor (kΩ) 1% low (kΩ) 1% high (kΩ) IOS MIN (mA) IOS Nom (mA) IOS MAX (mA) 750 146.9 147 145.5 148.5 605 749 886 1000 110.2 110 108.9 111.1 825 1002 1166 1250 88.2 88.7 87.8 89.6 1039 1244 1430 1500 73.6 73.2 72.5 73.9 1276 1508 1715 12 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com Table 1. Common RILIM Resistor Selections (continued) 1750 63.1 63.4 62.8 64.0 1489 1742 1965 2000 55.2 54.9 54.4 55.4 1737 2012 2252 2250 49.1 48.7 48.2 49.2 1975 2269 2523 2500 44.2 44.2 43.8 44.6 2191 2501 2765 2750 40.2 40.2 39.8 40.6 2425 2750 3025 3000 36.9 36.5 36.1 36.9 2689 3030 3315 3250 34.0 34.0 33.7 34.3 2901 3253 3545 3500 31.6 31.6 31.3 31.9 3138 3501 3800 3750 29.5 29.4 29.1 29.7 3390 3764 4068 4000 27.7 27.4 27.1 27.7 3656 4039 4349 4250 26.0 26.1 25.8 26.4 3851 4241 4554 4500 24.6 24.9 24.7 25.1 4050 4446 4761 4750 23.3 23.2 23.0 23.4 4369 4773 5091 5000 22.1 22.1 21.9 22.3 4602 5011 5331 5250 21.1 21.0 20.8 21.2 4861 5274 5595 5500 20.1 20.0 19.8 20.2 5121 5539 5859 POWER DISSIPATION AND JUNCTION TEMPERATURE The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It is good design practice to estimate power dissipation and junction temperature. The below analysis gives an approximation for calculating junction temperature based on the power dissipation in the package. However, it is important to note that thermal analysis is strongly dependent on additional system level factors. Such factors include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating power. Good thermal design practice must include all system level factors in addition to individual component analysis. Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and read rDS(on) from the typical characteristics graph. Using this value, the power dissipation can be calculated by: PD = rDS(on) × IOUT 2 Where: PD = Total power dissipation (W) rDS(on) = Power switch on-resistance (Ω) IOUT = Maximum current-limit threshold (A) This step calculates the total power dissipation of the N-channel MOSFET. Finally, calculate the junction temperature: TJ = PD × θJA + TA Where: TA = Ambient temperature (°C) θJA = Thermal resistance (°C/W) PD = Total power dissipation (W) Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat the calculation using the "refined" rDS(on) from the previous calculation as the new estimate. Two or three iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent on thermal resistance θJA, and thermal resistance is highly dependent on the individual package and board layout. The Dissipating Rating Table provides examples of thermal resistance for specific packages and board layouts. Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 Submit Documentation Feedback 13 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com AUTO-RETRY FUNCTIONALITY Some applications require that an overcurrent condition disables the part momentarily during a fault condition and re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor and capacitor. During a fault condition, FAULTpulls low EN. The part is disabled when EN is pulled below the turn-off theshold, and FAULT goes high impedance allowing CRETRY to begin charging. The part re-enables when the voltage on EN reaches the turn-on threshold. The auto-retry time is determined by the resistor/capacitor time constant. The part will continue to cycle in this manner until the fault condition is removed. TPS2557 Input Output 0.1 uF IN OUT CLOAD RFAULT 100 kΩ 1 kΩ CRETRY 0.22 µF ILIM FAULT EN RLOAD RILIM 20 kΩ GND Power Pad Figure 20. Auto-Retry Functionality Some applications require auto-retry functionality and the ability to enable/disable with an external logic signal. The figure below shows how an external logic signal can drive EN through RFAULT and maintain auto-retry functionality. The resistor/capacitor time constant determines the auto-retry time-out period. Input TPS2557 Output 0.1 uF IN External Logic RFAULT Signal & Driver 100 kΩ FAULT EN CRETRY 0.22 µF OUT CLOAD ILIM RLOAD RILIM 20 kΩ GND Power Pad Figure 21. Auto-Retry Functionality With External EN Signal TWO-LEVEL CURRENT-LIMIT CIRCUIT Some applications require different current-limit thresholds depending on external system conditions. Figure 22 shows an implementation for an externally-controlled, two-level current-limit circuit. The current-limit threshold is set by the total resistance from ILIM to GND (see previously discussed "Programming the Current-Limit Threshold" section). A logic-level input enables/disables MOSFET Q1 and changes the current-limit threshold by modifying the total resistance from ILIM to GND. Additional MOSFET/resistor combinations can be used in parallel to Q1/R2 to increase the number of additional current-limit levels. NOTE ILIM should never be driven directly with an external signal. 14 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com TPS2556/57 Input 0.1 uF IN RFAULT 100 kΩ FAULT EN Fault Signal Control Signal Output OUT ILIM CLOAD R1 187 kΩ R LOAD R2 22.1 kΩ GND Power Pad Q1 Current Limit Control Signal Figure 22. Two-Level Current-Limit Circuit Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 Submit Documentation Feedback 15 TPS2556 TPS2557 SLVS931A – NOVEMBER 2009 – REVISED FEBRUARY 2012 www.ti.com REVISION HISTORY Changes from Original (November 2009) to Revision A Page • Changed VEN to VEN in RECOMMENDED OPERATING CONDITIONS .............................................................................. 3 • Changed VEN to VEN in RECOMMENDED OPERATING CONDITIONS .............................................................................. 3 16 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2556 TPS2557 PACKAGE OPTION ADDENDUM www.ti.com 4-Jan-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) TPS2556DRBR ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2556DRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2557DRBR ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2557DRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TPS2556DRBR SON DRB 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS2556DRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS2557DRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS2557DRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2556DRBR SON DRB 8 3000 367.0 367.0 35.0 TPS2556DRBT SON DRB 8 250 210.0 185.0 35.0 TPS2557DRBR SON DRB 8 3000 367.0 367.0 35.0 TPS2557DRBT SON DRB 8 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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