TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com Current-Limited, Power-Distribution Switches Check for Samples: TPS20xxC FEATURES DESCRIPTION • • • • • • • • • • The TPS20xxC power-distribution switch family is intended for applications such as USB where heavy capacitive loads and short-circuits are likely to be encountered. This family offers multiple devices with fixed current-limit thresholds for applications between 0.5 A and 2 A. 1 Single Power Switch Family Pin for Pin with Existing TI Switch Portfolio Rated currents of 0.5 A, 1 A, 1.5 A, 2 A ±20% Accurate, Fixed, Constant Current Limit Fast Over-Current Response – 2 µs Deglitched Fault Reporting Output Discharge When Disabled Reverse Current Blocking Built-in Softstart Ambient Temperature Range: –40°C to 85°C The TPS20xxC family limits the output current to a safe level by operating in a constant-current mode when the output load exceeds the current-limit threshold. This provides a predictable fault current under all conditions. The fast overload response time eases the burden on the main 5 V supply to provide regulated power when the output is shorted. The power-switch rise and fall times are controlled to minimize current surges during turn-on and turn-off. APPLICATIONS • • • • USB Ports/Hubs, Laptops, Desktops High-Definition Digital TVs Set Top Boxes Short-Circuit Protection DGN, DGK DBV (Top View) (Top View) GND IN IN EN or EN 1 2 3 4 PAD 2 8 7 6 5 OUT OUT OUT FLT OUT 1 5 IN GND FLT 2 3 4 EN or EN DGN, DGK DGN Only (Top V TYPICAL APPLICATION Fault Signal IN 150 mF FLT EN or EN Control Signal VOUT OUT 0.1 mF VIN RFLT 10 kW GND Pad* * DGN only Figure 1. Typical Application Table 1. DEVICES (1) STATUS MAXIMUM OPERATING CURRENT DEVICES 0.5 1 (1) MSOP-8 ( PowerPad™) SOT23-5 MSOP-8 TPS2051C - Active - TPS2065C Active Active - 1.5 TPS2069C Active - - 2 TPS2000C / 1C Active - Active For more details, see the DEVICE INFORMATION table. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPad is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DEVICE INFORMATION (1) (1) (2) MAXIMUM OPERATING CURRENT OUTPUT DISCHARGE ENABLE BASE PART NUMBER 0.5 Y High TPS2051C 1 Y High TPS2065C 1.5 Y High TPS2069C 2 Y Low 2 Y High PACKAGED DEVICE AND MARKING (2) MSOP-8 (DGN) PowerPAD™ SOT23-5 (DBV) MSOP-8 (DGK) – VBYQ – VCAQ VCAQ – VBUQ – – TPS2000C BCMS – PXFI TPS2001C VBWQ – PXGI For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. "-" indicates the device is not available in this package. ABSOLUTE MAXIMUM RATINGS (1) (2) VALUE Voltage range on IN, OUT, EN or EN, FLT (3) Voltage range from IN to OUT Maximum junction temperature, TJ Electrostatic Discharge MAX –0.3 6 V –6 6 V Internally Limited HBM 2 kV CDM 500 V IEC 61000-4-2, Contact / Air (1) (2) (3) (4) UNIT MIN (4) 8 15 kV Absolute maximum ratings apply over recommended junction temperature range. Voltages are with respect to GND unless otherwise noted. See the Input and Output Capacitance section. VOUT was surged on a pcb with input and output bypassing per Figure 1 (except input capacitor was 22 µF) with no device failures. THERMAL INFORMATION THERMAL METRIC (1) (See DEVICE INFORMATION table.) 0.5 A or 1 A Rated 1.5 A or 2 A Rated 0.5 A or 1 A Rated 1.5 A or 2 A Rated 2A Rated DBV DBV DGN DGN DGK 5 PINS 5 PINS 8 PINS 8 PINS 8 PINS θJA Junction-to-ambient thermal resistance 224.9 220.4 72.1 67.1 205.5 θJCtop Junction-to-case (top) thermal resistance 95.2 89.7 87.3 80.8 94.3 θJB Junction-to-board thermal resistance 51.4 46.9 42.2 37.2 126.9 ψJT Junction-to-top characterization parameter 6.6 5.2 7.3 5.6 24.7 ψJB Junction-to-board characterization parameter 50.3 46.2 42.0 36.9 125.2 θJCbot Junction-to-case (bottom) thermal resistance N/A N/A 39.2 32.1 N/A 139.3 134.9 66.5 61.3 110.3 See the Power DIssipation and Junction θJACustom Temperature section (1) 2 UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com RECOMMENDED OPERATING CONDITIONS MIN VIN Input voltage, IN VEN Input voltage, EN or EN NOM Continuous output current, OUT V 0 5.5 V 0.5 TPS2065C 1 TPS2069C 1.5 TPS2000C/01C TJ Operating junction temperature IFLT Sink current into FLT UNIT 5.5 TPS2051C IOUT MAX 4.5 A 2 –40 125 °C 0 5 mA ELECTRICAL CHARACTERISTICS: TJ = TA = 25°C (1) Unless otherwise noted:, VIN = 5 V, VEN = VIN or VEN = GND, IOUT = 0 A. See the DEVICE INFORMATION table for the rated current of each part number. Parametrics over a wider operational range are shown in the second ELECTRICAL CHARACTERISTICS table. PARAMETER TEST CONDITIONS (1) MIN TYP MAX UNIT POWER SWITCH 0.5 A rated output, 25°C DBV 97 110 mΩ 0.5 A rated output, –40°C ≤ (TJ , TA) ≤ 85°C DBV 96 130 mΩ DBV 96 110 DGN 86 100 1 A rated output, –40°C ≤ (TJ , TA) ≤ 85°C DBV 96 130 DGN 86 120 1.5 A rated output, 25°C DGN 69 84 mΩ 1.5 A rated output, –40°C ≤ (TJ , TA) ≤ 85°C DGN 69 98 mΩ 2 A rated output, 25°C DGN, DGK 72 84 mΩ 2 A rated output, –40°C ≤ (TJ , TA) ≤ 85°C DGN, DGK 72 98 mΩ 1 A rated output, 25°C RDS(ON) Input – output resistance mΩ mΩ CURRENT LIMIT IOS (2) Current-limit, See Figure 7 0.5A rated output 0.67 0.85 1.01 1 A rated output 1.3 1.55 1.8 1.5 A rated output 1.7 2.15 2.5 2.35 2.9 3.4 0.01 1 2 A rated output A SUPPLY CURRENT ISD Supply current, switch disabled ISE Supply current, switch enabled IREV Reverse leakage current –40°C ≤ (TJ , TA) ≤ 85°C, VIN = 5.5 V 2 60 –40°C ≤ (TJ , TA) ≤ 85°C, VIN = 5.5 V 70 85 VOUT = 5 V, VIN = 0 V, measure IVOUT 0.1 –40°C ≤ (TJ , TA) ≤ 85°C, VOUT = 5 V, VIN = 0 V, measure IVOUT µA µA 1 5 µA OUTPUT DISCHARGE RPD (1) (2) (3) Output pull-down resistance (3) VIN = VOUT = 5 V, disabled 400 470 600 Ω Pulsed testing techniques maintain junction temperature approximately equal to ambient temperature See CURRENT LIMIT section for explanation of this parameter. These parameters are provided for reference only, and do not constitute part of TI's published device specifications for purposes of TI's product warranty. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC 3 TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS: –40°C ≤ TJ ≤ 125°C Unless otherwise noted:4.5 V ≤ VIN ≤ 5.5 V, VEN = VIN or VEN = GND, IOUT = 0 A, typical values are at 5 V and 25°C. See the DEVICE INFORMATION table for the rated current of each part number. TEST CONDITIONS (1) PARAMETER MIN TYP MAX UNIT DBV 97 154 mΩ DBV 96 154 DGN 86 140 1.5 A rated output DGN 69 112 mΩ 2 A rated output DGN, DGK 72 112 mΩ 1 1.45 2 0.07 0.13 0.20 V –1 0 1 µA 0.5A / 1A Rated 1 1.4 1.8 1.5A / 2A Rated 1.2 1.7 2.2 0.5A and 1A Rated 1.3 1.65 2 1.5A / 2A Rated 1.7 2.1 2.5 0.5A / 1A Rated 0.4 0.55 0.7 1.5A / 2A Rated 0.5 0.7 1.0 0.5A / 1A Rated 0.25 0.35 0.45 1.5A / 2A Rated 0.3 0.43 0.55 0.65 0.85 1.05 1 A rated output 1.2 1.55 1.9 1.5 A rated output 1.6 2.15 2.7 2 A rated output 2.3 2.9 3.6 POWER SWITCH 0.5 A rated output RDS(ON) Input – output resistance 1 A rated output mΩ ENABLE INPUT (EN or EN) Threshold Input rising Hysteresis Leakage current (VEN or VEN) = 0 V or 5.5 V V VIN = 5 V, CL = 1 µF, RL = 100 Ω, EN ↑ or EN ↓. See Figure 2, Figure 4, and Figure 5 tON Turnon time ms VIN = 5 V, CL = 1 µF, RL = 100 Ω, EN ↓ or EN ↑. See Figure 2, Figure 4, and Figure 5 tOFF Turnoff time ms CL = 1 µF, RL = 100 Ω, VIN = 5 V. See Figure 3 tR Rise time, output ms CL = 1 µF, RL = 100 Ω, VIN = 5 V. See Figure 3 tF Fall time, output ms CURRENT LIMIT 0.5 A rated output IOS (2) Current-limit, See Figure 8 Short-circuit response time (3) tIOS VIN = 5 V (see Figure 7), One-half full load → RSHORT = 50 mΩ, Measure from application to when current falls below 120% of final value A µs 2 SUPPLY CURRENT ISD Supply current, switch disabled ISE Supply current, switch enabled IREV Reverse leakage current VOUT = 5.5 V, VIN = 0 V, Measure IVOUT 0.01 10 µA 65 90 µA 0.2 20 µA 3.75 4 V UNDERVOLTAGE LOCKOUT VUVLO (1) (2) (3) 4 Rising threshold VIN↑ Hysteresis (3) VIN↓ 3.5 0.14 V Pulsed testing techniques maintain junction temperature approximately equal to ambient temperature See CURRENT LIMIT section for explanation of this parameter. These parameters are provided for reference only, and do not constitute part of TI's published device specifications for purposes of TI's product warranty. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS: –40°C ≤ TJ ≤ 125°C (continued) Unless otherwise noted:4.5 V ≤ VIN ≤ 5.5 V, VEN = VIN or VEN = GND, IOUT = 0 A, typical values are at 5 V and 25°C. See the DEVICE INFORMATION table for the rated current of each part number. TEST CONDITIONS (1) PARAMETER MIN TYP MAX UNIT FLT tFLT Output low voltage, FLT IFLT = 1 mA Off-state leakage VFLT = 5.5 V FLT deglitch FLT assertion/deassertion deglitch 0.2 V 1 µA ms 6 9 12 VIN = 4 V, VOUT = 5.0 V, disabled 350 560 1200 VIN = 5 V, VOUT = 5.0 V, disabled 300 470 800 In current limit 135 Not in current limit 155 OUTPUT DISCHARGE RPD Output pull-down resistance Ω THERMAL SHUTDOWN Rising threshold (TJ) Hysteresis (4) (4) °C 20 These parameters are provided for reference only, and do not constitute part of TI's published device specifications for purposes of TI's product warranty. OUT RL VOUT CL Figure 2. Output Rise / Fall Test Load VEN 50% tON tR 90% 10% Figure 3. Power-On and Off Timing V/EN 50% 50% 50% tOFF tOFF tON 90% VOUT tF 90% VOUT 10% 10% Figure 4. Enable Timing, Active High Enable Figure 5. Enable Timing, Active Low Enable 120% x IOS IOUT IOS 0A tIOS Figure 6. Output Short Circuit Parameters VIN Decreasing Load Resistance VOUT Slope = -RDS(ON) 0V 0A IOUT IOS Figure 7. Output Characteristic Showing Current Limit Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC 5 TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com FUNCTIONAL BLOCK DIAGRAM Current Sense IN Charge Pump EN or EN CS OUT Current Limit (Disabled+ UVLO) Driver UVLO GND FLT OTSD Thermal Sense 9-ms Deglitch DEVICE INFORMATION PIN FUNCTIONS NAME PINS DESCRIPTION 8-PIN PACKAGE EN or EN GND IN 4 Enable input, logic high turns on power switch 1 Ground connection 2, 3 FLT 5 OUT 6, 7, 8 PowerPAD (DGN ONLY) PAD Input voltage and power-switch drain; connect a 0.1 µF or greater ceramic capacitor from IN to GND close to the IC Active-low open-drain output, asserted during over-current, or over-temperature conditions Power-switch output, connect to load Internally connected to GND. Connect PAD to GND plane as a heatsink for the best thermal performance. PAD may be left floating if desired. See POWER DISSIPATION AND JUNCTION TEMPERATURE section for guidance. 5-PIN PACKAGE EN or EN 4 Enable input, logic high turns on power switch GND 2 Ground connection IN 5 Input voltage and power-switch drain; connect a 0.1 µF or greater ceramic capacitor from IN to GND close to the IC FLT 3 Active-low open-drain output, asserted during over-current, or over-temperature conditions OUT 1 Power-switch output, connect to load. 6 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS IOUT OUT OUT1 OUT1 IN IN1 680mF3 VOUT 150µF VIN VIN 2 Enable Signal EN or EN Pad1 RLOAD 3.01kW2 FLT GND (1) Not every package has all pins (2) These parts are for test purposes (3) Helps with output shorting tests when external supply is used. Fault Signal Figure 8. Test Circuit for System Operation in Typical Characteristics Section Amplitude (V) 6 FLT 9 1.75 8 1.50 7 1.25 6 5 1.00 4 0.75 3 0.50 EN 2 1 Output Voltage 0 −1 −2m 0 2m 4m 6m VIN = 5 V, COUT = 150 µF, RLOAD = 100 Ω, TPS2065C Output Current 1.00 0.75 4 EN 3 0.25 0.00 1 0.00 −0.25 0 −0.25 −1 −2m 7 6 1.25 6 Amplitude (V) 1.00 4 0.75 3 0.50 EN Output Voltage 1 0 −1 −2m 0 2m 4m Amplitude (V) 1.50 Current (A) 7 2 2m 4m −0.50 8m 10m 12m 14m 16m 18m 20m Time (s) 6m G002 Figure 10. TPS2065C Output Rise / Fall 100Ω 8 FLT 0 G001 9 Output Current 0.50 2 1.75 5 1.25 0.25 −0.50 8m 10m 12m 14m 16m 18m 20m Time (s) VIN = 5 V, COUT = 150 µF, RLOAD = 0 Ω, TPS2065C FLT 5 2.00 8 1.75 1.50 Output Voltage Figure 9. TPS2065C Output Rise / Fall 5Ω 9 2.00 Current (A) Output Current 7 2.00 2.00 VIN = 5 V, COUT = 150 µF, RLOAD = 50 mΩ, TPS2065C Output Current EN 1.80 1.50 1.20 1.00 5 4 FLT 0.75 3 0.50 0.25 2 0.25 0.00 1 0.00 −0.25 0 −0.50 6m 8m 10m 12m 14m 16m 18m Time (s) Figure 11. TPS2065C Enable into Output Short −1 −2.5m Current (A) VIN = 5 V, COUT = 150 µF, RLOAD = 5 Ω, TPS2065C Amplitude (V) 8 Current (A) 9 −0.25 Output Voltage 2.5m 7.5m G003 12.5m Time (s) 17.5m −0.50 22.5m25m G004 Figure 12. TPS2065C Pulsed Short Applied Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC 7 TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com 4u 30 6 VIN = 5 V, COUT = 0 µF, RLOAD = 50 mΩ, TPS2065C 4 15 3 VOUT 2 10 1 5 0 0 −1 −1u 0 1u 2u 3u 4u G006 Figure 14. TPS2065C Pulsed 1.45-A Load 2.00 9 8 2.0 VIN = 5 V, COUT = 150 µF, RLOAD = 7.5Ω, TPS2065C 1.75 1.50 1.0 3 IOUT 2 0.5 VOUT 1 0.0 Output Voltage 6 Amplitude (V) 1.5 Output Current (A) Output Voltage (V) 7 1.00 EN, VIN 4 0.75 0.50 3 FLT 2 −0.5 −1 −100u 0 100u 200u 300u Time (s) 400u 500u −1.0 600u −0.25 −1 −5m −4m −3m −2m −1m 0 1m Time (s) G007 2.00 7 1.50 6 1.25 5 1.00 FLT EN, VIN 4 2 0.75 0.50 3 1 0.00 0 −0.25 20m 30m 4m −0.50 5m G008 Output Current 7 3.2 2.8 2.4 FLT 2.0 1.6 5 1.2 0.8 3 EN 1 Output Voltage 0.4 0.0 −0.4 −0.50 40m −1 −2m 0 G009 Figure 17. TPS2065C Power Down - Enabled 8 3m VIN = 5 V, COUT = 150 µF, RLOAD = 2.5 Ω, TPS2001C 0.25 Output Current Output Voltage −1 −40m −30m −20m −10m 0 10m Time (s) 9 1.75 Amplitude (V) VIN = 5 V, COUT = 150 µF, RLOAD = 7.5Ω, TPS2065C 2m Figure 16. TPS2065C Power Up - Enabled Current (A) Amplitude (V) 8 0.00 0 Figure 15. TPS2065C 50 mΩ Short Circuit 9 0.25 Output Current 1 0 1.25 5 Current (A) VIN = 5 V, COUT = 0 µF, RLOAD = 50 mΩ, TPS2065C Current (A) 2.5 6 4 −5 Time (s) G005 Figure 13. TPS2065C Short Applied 5 20 IOUT Output Current (A) 25 5 Output Voltage (V) 26 24 22 20 18 16 14 12 10 8 6 4 2 0 Current (A) Voltage (V) TYPICAL CHARACTERISTICS (continued) 10 VIN = 5 V, COUT = 0 µF, TPS2065C 9 8 Input Voltage 7 6 5 4 3 Output Voltage 2 1 0 Output Current −1 −2 −3 −1u 0 1u 2u 3u Time (s) Submit Documentation Feedback 2m 4m 6m −0.8 8m 10m 12m 14m 16m 18m Time (s) G010 Figure 18. TPS2001C Turn ON into 2.5Ω Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) 5 EN FLT 8 2.8 7 2.4 6 2.0 1.6 3 1.2 2 Output Voltage 0.8 1 0.4 1 0 0.0 0 0 2m 4m −0.4 6m 8m 10m 12m 14m 16m 18m Time (s) Output Current 1.6 Output Voltage 3 FLT Output Current Output Voltage Amplitude (V) 6 FLT 5 −0.4 2.5m 5m 7.5m 10m 12.5m 15m 17.5m 20m 22.5m Time (s) G011 1.4 9 1.2 8 1.0 7 0.8 6 1.0 5 0.8 4 0.6 0.6 0.4 3 0.2 2 0.0 2 −0.2 1 −0.4 0 EN 0 −1 −2m 0 2m 4m −0.6 6m 8m 10m 12m 14m 16m 18m Time (s) 1.6 VIN = 5 V, COUT = 150 µF, RLOAD = 50 mΩ, TPS2051C 0.4 3 −1 −2m EN Output Voltage FLT Output Current 0 2m 0.8 5 0.6 EN 0.4 0.2 3 2 FLT 0.0 1 Output Voltage −0.2 −1 −2.5m 0 6m −0.4 8m 10m 12m 14m 16m 18m Time (s) VIN = 5 V, COUT = 150 µF, RLOAD = 3.3 Ω, TPS2069C G014 2.5 2.0 10 −0.6 2.5m 5m 7.5m 10m 12.5m 15m 17.5m 20m 22.5m Time (s) Figure 23. TPS2051C Pulsed Output Short 1.5 8 6 EN Output Current 1.0 0.5 4 0.0 2 FLT Output Voltage 0 −0.4 0 4m 1.0 6 4 12 1.2 Amplitude (V) Amplitude (V) 7 0.0 Figure 22. TPS2051C Enable into Short 1.4 VIN = 5 V, COUT = 150 µF, RLOAD = 50mΩ, TPS2051C 0.2 −0.2 G013 Current (A) 8 1.4 1.2 Output Current Figure 21. TPS2051C Turn ON into 10Ω 9 G012 Figure 20. TPS2001C Pulsed Output Short 4 1 0.4 0.0 −1 −2.5m 0 Amplitude (V) 7 VIN = 5 V, COUT = 150 µF, RLOAD = 10 Ω, TPS2051C 1.2 0.8 2 Current (A) 8 2.8 2.0 4 Figure 19. TPS2001C Enable into Short 9 3.2 2.4 EN 5 4 −1 −2m 3.6 VIN = 5 V, COUT = 150 µF, RLOAD = 50mΩ, TPS2001C Current (A) Amplitude (V) 6 9 3.2 Current (A) Output Current 7 3.6 Current (A) VIN = 5 V, COUT = 150 µF, RLOAD = 50 mΩ, TPS2001C Amplitude (V) 8 Current (A) 9 −2 −4m −2m G015 0 2m 4m −0.5 −1.0 6m 8m 10m 12m 14m 16m Time (s) G016 Figure 24. TPS2069CDGN Turn ON into 10Ω Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC 9 TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) 3.0 3.0 10 VIN = 5 V, COUT = 150 µF, RLOAD = 50 mΩ, TPS2069C Amplitude (V) 6 2.5 EN 2.0 1.5 4 1.0 2 FLT 0 −2 2.5 8 Amplitude (V) Output Current EN Current (A) 8 VIN = 5 V, COUT = 150 µF, RLOAD = 50 mΩ, TPS2069C 6 2.0 4 1.5 2 0.5 0 0.0 −2 0 2m 4m 6m 0.5 0.0 Output Voltage −0.5 8m 10m 12m 14m 16m 18m Time (s) 1.0 Output Current Output Voltage −4 −2m Current (A) 10 −4 −12.5m FLT −7.5m −2.5m 2.5m Time (s) G017 Figure 25. TPS2069CDGN Enable into Short −0.5 12.5m 7.5m G018 Figure 26. TPS2069CDGN Pulsed Output Short 9.3 14 VIN = 5 V All Versions, 5 V 85°C 12 IOUT sinking (mA) tFLT (ms) 9.2 9.1 9.0 25°C 10 8 −40°C 6 125°C 4 8.9 2 8.8 −40 −20 0 20 40 60 80 100 Junction Temperature (°C) 120 0 0.0 140 0.5 1.0 1.5 G019 Figure 27. Deglitch Period (tFLT) vs Temperature 2.0 2.5 3.0 3.5 Output Voltage (V) 4.0 4.5 5.0 5.5 G020 Figure 28. Output Discharge Current vs Output Voltage 3.5 7 VIN = 5 V 2-A Rated All Unit Types, 5 V 6 3.0 5 IOS (A) 2.0 IREV (µA) 1.5-A Rated 2.5 1-A Rated 1.5 0.5-A Rated 2 0 −20 0 20 40 60 80 100 Junction Temperature (°C) 120 140 −1 −40 G021 Figure 29. Short Circuit Current (IOS) vs Temperature 10 3 1 1.0 0.5 −40 4 −20 0 20 40 60 80 100 Junction Temperature (°C) 120 140 G022 Figure 30. Reverse Leakage Current (IREV) vs Temperature Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) 1.0 1.0 All Unit Types 0.8 0.8 0.6 0.6 0.4 0.2 0.0 0.0 −20 0 20 40 60 80 100 Junction Temperature (°C) 120 4.50 4.75 5.00 Input Voltage (V) All Unit Types, VIN = 5.5 V 70 65 60 55 50 −40 5.50 −20 0 G025 20 40 60 80 100 Junction Temperature (°C) 120 140 G026 Figure 34. Enabled Supply Current (ISE) vs Temperature 125°C COUT = 1 µF, RLOAD = 100 Ω 0.450 0.425 tf (ms) 65 60 55 0.400 1.5-A and 2-A Rated, VIN = 4.5 V 1.5-A and 2-A Rated, VIN = 5 V 0.375 1.5-A and 2-A Rated, VIN = 5.5 V 50 0.350 25°C 45 40 4.00 G024 75 0.475 85°C 5.50 80 80 75 5.25 Figure 32. Disabled Supply Current (ISD) vs Input Voltage Figure 33. Reverse Leakage Current (IREV) vs Output Voltage 70 −40°C and 25°C 4.25 G023 ISE (µA) 6.0 All unit types, VIN = 0 V 5.5 5.0 4.5 125°C 4.0 3.5 3.0 2.5 2.0 85°C 1.5 25°C −40°C 1.0 0.5 0.0 −0.5 4.00 4.25 4.50 4.75 5.00 5.25 Output Voltage (V) 85°C −0.2 4.00 140 Figure 31. Disabled Supply Current (ISD) vs Temperature IREV (µA) 0.4 0.2 −0.2 −40 ISE (µA) 125°C ISD (µA) ISD (µA) Input Voltage = 5.5 V −40°C 4.25 4.50 4.75 5.00 Input Voltage (V) 0.5-A and 1-A Rated, VIN = 5 V 5.25 5.50 0.325 −40 G027 Figure 35. Enabled Supply Current (ISE) vs Input Voltage −20 0 20 40 60 80 100 Junction Temperature (°C) 120 140 G028 Figure 36. Output Fall Time (tF) vs Temperature Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC 11 TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) 0.85 140 COUT = 1 µF, RLOAD = 100 Ω VIN = 5 V 130 1.5 A, 2 A, 5.5 V 0.80 120 0.70 0.65 0.60 0.5 A, 1 A, 5 V 100 90 80 70 1.5 A, 2 A, 5 V 1.5-A, 2-A Rated 60 1.5 A, 2 A, 4.5 V 0.55 0.50 −40 0.5-A, 1-A Rated 110 RDSON (mΩ) tr (ms) 0.75 50 −20 0 20 40 60 80 100 Junction Temperature (°C) 120 40 −40 140 −20 G029 Figure 37. Output Rise Time (tR) vs Temperature 0 20 40 60 80 100 Junction Temperature (°C) 120 140 G030 Figure 38. Input-Output Resistance (RDS(ON)) vs Temperature 100 Recovery Time (µs) VIN = 5 V, CIN = 730 µF, TPS2065C, IEND = 1.68 A IOS 10 1 0 5 10 15 IPK (Shorted) (A) 20 25 G031 Figure 39. Recovery Vs Current Peak 12 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com DETAILED DESCRIPTION The TPS20xxC are current-limited, power-distribution switches providing between 0.5 A and 2 A of continuous load current in 5 V circuits. These parts use N-channel MOSFETs for low resistance, maintaining voltage regulation to the load. They are designed for applications where short circuits or heavy capacitive loads will be encountered. Device features include enable, reverse blocking when disabled, output discharge pulldown, overcurrent protection, over-temperature protection, and deglitched fault reporting. UVLO The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turn-on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage drop from large current surges. FLT is high impedance when the TPS20xxC is in UVLO. ENABLE The logic enable input (EN, or EN), controls the power switch, bias for the charge pump, driver, and other circuits. The supply current is reduced to less than 1 µA when the TPS20xxC is disabled. Disabling the TPS20xxC will immediately clear an active FLT indication. The enable input is compatible with both TTL and CMOS logic levels. The turnon and turnoff times (tON, tOFF) are composed of a delay and a rise or fall time (tR, tF). The delay times are internally controlled. The rise time is controlled by both the TPS20xxC and the external loading (especially capacitance). The fall time is controlled by the TPS20xxC, the loading (R and C), and the output discharge (RPD). An output load consisting of only a resistor will experience a fall time set by the TPS20xxC. An output load with parallel R and C elements will experience a fall time determined by the (R × C) time constant if it is longer than the TPS20xxC’s tF. The enable should not be left open, and may be tied to VIN or GND depending on the device. INTERNAL CHARGE PUMP The device incorporates an internal charge pump and gate drive circuitry necessary to drive the N-channel MOSFET. The charge pump supplies power to the gate driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The driver incorporates circuitry that controls the rise and fall times of the output voltage to limit large current and voltage surges on the input supply, and provides built-in soft-start functionality. The MOSFET power switch will block current from OUT to IN when turned off by the UVLO or disabled. CURRENT LIMIT The TPS20xxC responds to overloads by limiting output current to the static IOS levels shown in the Electrical Characteristics table. When an overload condition is present, the device maintains a constant output current, with the output voltage determined by (IOS × RLOAD). Two possible overload conditions can occur. The first overload condition occurs when either: 1) input voltage is first applied, enable is true, and a short circuit is present (load which draws IOUT > IOS), or 2) input voltage is present and the TPS20xxC is enabled into a short circuit. The output voltage is held near zero potential with respect to ground and the TPS20xxC ramps the output current to IOS. The TPS20xxC will limit the current to IOS until the overload condition is removed or the device begins to thermal cycle. This is demonstrated in Figure 11 where the device was enabled into a short, and subsequently cycles current off and on as the thermal protection engages. The second condition is when an overload occurs while the device is enabled and fully turned on. The device responds to the overload condition within tIOS (Figure 6 and Figure 7) when the specified overload (per Electrical Characteristics table) is applied. The response speed and shape will vary with the overload level, input circuit, and rate of application. The current-limit response will vary between simply settling to IOS, or turnoff and controlled return to IOS. Similar to the previous case, the TPS20xxC will limit the current to IOS until the overload condition is removed or the device begins to thermal cycle. This is demonstrated by Figure 12, Figure 13, and Figure 14. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC 13 TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com The TPS20xxC thermal cycles if an overload condition is present long enough to activate thermal limiting in any of the above cases. This is due to the relatively large power dissipation [(VIN – VOUT) x IOS] driving the junction temperature up. The device turns off when the junction temperature exceeds 135°C (min) while in current limit. The device remains off until the junction temperature cools 20°C and then restarts. There are two kinds of current limit profiles typically available in TI switch products similar to the TPS20xxC. Many older designs have an output I vs V characteristic similar to the plot labeled "Current Limit with Peaking" in Figure 40. This type of limiting can be characterized by two parameters, the current limit corner (IOC), and the short circuit current (IOS). IOC is often specified as a maximum value. The TPS20xxC family of parts does not present noticeable peaking in the current limit, corresponding to the characteristic labeled "Flat Current Limit" in Figure 40. This is why the IOC parameter is not present in the Electrical Characteristics tables. Current Limit with Peaking Flat Current Limit VIN Decreasing Load Resistance Decreasing Load Resistance Slope = -RDS(ON) VOUT VO UT Slope = -RDS(ON) VIN 0V 0V 0A IOUT IOS IOC 0A IOUT I OS Figure 40. Current Limit Profiles FLT The FLT open-drain output is asserted (active low) during an overload or over-temperature condition. A 9 ms deglitch on both the rising and falling edges avoids false reporting at startup and during transients. A current limit condition shorter than the deglitch period will clear the internal timer upon termination. The deglitch timer will not integrate multiple short overloads and declare a fault. This is also true for exiting from a faulted state. An input voltage with excessive ripple and large output capacitance may interfere with operation of FLT around IOS as the ripple will drive the TPS20xxC in and out of current limit. If the TPS20xxC is in current limit and the over-temperature circuit goes active, FLT will go true immediately (see Figure 12) however exiting this condition is deglitched (see Figure 14). FLT is tripped just as the knee of the constant-current limiting is entered. Disabling the TPS20xxC will clear an active FLT as soon as the switch turns off (see Figure 11). FLT is high impedance when the TPS20xxC is disabled or in under-voltage lockout (UVLO). OUTPUT DISCHARGE A 470Ω (typical) output discharge will dissipate stored charge and leakage current on OUT when the TPS20xxC is in UVLO or disabled. The pull-down circuit will lose bias gradually as VIN decreases, causing a rise in the discharge resistance as VIN falls towards 0 V. 14 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com APPLICATION INFORMATION INPUT AND OUTPUT CAPACITANCE Input and output capacitance improves the performance of the device; the actual capacitance should be optimized for the particular application. For all applications, a 0.1 µF or greater ceramic bypass capacitor between IN and GND is recommended as close to the device as possible for local noise decoupling. All protection circuits such as the TPS20xxC will have the potential for input voltage overshoots and output voltage undershoots. Input voltage overshoots can be caused by either of two effects. The first cause is an abrupt application of input voltage in conjunction with input power bus inductance and input capacitance when the IN terminal is high impedance (before turn on). Theoretically, the peak voltage is 2 times the applied. The second cause is due to the abrupt reduction of output short circuit current when the TPS20xxC turns off and energy stored in the input inductance drives the input voltage high. Input voltage droops may also occur with large load steps and as the TPS20xxC output is shorted. Applications with large input inductance (e.g. connecting the evaluation board to the bench power-supply through long cables) may require large input capacitance reduce the voltage overshoot from exceeding the absolute maximum voltage of the device. The fast current-limit speed of the TPS20xxC to hard output short circuits isolates the input bus from faults. However, ceramic input capacitance in the range of 1µF to 22µF adjacent to the TPS20xxC input aids in both speeding the response time and limiting the transient seen on the input power bus. Momentary input transients to 6.5V are permitted. Output voltage undershoot is caused by the inductance of the output power bus just after a short has occurred and the TPS20xxC has abruptly reduced OUT current. Energy stored in the inductance will drive the OUT voltage down and potentially negative as it discharges. Applications with large output inductance (such as from a cable) benefit from use of a high-value output capacitor to control the voltage undershoot. When implementing USB standard applications, a 120 µF minimum output capacitance is required. Typically a 150 µF electrolytic capacitor is used, which is sufficient to control voltage undershoots. However, if the application does not require 120 µF of capacitance, and there is potential to drive the output negative, a minimum of 10 µF ceramic capacitance on the output is recommended. The voltage undershoot should be controlled to less than 1.5 V for 10 µs. POWER DISSIPATION AND JUNCTION TEMPERATURE It is good design practice to estimate power dissipation and maximum expected junction temperature of the TPS20xxC. The system designer can control choices of package, proximity to other power dissipating devices, and printed circuit board (PCB) design based on these calculations. These have a direct influence on maximum junction temperature. Other factors, such as airflow and maximum ambient temperature, are often determined by system considerations. It is important to remember that these calculations do not include the effects of adjacent heat sources, and enhanced or restricted air flow. Addition of extra PCB copper area around these devices is recommended to reduce the thermal impedance and maintain the junction temperature as low as practical. The lower junction temperatures achieved by soldering the pad improve the efficiency and reliability of both TPS20xxC parts and the system. The following examples were used to determine the θJACustom thermal impedances noted in the THERMAL INFORMATION table. They were based on use of the JEDEC high-k circuit board construction (2 signal and 2 plane) with 4, 1oz. copper weight, layers. While it is recommended that the DGN package PAD be soldered to circuit board copper fill and vias for low thermal impedance, there may be cases where this is not desired. For example, use of routing area under the IC. The TPS20xxC will operate properly with the pad not connected to GND. θJA for a 4 layer board with the pad not soldered is approximately 141°C/W for the 0.5-A and 1-A rated parts and 139°C/W for the 1.5-A and 2-A rated parts. These values may be used in Equation 1 below to determine the maximum junction temperature. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC 15 TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 GND: 0.052in2 Total & 3 x 0.018in vias www.ti.com GND: 0.056in2 total area & 3 x 0.018in vias COUT COUT 0.050in trace CIN 0.050in trace CIN 4 x 0.01in vias 2 2 VIN : 0.00925in VOUT: 0.041in total & 3 x 0.018in vias Figure 41. DBV Package PCB Layout Example 0.100 x 0.175 & 5 18 mil vias 0.185 x 0.045 & 3 18 mil vias VIN: 0.0145in2 area & 2 x 0.018in vias VOUT: 0.048in2 total area 5 x 0.01in vias Figure 42. DGN Package PCB Layout Example 0.08 x 0.250 0.15 x 0.15 50 mil trace 0.100 x 0.060 & 3 18 mil vias to inner plane 2 0.07 x 0.08 10 mil trace 10 mil trace Figure 43. DGK Package PCB Layout Example The following procedure requires iteration because power loss is due to the internal MOSFET I2 × RDS(ON), and RDS(ON) is a function of the junction temperature. As an initial estimate, use the RDS(ON) at 125°C from the TYPICAL CHARACTERISTICS, and the preferred package thermal resistance for the preferred board construction from the THERMAL INFORMATION table. TJ = TA + ((IOUT2 x RDS(ON)) x θJA) (1) Where: IOUT = rated OUT pin current (A) RDS(ON) = Power switch on-resistance at an assumed TJ (Ω) TA = Maximum ambient temperature (°C) TJ = Maximum junction temperature (°C) θJA = Thermal resistance (°C/W) If the calculated TJ is substantially different from the original assumption, estimate a new value of RDS(ON) using the typical characteristic plot and recalculate. If the resulting TJ is not less than 125°C, try a PCB construction and/or package with lower θJA . 16 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC TPS20xxC SLVSAU6C – JUNE 2011 – REVISED OCTOBER 2011 www.ti.com REVISION HISTORY Changes from Original (June 2011) to Revision A Page • Changed the TPS2051C, TPS2065C, and TPS2069C Devices Status From: Preview To: Active ...................................... 1 • Corrected pinout numbers for the 5-PIN PACKAGE ............................................................................................................ 6 Changes from Revision A (July 2011) to Revision B Page • Added the DGK Package Information throughout the data sheet ........................................................................................ 1 • Changed title of Figure 15 From: NEW FIG To: TPS2065C 50 Ω Short Circuit ................................................................... 8 Changes from Revision B (September 2011) to Revision C Page • Changed TPS2000C (MSOP-8) status From: Preview To: Active in Table 1 ...................................................................... 1 • Changed From: PXF1 To: PXFI and From: PSG1 To: PXGI in the DEVICE INFORMATION table MOSP-8 (DGK) column .................................................................................................................................................................................. 2 • Changed the θJACustom 2 A Rated DGK value from N/A to 110.3 .................................................................................... 2 • Added Figure 43 - DGK Package PCB Layout Example .................................................................................................... 16 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS20xxC 17 PACKAGE OPTION ADDENDUM www.ti.com 25-Nov-2011 PACKAGING INFORMATION Orderable Device (1) Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) TPS2000CDGK ACTIVE MSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR TPS2000CDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR TPS2000CDGN ACTIVE MSOPPowerPAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2000CDGNR ACTIVE MSOPPowerPAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2001CDGK ACTIVE MSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR TPS2001CDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR TPS2001CDGN ACTIVE MSOPPowerPAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2001CDGNR ACTIVE MSOPPowerPAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2051CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2051CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2065CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2065CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2065CDGN ACTIVE MSOPPowerPAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2065CDGNR ACTIVE MSOPPowerPAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2069CDGN ACTIVE MSOPPowerPAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS2069CDGNR ACTIVE MSOPPowerPAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR The marketing status values are defined as follows: Addendum-Page 1 Samples (Requires Login) PACKAGE OPTION ADDENDUM www.ti.com 25-Nov-2011 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 24-Nov-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS2000CDGKR MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2000CDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 TPS2000CDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2001CDGKR MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2001CDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 TPS2001CDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2051CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS2065CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS2065CDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 TPS2065CDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 24-Nov-2011 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS2069CDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2069CDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2000CDGKR MSOP DGK 8 2500 366.0 364.0 50.0 TPS2000CDGNR MSOP-PowerPAD DGN 8 2500 370.0 355.0 55.0 TPS2000CDGNR MSOP-PowerPAD DGN 8 2500 360.0 162.0 98.0 TPS2001CDGKR MSOP DGK 8 2500 366.0 364.0 50.0 TPS2001CDGNR MSOP-PowerPAD DGN 8 2500 370.0 355.0 55.0 TPS2001CDGNR MSOP-PowerPAD DGN 8 2500 360.0 162.0 98.0 TPS2051CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS2065CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS2065CDGNR MSOP-PowerPAD DGN 8 2500 370.0 355.0 55.0 TPS2065CDGNR MSOP-PowerPAD DGN 8 2500 360.0 162.0 98.0 TPS2069CDGNR MSOP-PowerPAD DGN 8 2500 360.0 162.0 98.0 TPS2069CDGNR MSOP-PowerPAD DGN 8 2500 370.0 355.0 55.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Audio www.ti.com/audio Communications and Telecom www.ti.com/communications Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps DLP® Products www.dlp.com Energy and Lighting www.ti.com/energy DSP dsp.ti.com Industrial www.ti.com/industrial Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical Interface interface.ti.com Security www.ti.com/security Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Power Mgmt power.ti.com Transportation and Automotive www.ti.com/automotive Microcontrollers microcontroller.ti.com Video and Imaging RFID www.ti-rfid.com OMAP Mobile Processors www.ti.com/omap Wireless Connectivity www.ti.com/wirelessconnectivity TI E2E Community Home Page www.ti.com/video e2e.ti.com Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2011, Texas Instruments Incorporated