SN54AC00-DIE www.ti.com SCHS391 – APRIL 2013 RAD-TOLERANT, QUADRUPLE 2-INPUT POSITIVE-NAND GATE Check for Samples: SN54AC00-DIE FEATURES 1 • • • 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 7 ns at 5 V DESCRIPTION/ORDERING INFORMATION The SN54AC00-DIE device contains four independent 2-input NAND gates. Each gate performs the Boolean function of Y = A • B or Y = A + B in positive logic. ORDERING INFORMATION (1) (1) (2) PRODUCT PACKAGE DESIGNATOR PACKAGE SN54AC00 TD Bare die in waffle pack (2) ORDERABLE PART NUMBER PACKAGE QUANTITY SN54AC00VTD1 100 SN54AC00VTD2 10 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Processing is per the Texas Instruments space production baseline and is in compliance with the Texas Instruments Quality Control System in effect at the time of manufacture. Electrical screening consists of DC parametric and functional testing at room temperature only. Unless otherwise specified by Texas Instruments AC performance and performance over temperature is not warranted. Visual Inspection is performed in accordance with MIL-STD-883 Test Method 2010 Condition B at 75X minimum. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. SN54AC00-DIE SCHS391 – APRIL 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. BARE DIE INFORMATION 2 DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD METALLIZATION COMPOSITION BOND PAD THICKNESS 10.5 mils. Silicon with backgrind Floating AlCuTiW 830 nm Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: SN54AC00-DIE SN54AC00-DIE www.ti.com SCHS391 – APRIL 2013 Table 1. Bond Pad Coordinates in Microns DESCRIPTION PAD NUMBER X MIN Y MIN X MAX Y MAX 1A 1 42 201.9 137.4 297.3 1B 2 239.7 42 335.1 137.4 1Y 3 447.6 42 543 137.4 2A 4 636 42 731.4 137.4 2B 5 843.6 42 939 137.4 2Y 6 979.8 224.7 1075.2 320.1 GND 7 979.8 429.9 1075.2 525.3 3Y 8 979.8 656.7 1075.2 752.1 3A 9 850.5 839.4 945.9 934.8 3B 10 642.9 839.4 738.3 934.8 4Y 11 444.9 839.4 540.3 934.8 4A 12 249.6 839.4 345 934.8 4B 13 42 694.5 137.4 789.9 VCC 14 42 359.4 137.4 454.8 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: SN54AC00-DIE 3 PACKAGE OPTION ADDENDUM www.ti.com 30-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) 5962-87549012A ACTIVE LCCC FK 20 1 TBD Call TI Call TI -55 to 125 596287549012A SNJ54 AC00FK 5962-8754901CA ACTIVE CDIP J 14 1 TBD Call TI Call TI -55 to 125 5962-8754901CA SNJ54AC00J 5962-8754901DA ACTIVE CFP W 14 1 TBD Call TI Call TI -55 to 125 5962-8754901DA SNJ54AC00W SN54AC00VTD1 ACTIVE 0 100 TBD Call TI N / A for Pkg Type SN54AC00VTD2 ACTIVE 0 10 TBD Call TI N / A for Pkg Type SNJ54AC00FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 596287549012A SNJ54 AC00FK SNJ54AC00J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8754901CA SNJ54AC00J SNJ54AC00W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8754901DA SNJ54AC00W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com (3) 30-Apr-2013 MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. 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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54AC00 : • Catalog: SN74AC00 • Space: SN54AC00-SP NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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