UC1843-DIE www.ti.com SLUSBN6 – JULY 2013 CURRENT MODE PWM CONTROLLER Check for Samples: UC1843-DIE FEATURES 1 • • • • Optimized For Off-line and DC-to-DC Converters Low Start-Up Current Automatic Feed Forward Compensation Pulse-by-Pulse Current Limiting • • • • • Enhanced Load Response Characteristics Under-Voltage Lockout With Hysteresis Double Pulse Suppression High Current Totem Pole Output Low RO Error Amp DESCRIPTION The UC1843-DIE provides the necessary features to implement off-line or dc-to-dc fixed frequency current mode control schemes with a minimal external parts count. Internally implemented circuits include under-voltage lockout featuring start up current, logic to insure latched operation, a PWM comparator which also provides current limit control, and a totem pole output stage designed to source or sink high peak current. The output stage, suitable for driving N-Channel MOSFETs, is low in the off state. ORDERING INFORMATION (1) (1) (2) PRODUCT PACKAGE DESIGNATOR PACKAGE UC1843 TD Bare die in waffle pack (2) ORDERABLE PART NUMBER PACKAGE QUANTITY UC1843TD1 154 UC1843TD2 10 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Processing is per the Texas Instruments commercial production baseline and is in compliance with the Texas Instruments Quality Control System in effect at the time of manufacture. Electrical screening consists of DC parametric and functional testing at room temperature only. Unless otherwise specified by Texas Instruments AC performance and performance over temperature is not warranted. Visual Inspection is performed in accordance with MIL-STD-883 Test Method 2010 Condition B at 75X minimum. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated UC1843-DIE SLUSBN6 – JULY 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. BARE DIE INFORMATION DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD METALLIZATION COMPOSITION BOND PAD THICKNESS 10.5 mils. Silicon with backgrind Floating AlCu2% 2000 nm a c b d Origin Table 1. BOND PAD COORDINATES (in Mils) 2 DESCRIPTION PAD NUMBER a b c d COMP 1 78.70 63.40 82.90 67.60 VFB 2 70.60 63.40 74.80 67.60 ISENSE 3 39.40 63.40 43.60 67.60 RT/CT 4 18.60 61.20 22.60 65.60 GROUND 5 17.80 11.70 22.00 15.90 GROUND 6 17.40 3.90 21.80 8.10 OUTPUT 7 32.60 6.40 36.80 10.60 VCC 8 47.50 6.40 51.70 10.60 VCC 9 54.60 6.40 58.80 10.60 VREF 10 68.70 6.40 72.90 10.60 NC TESTPAD 87.10 6.30 90.80 10.30 NC TESTPAD 87.10 12.60 90.80 16.60 NC TESTPAD 87.10 18.00 90.80 22.00 NC TESTPAD 87.10 24.30 90.80 28.30 NC TESTPAD 87.10 30.60 90.80 34.60 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: UC1843-DIE PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) UC1843TD1 ACTIVE 0 154 TBD Call TI N / A for Pkg Type UC1843TD2 ACTIVE 0 10 TBD Call TI N / A for Pkg Type (4/5) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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