TI TPS796XX_08

TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
ULTRALOW-NOISE, HIGH PSRR, FAST, RF, 1A
LOW-DROPOUT LINEAR REGULATORS
FEATURES
DESCRIPTION
1
• 1A Low-Dropout Regulator With Enable
• Available in Fixed and Adjustable (1.2V to
5.5V) Versions
• High PSRR (53dB at 10kHz)
• Ultralow-Noise (40µVRMS, TPS79630)
• Fast Start-Up Time (50µs)
• Stable With a 1µF Ceramic Capacitor
• Excellent Load/Line Transient Response
• Very Low Dropout Voltage (250mV at Full
Load, TPS79630)
• 3 × 3 SON PowerPAD™, SOT223-6, and
DDPAK-5 Packages
The TPS796xx family of low-dropout (LDO)
low-power linear voltage regulators features high
power supply rejection ratio (PSRR), ultralow-noise,
fast start-up, and excellent line and load transient
responses in small outline, 3 × 3 SON, SOT223-6,
and DDPAK-5 packages. Each device in the family is
stable with a small 1µF ceramic capacitor on the
output. The family uses an advanced, proprietary
BiCMOS fabrication process to yield extremely low
dropout voltages (for example, 250mV at 1A). Each
device achieves fast start-up times (approximately
50µs with a 0.001µF bypass capacitor) while
consuming very low quiescent current (265 µA
typical). Moreover, when the device is placed in
standby mode, the supply current is reduced to less
than 1µA. The TPS79630 exhibits approximately
40µVRMS of output voltage noise at 3.0V output, with
a 0.1µF bypass capacitor. Applications with analog
components that are noise sensitive, such as portable
RF electronics, benefit from the high PSRR, low
noise features, and the fast response time.
234
APPLICATIONS
RF: VCOs, Receivers, ADCs
Audio
Bluetooth™, Wireless LAN
Cellular and Cordless Telephones
Handheld Organizers, PDAs
DRB PACKAGE
3mm x 3mm SON
(TOP VIEW)
EN
IN
GND
OUT
NR/FB
IN 1
IN 2
OUT 3
OUT 4
1
2
3
4
5
8 EN
7 NC
80
0.7
70
5 NR/FB
IOUT = 1 mA
60
6
GND
KTT (DDPAK) PACKAGE
(TOP VIEW)
EN
IN
GND
OUT
NR/FB
TPS79630
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
6 GND
1
2
3
4
5
Ripple Rejection − dB
DQC PACKAGE
SOT223-6
(TOP VIEW)
TPS79630
RIPPLE REJECTION
vs
FREQUENCY
50
Output Spectral Noise Density - mV/ÖHz
•
•
•
•
•
VIN = 4 V
COUT = 10 mF
CNR = 0.01 mF
IOUT = 1 A
40
30
20
10
0
1
10
100
1k
10k 100k
Frequency (Hz)
1M
10M
0.6
VIN = 5.5 V
COUT = 2.2 mF
CNR = 0.1 mF
0.5
0.4
0.3
IOUT = 1 mA
0.2
0.1
IOUT = 1.5 A
0.0
100
1k
10k
100k
Frequency (Hz)
1
2
3
4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments Inc.
Bluetooth is a trademark of Bluetooth SIG, Inc.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2008, Texas Instruments Incorporated
TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
VOUT (2)
PRODUCT
TPS796xxyyyz
(1)
(2)
XX is nominal output voltage (for example, 28 = 2.8V, 01 = Adjustable).
YYY is package designator.
Z is package quantity.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Output voltages from 1.3V to 4.9V in 100mV increments are available; minimum order quantities may apply. Contact factory for details
and availability.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating temperature range (unless otherwise noted).
UNIT
VIN range
–0.3V to 6V
VEN range
–0.3V to VIN + 0.3V
VOUT range
6V
Peak output current
Internally limited
ESD rating, HBM
2kV
ESD rating, CDM
500V
Continuous total power dissipation
See Dissipation Ratings Table
Junction temperature range, TJ
–40°C to +150°C
Storage temperature range, Tstg
–65°C to +150°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
PACKAGE DISSIPATION RATINGS
PACKAGE
(1)
(2)
2
BOARD
(1)
RθJC
RθJA
DDPAK
High-K
2°C/W
23°C/W
SOT223
Low-K (2)
15°C/W
53°C/W
3 × 3 SON
High-K (1)
1.2°C/W
40°C/W
The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch × 3-inch (7,5-cm × 7,5-cm), multilayer board with 1-ounce
internal power and ground planes and 2-ounce copper traces on top and bottom of the board.
The JEDEC low-K (1s) board design used to derive this data was a 3-inch × 3-inch (7,5-cm × 7,5-cm), two-layer board with 2-ounce
copper traces on top of the board.
Submit Documentation Feedback
Copyright © 2002–2008, Texas Instruments Incorporated
TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
ELECTRICAL CHARACTERISTICS
Over recommended operating temperature range (TJ = –40°C to +125°C), VEN = VIN,, VIN = VOUT(nom) + 1 V (1), IOUT = 1mA,
COUT = 10µF, and CNR = 0.01µF, unless otherwise noted. Typical values are at +25°C.
PARAMETER
TEST CONDITIONS
VIN Input voltage (1)
Output
TPS79601
voltage range
MAX
UNIT
5.5
V
1.250
V
0
1
A
1.225
5.5 – VDD
V
1.02VOUT
V
1.200
IOUT Continuous output current
Accuracy
TYP
2.7
VFB Internal reference (TPS79601)
Output
voltage
MIN
1.225
TPS79601 (2)
0µA ≤ IOUT ≤ 1A, VOUT + 1V ≤ VIN ≤ 5.5V (1)
0.98VOUT
Fixed
VOUT < 5V
0µA ≤ IOUT ≤ 1A, VOUT + 1V ≤ VIN ≤ 5.5V (1)
–2.0
+2.0
%
Fixed
VOUT = 5V
0µA ≤ IOUT ≤ 1A, VOUT + 1V ≤ VIN ≤ 5.5V (1)
–3.0
+3.0
%
0.12
%/V
Output voltage line regulation
(ΔVOUT%/VIN) (1)
VOUT + 1V ≤ VIN ≤ 5.5V
Load regulation (ΔVOUT%/ΔIOUT)
0µA ≤ IOUT ≤ 1A
TPS79628
IOUT = 1A
TPS79628DRB
IOUT = 250mA
Dropout voltage (3)
TPS79630
(VIN = VOUT (nom) – 0.1V)
TPS79633
TPS79650
VOUT
0.05
5
270
mV
365
52
90
IOUT = 1A
250
345
IOUT = 1A
220
325
200
300
IOUT = 1A
Output current limit
VOUT = 0V
4.2
A
Ground pin current
0µA ≤ IOUT ≤ 1A
265
385
µA
Shutdown current (4)
VEN = 0V, 2.7V ≤ VIN ≤ 5.5V
0.07
1
µA
FB pin current
VFB = 1.225V
1
µA
Power-supply ripple
rejection
TPS79630
2.4
mV
f = 100Hz, IOUT = 10mA
59
f = 100Hz, IOUT = 1A
54
f = 10Hz, IOUT = 1A
53
f = 100Hz, IOUT = 1A
Output noise voltage (TPS79630)
Time, start-up (TPS79630)
BW = 100Hz to 100kHz,
IOUT = 1A
RL = 3Ω, COUT = 1µF
42
CNR = 0.001µF
54
CNR = 0.0047µF
46
CNR = 0.01µF
41
CNR = 0.1µF
40
CNR = 0.001µF
50
CNR = 0.0047µF
VEN = 0V
UVLO threshold
VCC rising
µVRMS
µs
75
CNR = 0.01µF
EN pin current
dB
110
–1
1
2.25
2.65
UVLO hysteresis
100
µA
V
mV
High-level enable input voltage
2.7V ≤ VIN ≤ 5.5V
1.7
VIN
V
Low-level enable input voltage
2.7V ≤ VIN ≤ 5.5V
0
0.7
V
(1)
(2)
(3)
(4)
Minimum VIN = VOUT + VDO or 2.7V, whichever is greater. TPS79650 is tested at VIN = 5.5V.
Tolerance of external resistors not included in this specification.
VDO is not measured for TPS79618 and TPS79625 because minimum VIN = 2.7V.
For adjustable version, this applies only after VIN is applied; then VEN transitions high to low.
Copyright © 2002–2008, Texas Instruments Incorporated
Submit Documentation Feedback
3
TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION
IN
OUT
Current
Sense
UVLO
SHUTDOWN
ILIM
_
GND
R1
+
FB
EN
UVLO
R2
Thermal
Shutdown
Quickstart
Bandgap
Reference
1.225 V
VIN
250 kΩ
External to
the Device
VREF
FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION
IN
OUT
UVLO
Current
Sense
GND
SHUTDOWN
ILIM
_
EN
R1
+
UVLO
Thermal
Shutdown
R2
Quickstart
VIN
Bandgap
Reference
1.225 V
R2 = 40k
250 kΩ
VREF
NR
Table 1. Terminal Functions
TERMINAL
NAME
4
SOT223
(DCQ)
DDPAK
(KTT)
SON
(DRB)
DESCRIPTION
NR
5
5
Connecting an external capacitor to this pin bypasses noise generated by the internal
bandgap. This improves power-supply rejection and reduces output noise.
FB
5
5
This terminal is the feedback input voltage for the adjustable device.
EN
1
8
Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator
into shutdown mode. EN can be connected to IN if not used.
GND
3, Tab
IN
2
1, 2
Unregulated input to the device.
OUT
4
3, 4
Output of the regulator.
6, PowerPAD Regulator ground
Submit Documentation Feedback
Copyright © 2002–2008, Texas Instruments Incorporated
TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
TYPICAL CHARACTERISTICS
TPS79630
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
TPS79628
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
TPS79628
GROUND CURRENT
vs
JUNCTION TEMPERATURE
2.795
4
3.05
VIN = 4 V
COUT = 10 µF
TJ = 25°C
3.04
3.03
350
VIN = 3.8 V
COUT = 10 µF
IOUT = 1 mA
3
2.790
3.02
330
VOUT (V)
3.00
2.99
2.98
IGND (µA)
3.01
VOUT (V)
VIN = 3.8 V
COUT = 10 µF
340
2
2.785
IOUT = 1 A
320
IOUT = 1 A
310
1
2.780
IOUT = 1 mA
2.97
300
2.96
2.95
0.2
0.4
0.6
0.8
0
2.775
−40 −25 −10 5
1.0
20 35 50 65 80 95 110 125
TJ (°C)
TJ (°C)
Figure 1.
Figure 2.
Figure 3.
TPS79630
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
TPS79630
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
TPS79630
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
0.7
0.6
0.6
0.5
0.4
0.3
IOUT = 1 mA
0.2
0.1
IOUT = 1.5 A
0.0
100
1k
10k
2.5
VIN = 5.5 V
COUT = 10 µF
CNR = 0.1 µF
0.5
0.4
IOUT = 1 mA
0.3
0.2
IOUT = 1 A
0.1
0.0
100
100k
Output Spectral Noise Density − µV//Hz
VIN = 5.5 V
COUT = 2.2 µF
CNR = 0.1 µF
Frequency (Hz)
1k
10k
CNR = 0.01 µF
CNR = 0.1 µF
1.5
CNR = 0.0047 µF
1.0
CNR = 0.001 µF
0.5
0.0
100
100k
VIN = 5.5 V
COUT = 10 µF
IOUT = 1 A
1k
10k
Figure 5.
Figure 6.
TPS79630
ROOT MEAN SQUARED OUTPUT
NOISE
vs
BYPASS CAPACITANCE
TPS79628
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
TPS79630
RIPPLE REJECTION
vs
FREQUENCY
350
300
50
80
VIN = 2.7 V
COUT = 10 µF
70
IOUT = 1 A
40
20
200
150
100
IOUT = 250 mA
COUT = 10 µF
BW = 100 Hz to 100 kHz
0
0.001 µF
0.0047 µF
0.01 µF
50
0.1 µF
CNR (µF)
Figure 7.
Copyright © 2002–2008, Texas Instruments Incorporated
IOUT = 250 mA
0
−40−25 −10 5 20 35 50 65 80 95 110 125
TJ (_C)
Figure 8.
IOUT = 1 mA
60
Ripple Rejection − dB
250
30
100k
Frequency (Hz)
Figure 4.
60
10
2.0
Frequency (Hz)
VDO (mV)
RMS − Root Mean Squared Output Noise − µVRMS
290
−40 −25 −10 5
20 35 50 65 80 95 110 125
IOUT (A)
Output Spectral Noise Density − µV//Hz
Output Spectral Noise Density − µV//Hz
0.0
50
VIN = 4 V
COUT = 10 µF
CNR = 0.01 µF
IOUT = 1 A
40
30
20
10
0
1
10
100
1k
10k 100k
1M
10M
Frequency (Hz)
Figure 9.
Submit Documentation Feedback
5
TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
TYPICAL CHARACTERISTICS (continued)
TPS79630
RIPPLE REJECTION
vs
FREQUENCY
TPS79630
RIPPLE REJECTION
vs
FREQUENCY
80
VIN = 4 V
COUT = 10 µF
CNR = 0.1 µF
60
50
Ripple Rejection − dB
IOUT = 1 mA
VIN = 4 V
COUT = 2.2 µF
CNR = 0.01 µF
70
IOUT = 1 A
40
30
20
IOUT = 1 mA
60
VIN = 4 V,
COUT = 10 µF,
IOUT = 1.0 A
2.75
2.50
IOUT = 1 A
40
30
Enable
CNR =
0.001 µF
2
50
CNR =
0.0047 µF
2.25
VOUT (V)
70
Ripple Rejection − dB
START-UP TIME
3
80
1.75
1.50
CNR =
0.01 µF
1.25
1
20
10
10
0
0
0.75
0.50
0.25
100
1k
10k 100k
10M
1M
0
1
10
100
1k
10M
300
400
500
600
Figure 10.
Figure 11.
Figure 12.
TPS79618
LINE TRANSIENT RESPONSE
TPS79630
LINE TRANSIENT RESPONSE
TPS79628
LOAD TRANSIENT RESPONSE
1
3
dv
1V
+
ms
dt
IOUT = 1 A
COUT = 10 µF
CNR = 0.01 µF
IOUT (A)
5
4
IOUT = 1 A
COUT = 10 µF
CNR = 0.01 µF
3
∆VOUT (mV)
0
−20
dv
1V
+
ms
dt
150
20
0
−20
−40
0
20 40 60 80 100 120 140 160 180 200
0
−1
∆VOUT (mV)
40
20
20 40 60 80 100 120 140 160 180 200
VIN = 3.8 V
COUT = 10 µF
CNR = 0.01 µF
di
1A
+
ms
dt
75
0
−75
−150
0
100 200 300 400 500 600 700 800 900 1000
t (µs)
t (µs)
t (µs)
Figure 13.
Figure 14.
Figure 15.
TPS79625
POWER UP/POWER DOWN
TPS79630
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
TPS79601
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
300
350
4.0
VOUT = 2.5 V
RL = 10 Ω
CNR = 0.01 µF
3.0
200
t (ms)
4
3.5
100
Frequency (Hz)
2
0
0
Frequency (Hz)
−40
300
250
TJ = 125°C
TJ = 125°C
250
2.5
2.0
200
VDO (mV)
200
VDO (mV)
500 mV/Div
1M
6
40
TJ = 25°C
150
1.5
VIN
100
VOUT
0.5
2
3
4
5
6
7
8
9
10
200 µs/Div
Figure 16.
Submit Documentation Feedback
IOUT = 1 A
COUT = 10 µF
CNR = 0.01 µF
50
0
1
TJ = −40°C
TJ = −40°C
50
0
0
TJ = 25°C
150
100
1.0
6
10k 100k
5
2
∆VOUT (mV)
10
VIN (V)
VIN (V)
1
0
0 100 200 300 400 500 600 700 800 9001000
IOUT (mA)
Figure 17.
2.5
3.0
3.5
4.0
4.5
5.0
VIN (V)
Figure 18.
Copyright © 2002–2008, Texas Instruments Incorporated
TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
TYPICAL CHARACTERISTICS (continued)
TPS79630
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE
(ESR)
vs
OUTPUT CURRENT
100
COUT = 1 µF
Region of
Instability
10
1
Region of Stability
0.1
ESR − Equivalent Series Resistance − Ω
ESR − Equivalent Series Resistance − Ω
100
0.01
COUT = 2.2 µF
Region of
Instability
10
1
Region of Stability
0.1
0.01
1
10
30
60
125 250 500 750 1000
IOUT (mA)
Figure 19.
Copyright © 2002–2008, Texas Instruments Incorporated
TPS79630
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE
(ESR)
vs
OUTPUT CURRENT
ESR − Equivalent Series Resistance − Ω
TPS79630
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE
(ESR)
vs
OUTPUT CURRENT
100
COUT = 10.0 µF
Region of
Instability
10
1
Region of Stability
0.1
0.01
1
10
30
60
125 250 500 750 1000
IOUT (mA)
Figure 20.
1
10
30
60
125 250 500 750 1000
IOUT (mA)
Figure 21.
Submit Documentation Feedback
7
TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
APPLICATION INFORMATION
The TPS796xx family of low-dropout (LDO) regulators
has been optimized for use in noise-sensitive
equipment. The device features extremely low
dropout voltages, high PSRR, ultralow output noise,
low quiescent current (265µA typically), and enable
input to reduce supply currents to less than 1µA
when the regulator is turned off.
A typical application circuit is shown in Figure 22.
VIN
IN
VOUT
OUT
TPS796xx
2.2µF
EN
GND
1 µF
NR
0.01µF
Figure 22. Typical Application Circuit
External Capacitor Requirements
Although not required, it is good analog design
practice to place a 0.1µF to 2.2µF capacitor near the
input of the regulator to counteract reactive input
sources. A 2.2µF or larger ceramic input bypass
capacitor, connected between IN and GND and
located close to the TPS796xx, is required for stability
and improves transient response, noise rejection, and
ripple rejection. A higher-value input capacitor may be
necessary if large, fast-rise-time load transients are
anticipated and the device is located several inches
from the power source.
Like most low dropout regulators, the TPS796xx
requires an output capacitor connected between OUT
and GND to stabilize the internal control loop. The
minimum recommended capacitor is 1µF. Any 1µF or
larger ceramic capacitor is suitable.
The internal voltage reference is a key source of
noise in an LDO regulator. The TPS796xx has an NR
pin which is connected to the voltage reference
through a 250kΩ internal resistor. The 250kΩ internal
resistor, in conjunction with an external bypass
capacitor connected to the NR pin, creates a
low-pass filter to reduce the voltage reference noise
and, therefore, the noise at the regulator output. In
order for the regulator to operate properly, the current
flow out of the NR pin must be at a minimum,
because any leakage current creates an IR drop
across the internal resistor, thus creating an output
error. Therefore, the bypass capacitor must have
minimal leakage current. The bypass capacitor
should be no more than 0.1µF in order to ensure that
it is fully charged during the quickstart time provided
by the internal switch shown in the functional block
diagram.
8
Submit Documentation Feedback
For example, the TPS79630 exhibits 40µVRMS of
output voltage noise using a 0.1µF ceramic bypass
capacitor and a 10µF ceramic output capacitor. Note
that the output starts up slower as the bypass
capacitance increases due to the RC time constant at
the bypass pin that is created by the internal 250kΩ
resistor and external capacitor.
Board Layout Recommendation to Improve
PSRR and Noise Performance
To improve ac measurements like PSRR, output
noise, and transient response, it is recommended that
the board be designed with separate ground planes
for VIN and VOUT, with each ground plane connected
only at the ground pin of the device. In addition, the
ground connection for the bypass capacitor should
connect directly to the ground pin of the device.
Regulator Mounting
The tab of the SOT223-6 package is electrically
connected to ground. For best thermal performance,
the tab of the surface-mount version should be
soldered directly to a circuit-board copper area.
Increasing the copper area improves heat dissipation.
Solder pad footprint recommendations for the devices
are presented in an application bulletin Solder Pad
Recommendations for Surface-Mount Devices,
literature number AB-132, available for download
from the TI web site (www.ti.com).
Programming the TPS79601 Adjustable LDO
Regulator
The output voltage of the TPS79601 adjustable
regulator is programmed using an external resistor
divider as shown in Figure 28. The output voltage is
calculated using Equation 1:
V OUT + VREF
ǒ1) R1
Ǔ
R2
(1)
where:
• VREF = 1.2246V typ (the internal reference
voltage)
Resistors R1 and R2 should be chosen for
approximately 40µA divider current. Lower value
resistors can be used for improved noise
performance, but the device wastes more power.
Higher values should be avoided, as leakage current
at FB increases the output voltage error.
Copyright © 2002–2008, Texas Instruments Incorporated
TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
Regulator Protection
The recommended design procedure is to choose
R2 = 30.1kΩ to set the divider current at 40µA, C1 =
15pF for stability, and then calculate R1 using
Equation 2:
R1 +
ǒVV
OUT
REF
Ǔ
*1
The TPS796xx PMOS-pass transistor has a built-in
back diode that conducts reverse current when the
input voltage drops below the output voltage (for
example, during power-down). Current is conducted
from the output to the input and is not internally
limited. If extended reverse voltage operation is
anticipated, external limiting might be appropriate.
R2
(2)
In order to improve the stability of the adjustable
version, it is suggested that a small compensation
capacitor be placed between OUT and FB. The
approximate value of this capacitor can be calculated
as Equation 3:
(3 x 10 –7) x (R1 ) R2)
C1 +
(R1 x R2)
(3)
The TPS796xx features internal current limiting and
thermal protection. During normal operation, the
TPS796xx limits output current to approximately 2.8A.
When current limiting engages, the output voltage
scales back linearly until the overcurrent condition
ends. While current limiting is designed to prevent
gross device failure, care should be taken not to
exceed the power dissipation ratings of the package.
If the temperature of the device exceeds
approximately +165°C, thermal-protection circuitry
shuts it down. Once the device has cooled down to
below approximately +140°C, regulator operation
resumes.
The suggested value of this capacitor for several
resistor ratios is shown in the table below (see
Figure 23). If this capacitor is not used (such as in a
unity-gain
configuration)
then
the
minimum
recommended output capacitor is 2.2µF instead of
1µF.
VIN
IN
2.2 µF
OUT
TPS79601
EN
GND
OUTPUT VOLTAGE
PROGRAMMING GUIDE
VOUT
R1
FB
R2
C1
1 µF
OUTPUT
VOLTAGE
R1
R2
C1
1.8 V
14.0 kΩ
30.1 kΩ
33 pF
3.6V
57.9 kΩ
30.1 kΩ
15 pF
Figure 23. TPS79601 Adjustable LDO Regulator Programming
Copyright © 2002–2008, Texas Instruments Incorporated
Submit Documentation Feedback
9
TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
THERMAL INFORMATION
The amount of heat that an LDO linear regulator
generates is directly proportional to the amount of
power it dissipates during operation. All integrated
circuits have a maximum allowable junction
temperature (TJmax) above which normal operation is
not assured. A system designer must design the
operating environment so that the operating junction
temperature (TJ) does not exceed the maximum
junction temperature (TJmax). The two main
environmental variables that a designer can use to
improve thermal performance are air flow and
external heatsinks. The purpose of this information is
to aid the designer in determining the proper
operating environment for a linear regulator that is
operating at a specific power level.
In general, the maximum expected power (PD(max))
consumed by a linear regulator is computed as
Equation 4:
P D max + ǒV IN(avg)* V OUT(avg)Ǔ
I OUT(avg))V IN(avg)
I (Q)
(4)
where:
• VIN(avg) is the average input voltage.
• VOUT(avg) is the average output voltage.
• IOUT(avg) is the average output current.
• I(Q) is the quiescent current.
For most TI LDO regulators, the quiescent current is
insignificant compared to the average output current;
therefore, the term VIN(avg) × I(Q) can be neglected.
The operating junction temperature is computed by
adding the ambient temperature (TA) and the
A
CIRCUIT BOARD COPPER AREA
increase in temperature due to the regulator's power
dissipation. The temperature rise is computed by
multiplying the maximum expected power dissipation
by the sum of the thermal resistances between the
junction and the case (RθJC), the case to heatsink
(RθCS), and the heatsink to ambient (RθSA). Thermal
resistances are measures of how effectively an object
dissipates heat. Typically, the larger the device, the
more surface area available for power dissipation and
the lower the object's thermal resistance.
Figure 24 illustrates these thermal resistances for (a)
a SOT223 package mounted in a JEDEC low-K
board, and (b) a DDPAK package mounted on a
JEDEC high-K board.
Equation 5 summarizes the computation:
T
J
ǒ
+ T ) PDmax x R
) R
) R
A
θJC
θCS
θSA
Ǔ
(5)
The RθJC is specific to each regulator as determined
by its package, lead frame, and die size provided in
the regulator data sheet. The RθSA is a function of the
type and size of heatsink. For example, black body
radiator type heatsinks can have RθCS values ranging
from 5°C/W for very large heatsinks to 50°C/W for
very small heatsinks. The RθCS is a function of how
the package is attached to the heatsink. For example,
if a thermal compound is used to attach a heatsink to
a SOT223 package, RθCS of 1°C/W is reasonable.
TJ
A
RθJC
B
C
B
TC
B
RθCS
A
C
RθSA
SOT223 Package
(a)
DDPAK Package
(b)
TA
C
Figure 24. Thermal Resistances
10
Submit Documentation Feedback
Copyright © 2002–2008, Texas Instruments Incorporated
TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
Equation 5 simplifies into Equation 6:
T + T ) PDmax x R
J
A
θJA
Rearranging Equation 6 gives Equation 7:
T –T
R
+ J A
θJA
P max
D
(6)
(7)
Using Equation 6 and the computer model generated
curves shown in Figure 25 and Figure 28, a designer
can quickly compute the required heatsink thermal
resistance/board area for a given ambient
temperature, power dissipation, and operating
environment.
Copper Heatsink Area, the ground plane needs to be
1cm2 for the part to dissipate 2.5W. The operating
environment used in the computer model to construct
Figure 25 consisted of a standard JEDEC High-K
board (2S2P) with a 1-oz. internal copper plane and
ground plane. The package is soldered to a 2-oz.
copper pad. The pad is tied through thermal vias to
the 1-oz. ground plane. Figure 26 shows the side
view of the operating environment used in the
computer model.
40
° C/W
No Air Flow
Rθ JA − Thermal Resistance −
Even if no external black body radiator type heatsink
is attached to the package, the board on which the
regulator is mounted provides some heatsinking
through the pin solder connections. Some packages,
like the DDPAK and SOT223 packages, use a copper
plane underneath the package or the circuit board's
ground plane for additional heatsinking to improve
their thermal performance. Computer-aided thermal
modeling can be used to compute very accurate
approximations of an integrated circuit thermal
performance in different operating environments (for
example., different types of circuit boards, different
types and sizes of heatsinks, and different air flows,
etc.). Using these models, the three thermal
resistances can be combined into one thermal
resistance between junction and ambient (RθJA). This
RθJA is valid only for the specific operating
environment used in the computer model.
35
150 LFM
30
250 LFM
25
20
15
0.1
1
10
Copper Heatsink Area − cm2
100
Figure 25. DDPAK Thermal Resistance vs Copper
Heatsink Area
DDPAK Power Dissipation
The DDPAK package provides an effective means of
managing power dissipation in surface mount
applications. The DDPAK package dimensions are
provided in the Mechanical Data section at the end of
the data sheet. The addition of a copper plane
directly underneath the DDPAK package enhances
the thermal performance of the package.
To illustrate, the TPS72525 in a DDPAK package
was chosen. For this example, the average input
voltage is 5V, the output voltage is 2.5V, the average
output current is 1A, the ambient temperature +55°C,
the air flow is 150 LFM, and the operating
environment is the same as documented below.
Neglecting the quiescent current, the maximum
average power is calculated as Equation 8:
P Dmax + (5 * 2.5) V x 1 A + 2.5 W
(8)
Substituting TJmax for TJ into Equation 6 gives
Equation 9:
R
max + (125 * 55)°Cń2.5 W + 28°CńW
θJA
(9)
2 oz. Copper Solder Pad
with 25 Thermal Vias
1 oz. Copper
Power Plane
1 oz. Copper
Ground Plane
Thermal Vias, 0.3 mm
Diameter, 1,5 mm Pitch
Figure 26. DDPAK Thermal Resistance
From the data in Figure 27 and rearranging
Equation 6, the maximum power dissipation for a
different ground plane area and a specific ambient
temperature can be computed.
From Figure 25, DDPAK Thermal Resistance vs
Copyright © 2002–2008, Texas Instruments Incorporated
Submit Documentation Feedback
11
TPS796xx
www.ti.com
SLVS351K – SEPTEMBER 2002 – REVISED FEBRUARY 2008
5
180
° C/W
TA = 55°C
250 LFM
Rθ JA − Thermal Resistance −
PD Maximum (W)
4
150 LFM
3
No Air Flow
2
No Air Flow
160
140
120
100
80
60
40
20
1
10
Copper Heatsink Area − cm2
Figure 27. Maximum Power Dissipation vs Copper
Heatsink Area
SOT223 Power Dissipation
The SOT223 package provides an effective means of
managing power dissipation in surface mount
applications. The SOT223 package dimensions are
provided in the Mechanical Data section at the end of
the data sheet. The addition of a copper plane
directly underneath the SOT223 package enhances
the thermal performance of the package.
To illustrate, the TPS72525 in a SOT223 package
was chosen. For this example, the average input
voltage is 3.3V, the output voltage is 2.5V, the
average output current is 1A, the ambient
temperature +55°C, no air flow is present, and the
operating environment is the same as documented
below. Neglecting the quiescent current, the
maximum average power is calculated as
Equation 10:
P Dmax + (3.3 * 2.5) V x 1 A + 800 mW
(10)
Substituting TJmax for TJ into Equation 6 gives
Equation 11:
R
max + (125 * 55)°Cń800 mW + 87.5°CńW
θJA
(11)
From Figure 28, RθJA vs PCB Copper Area, the
ground plane needs to be 0.55in2 for the part to
dissipate 800mW. The operating environment used to
construct Figure 28 consisted of a board with 1-oz.
copper planes. The package is soldered to a 1-oz.
copper pad on the top of the board. The pad is tied
through thermal vias to the 1-oz. ground plane.
12
Submit Documentation Feedback
0
0.1
100
1
PCB Copper Area − in2
10
Figure 28. SOT223 Thermal Resistance vs PCB
Area
From the data in Figure 28 and rearranging
Equation 6, the maximum power dissipation for a
different ground plane area and a specific ambient
temperature can be computed (see Figure 29).
6
TA = 25°C
5
4
PD Maximum (W)
1
0.1
4 in2 PCB Area
3
0.5 in2 PCB Area
2
1
0
0
25
50
75
100
125
150
TA (°C)
Figure 29. SOT223 Power Dissipation
Copyright © 2002–2008, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
20-Mar-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS79601DCQ
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79601DCQG4
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79601DCQR
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79601DCQRG4
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79601DRBR
ACTIVE
SON
DRB
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79601DRBRG4
ACTIVE
SON
DRB
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79601DRBT
ACTIVE
SON
DRB
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79601DRBTG4
ACTIVE
SON
DRB
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79601KTT
OBSOLETE
DDPAK/
TO-263
KTT
5
TBD
Call TI
Call TI
TPS79601KTTR
ACTIVE
DDPAK/
TO-263
KTT
5
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
TPS79601KTTRG3
ACTIVE
DDPAK/
TO-263
KTT
5
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
TPS79601KTTT
ACTIVE
DDPAK/
TO-263
KTT
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
TPS79601KTTTG3
ACTIVE
DDPAK/
TO-263
KTT
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
TPS79613DRBR
ACTIVE
SON
DRB
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79613DRBRG4
ACTIVE
SON
DRB
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79613DRBT
ACTIVE
SON
DRB
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79613DRBTG4
ACTIVE
SON
DRB
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79618DCQ
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79618DCQG4
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79618DCQR
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79618DCQRG4
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79618KTT
OBSOLETE
DDPAK/
TO-263
KTT
5
TPS79618KTTR
ACTIVE
DDPAK/
TO-263
KTT
5
TPS79618KTTRG3
ACTIVE
DDPAK/
TO-263
KTT
TPS79618KTTT
ACTIVE
DDPAK/
TO-263
KTT
Lead/Ball Finish
MSL Peak Temp (3)
TBD
Call TI
Call TI
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
5
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
20-Mar-2008
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS79618KTTTG3
ACTIVE
DDPAK/
TO-263
KTT
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
TPS79625DCQ
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79625DCQG4
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79625DCQR
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79625DCQRG4
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79625KTT
OBSOLETE
DDPAK/
TO-263
KTT
5
TPS79625KTTR
ACTIVE
DDPAK/
TO-263
KTT
5
TPS79625KTTRG3
ACTIVE
DDPAK/
TO-263
KTT
TPS79625KTTT
ACTIVE
DDPAK/
TO-263
TPS79625KTTTG3
ACTIVE
TPS79628DCQ
Lead/Ball Finish
MSL Peak Temp (3)
TBD
Call TI
Call TI
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
5
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
KTT
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
DDPAK/
TO-263
KTT
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79628DCQG4
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79628DCQR
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79628DCQRG4
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79628DRBR
ACTIVE
SON
DRB
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79628DRBRG4
ACTIVE
SON
DRB
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79628DRBT
ACTIVE
SON
DRB
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79628DRBTG4
ACTIVE
SON
DRB
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79628KTT
OBSOLETE
DDPAK/
TO-263
KTT
5
TBD
Call TI
Call TI
TPS79628KTTR
ACTIVE
DDPAK/
TO-263
KTT
5
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
TPS79628KTTRG3
ACTIVE
DDPAK/
TO-263
KTT
5
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
TPS79628KTTT
ACTIVE
DDPAK/
TO-263
KTT
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
TPS79628KTTTG3
ACTIVE
DDPAK/
TO-263
KTT
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
TPS79630DCQ
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79630DCQG4
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79630DCQR
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
20-Mar-2008
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS79630DCQRG4
ACTIVE
SOT-223
DCQ
6
TPS79630KTT
OBSOLETE
DDPAK/
TO-263
KTT
5
TPS79630KTTR
ACTIVE
DDPAK/
TO-263
KTT
5
TPS79630KTTRG3
ACTIVE
DDPAK/
TO-263
KTT
TPS79630KTTT
ACTIVE
DDPAK/
TO-263
TPS79630KTTTG3
ACTIVE
TPS79633DCQ
2500 Green (RoHS &
no Sb/Br)
Lead/Ball Finish
CU NIPDAU
MSL Peak Temp (3)
Level-2-260C-1 YEAR
TBD
Call TI
Call TI
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
5
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
KTT
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
DDPAK/
TO-263
KTT
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79633DCQG4
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79633DCQR
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79633DCQRG4
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79633KTT
OBSOLETE
DDPAK/
TO-263
KTT
5
TPS79633KTTR
ACTIVE
DDPAK/
TO-263
KTT
5
TPS79633KTTRG3
ACTIVE
DDPAK/
TO-263
KTT
TPS79633KTTT
ACTIVE
DDPAK/
TO-263
TPS79633KTTTG3
ACTIVE
TPS79650DCQ
TBD
Call TI
Call TI
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
5
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
KTT
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
DDPAK/
TO-263
KTT
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79650DCQG4
ACTIVE
SOT-223
DCQ
6
78
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79650DCQR
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79650DCQRG4
ACTIVE
SOT-223
DCQ
6
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79650DRBR
ACTIVE
SON
DRB
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79650DRBRG4
ACTIVE
SON
DRB
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79650DRBT
ACTIVE
SON
DRB
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS79650DRBTG4
ACTIVE
SON
DRB
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
20-Mar-2008
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
TPS79601DCQR
SOT-223
DCQ
6
2500
330.0
TPS79601DRBR
SON
DRB
8
3000
TPS79601DRBT
SON
DRB
8
250
TPS79613DRBR
SON
DRB
8
TPS79613DRBT
SON
DRB
TPS79618DCQR
SOT-223
TPS79625DCQR
SOT-223
TPS79628DCQR
12.4
6.8
7.3
1.88
8.0
12.0
Q3
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
8
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
DCQ
6
2500
330.0
12.4
6.8
7.3
1.88
8.0
12.0
Q3
DCQ
6
2500
330.0
12.4
6.8
7.3
1.88
8.0
12.0
Q3
SOT-223
DCQ
6
2500
330.0
12.4
6.8
7.3
1.88
8.0
12.0
Q3
TPS79628DRBR
SON
DRB
8
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS79628DRBT
SON
DRB
8
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS79630DCQR
SOT-223
DCQ
6
2500
330.0
12.4
6.8
7.3
1.88
8.0
12.0
Q3
TPS79633DCQR
SOT-223
DCQ
6
2500
330.0
12.4
6.8
7.3
1.88
8.0
12.0
Q3
TPS79650DCQR
SOT-223
DCQ
6
2500
330.0
12.4
6.8
7.3
1.88
8.0
12.0
Q3
TPS79650DRBR
SON
DRB
8
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS79650DRBT
SON
DRB
8
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS79601DCQR
SOT-223
DCQ
6
2500
358.0
335.0
35.0
TPS79601DRBR
SON
DRB
8
3000
346.0
346.0
29.0
TPS79601DRBT
SON
DRB
8
250
190.5
212.7
31.8
TPS79613DRBR
SON
DRB
8
3000
346.0
346.0
29.0
TPS79613DRBT
SON
DRB
8
250
190.5
212.7
31.8
TPS79618DCQR
SOT-223
DCQ
6
2500
358.0
335.0
35.0
TPS79625DCQR
SOT-223
DCQ
6
2500
358.0
335.0
35.0
TPS79628DCQR
SOT-223
DCQ
6
2500
358.0
335.0
35.0
TPS79628DRBR
SON
DRB
8
3000
346.0
346.0
29.0
TPS79628DRBT
SON
DRB
8
250
190.5
212.7
31.8
TPS79630DCQR
SOT-223
DCQ
6
2500
358.0
335.0
35.0
TPS79633DCQR
SOT-223
DCQ
6
2500
358.0
335.0
35.0
TPS79650DCQR
SOT-223
DCQ
6
2500
358.0
335.0
35.0
TPS79650DRBR
SON
DRB
8
3000
346.0
346.0
29.0
TPS79650DRBT
SON
DRB
8
250
190.5
212.7
31.8
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Clocks and Timers
Interface
Logic
Power Mgmt
Microcontrollers
RFID
RF/IF and ZigBee® Solutions
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2008, Texas Instruments Incorporated