PI3A412E 0.5Ω, 3.3V, Quad SPDT Analog Switch with Enable Features Description • CMOS Technology for Bus and Analog Applications The PI3A412E is a Quad single-pole double-throw (SPDT) CMOS switch with enable. It can be used as an analog switch or as a lowdelay bus switch. Specified over a wide operating power supply voltage range, +1.65V to +4.2V, the switch has an On-Resistance of 0.5Ω at 2.7V. • Low On-Resistance: 0.5Ω (+2.7V Supply) • Wide VCC Range: +1.65V to +4.2V ±10% • ICC = 0.3μA @ TA = +25˚C • Rail-to-Rail switching throughout Signal Range Control inputs, A0 to EN, tolerates input drive signals up to 5V, independent of supply voltage. • Fast Switching Speed: 20ns max. at 3.3V • High Off Isolation: -65dB @ 100 kHz • Crosstalk Rejection: -65dB @ 100 kHz • Extended Industrial Temperature Range: –40°C to 85°C Block Diagram / Pin Configuration (top view) COM1 NO1 VCC NC4 • Packaging ( Pb-free & Green): – 16-contact TQFN (ZL16), 2.5mm x 2.5mm – 16-contact TQFN (ZH16), 3.0mm x 3.0mm 16 15 14 13 Applications • Cell Phones • Audio & Video Signal Routing • PDAs • PCMCIA Cards • Portable Instrumentation • Modems • Battery Powered Communications • Hard Drives • Computer Peripherals • JTAG Testing 2 NO2 3 COM2 4 12 COM4 11 NO4 10 EN GND 9 5 6 7 8 GND NO3 COM3 Pin # 4, 8, 12, 16 1, 5, 9, 13 3, 7, 11, 15 10 2 6 14 A0 NC2 Pin Description NC1 1 NC3 Function Table Name COMX NCX NOX EN A0 GND VCC Description Common Output / Data Port Data Port (normally connect) Data Port (normally open) Enable Logic Input Control Ground Positive Power Supply EN 1 0 0 A0 X 0 1 Function No Switch Connected, All I/O = Hi-Z NCx Connected to COMx NOx Connected to COMx Note : 1. X = 1, 2, 3, or 4. Note : 1. X = 1, 2, 3, or 4 06-0322 1 PS8804B 12/06/06 PI3A412E 0.5Ω, 3.3V, Quad SPDT Analog Switch with Enable Absolute Maximum Ratings Thermal Information Voltages Referenced to GND VCC .................................................................... –0.5V to +4.6V Continuous Power Dissipation 16-pin Tin TQFN (derate 7.1mW/ºC above +70ºC) ........... 0.5W VNC, VNO, VCOM (1) ....................................–0.5V to V+ +0.3V .................................................or 30mA, whichever occurs first Current (any terminal)................................................... ±400mA Peak Current (Pulsed at 1ms, 10% duty cycle)................................... ±500mA Storage Temperature ........................................ –65ºC to +150ºC Lead Temperature (soldering, 10s) ................................. +300ºC Note 1: Signals on NC, NO, COM, or EN1, A0 exceeding VCC or GND are clamped by internal diodes. Limit forward diode current to 30mA. Caution: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Electrical Specifications - Single +4.2V Supply (VCC = +4.2V ± 10%, GND = 0V, VIH = 1.4V, VIL = 0.7V) (TA = –40°C to +85°C) Parameter Symbol Conditions Min.(1) Typ. (2) Max. (1) Units Analog Switch Analog Signal Range (3) VANALOG On Resistance RON On-Resistance Match Between Channels(4) ΔRON On-Resistance Flatness(5) RFLAT(ON) VCC = 4.0V, ICOM = 100mA, VNC = 0.8V, 2.0V Off Leakage Current(6) INO(OFF), or INC(OFF) VCC = 4.4V, VNO or VNC = 0.3V, 3.3V -200 ICOM(ON) VCC = 4.4V, VNO or VNC = 0.3V, 3.3V -200 (6) On Leakage Current 0 VCC = 4.0V, ICOM = 100mA, VNC = +1.5V VCC 0.4 0.5 0.01 0.03 0.06 0.15 V Ω 200 nA 200 Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are TA = 25°C, VCC = 4.2V unless otherwise specified. 3. Guaranteed by design. 4. ΔRON = RON match between channels 5. Flatness is defined as the difference between the maximum and minimum value of On-Resistance measured. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. 06-0322 2 PS8804B 12/06/06 PI3A412E 0.5Ω, 3.3V, Quad SPDT Analog Switch with Enable Electrical Specifications - Single +4.2V Supply (VCC = +4.2V ± 10%, GND = 0V, VIH = 1.4V, VIL = 0.7V) (TA = –40°C to +85°C) Parameters Test Conditions Min.(1) Input High Voltage VIH Guaranteed logic High Level 1.4 Input Low Voltage VIL Guaranteed logic Low Level Input Current with Voltage High IAH VA = 1.4V, all others = 0.5V –1 1 Input Current with Voltage Low IAL VA = 0.5V, all other = 1.4V –1 1 Turn-On Time tON Turn-Off Time tOFF VCC = 4.2V, VNO = 2.0V, Figure 1 & 2 Description Typ.(2) Max.(1) Units Logic Input 0.7 V μA Dynamic Break-Before-Make tBBM Charge Injection(3) Q VNO = 1.5V, RL = 50Ω, CL = 35pF, See Figure 3 20 25 12 15 ns 1 12 CL = 1nF, VGEN = 0V, RGEN = 0Ω, Figure 4 100 OIRR RL = 50Ω, f = 100 kHz, Figure 5 -65 XTALK RL = 50Ω, f = 100 kHz, Figure 6 -65 3dB Bandwidth f3db See Test Circuit Figure 9 40 Off Capacitance CNO(OFF) Off Capacitance CNC(OFF) On Capacitance CON Off Isolation(4) (5) Cross Talk 15 pC dB MHz 45 f = 1 MHz, Figure 7 pF 45 f = 1 MHz, Figure 8 150 Supply Power-Supply Range VCC Positve Supply Current ICC 1.5 VCC = 4.4V, VCOM = 0V or VCC 4.6 V 0.4 μA Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are VCC = 4.2V unless otherwise specified. 3. Guaranteed by design. 4. Off Isolation = 20log10 [ VCOM / (VNO or VNC) ]. See Figure 4. 5. Between any two switches. See Figure 5. 06-0322 3 PS8804B 12/06/06 PI3A412E 0.5Ω, 3.3V, Quad SPDT Analog Switch with Enable Electrical Specifications - Single +3.3V Supply (VCC = +3.3V ± 10%, GND = 0V, VIH = 1.3V, VIL = 0.5V) (TA = –40°C to +85°C) Parameter Symbol Conditions Min.(1) Typ. (2) Max. (1) Units Analog Switch Analog Signal Range (3) VANALOG On Resistance RON On-Resistance Match Between Channels(4) ΔRON On-Resistance Flatness(5) RFLAT(ON) VCC = 2.7V, ICOM = 100mA, VNC = 0.8V, 2.0V Off Leakage Current(6) INO(OFF), or INC(OFF) VCC = 3.6V, VNO or VNC = 0.3V, 3.3V -150 ICOM(ON) VCC = 3.6V, VNO or VNC = 0.3V, 3.3V -150 (6) On Leakage Current 0 VCC = 2.7V, ICOM = 100mA, VNC = +1.5V VCC 0.5 0.65 0.02 0.05 0.05 0.15 V Ω 150 nA 150 Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are VCC = 3.3V unless otherwise specified. 3. Guaranteed by design. 4. ΔRON = RON match between channels 5. Flatness is defined as the difference between the maximum and minimum value of On-Resistance measured. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. 06-0322 4 PS8804B 12/06/06 PI3A412E 0.5Ω, 3.3V, Quad SPDT Analog Switch with Enable Electrical Specifications - Single +3.3V Supply (VCC = +3.3V ± 10%, GND = 0V, VIH = 1.3V, VIL = 0.5V) (TA = –40°C to +85°C) Parameters Test Conditions Min.(1) Input High Voltage VIH Guaranteed logic High Level 1.3 Input Low Voltage VIL Guaranteed logic Low Level Input Current with Voltage High IAH VA = 1.4V, all others = 0.5V –1 1 Input Current with Voltage Low IAL VA = 0.5V, all other = 1.4V –1 1 Turn-On Time tON Turn-Off Time tOFF VCC = 3.3V, VNO = 2.0V, Figure 1 & 2 Description Typ.(2) Max.(1) Units Logic Input 0.5 V μA Dynamic Break-Before-Make tBBM Charge Injection(3) Q VNO = 1.5V, RL = 50Ω, CL = 35pF, See Figure 3 20 25 12 15 ns 1 12 CL = 1nF, VGEN = 0V, RGEN = 0Ω, Figure 4 100 OIRR RL = 50Ω, f = 100 kHz, Figure 5 -65 XTALK RL = 50Ω, f = 100 kHz, Figure 6 -65 3dB Bandwidth f3db See Test Circiut Figure 9 40 Off Capacitance CNO(OFF) Off Capacitance CNC(OFF) On Capacitance CON Off Isolation(4) Cross Talk (5) 15 pC dB MHz 45 f = 1 MHz, Figure 7 pF 45 f = 1 MHz, Figure 8 150 Supply Power-Supply Range VCC Positve Supply Current ICC 1.5 VCC = 3.6V, VCOM = 0V or VCC 4.6 V 0.3 μA Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are TA = 25°C, VCC = 3.3V unless otherwise specified. 3. Guaranteed by design. 4. Off Isolation = 20log10 [ VCOM / (VNO or VNC) ]. See Figure 4. 5. Between any two switches. See Figure 5. 06-0322 5 PS8804B 12/06/06 PI3A412E 0.5Ω, 3.3V, Quad SPDT Analog Switch with Enable Test Circuits and Timing Diagrams VCC VCOM VCC NO COMx VOUT RL 50Ω A CL 35pF GND LOGIC INPUT CL INCLUDES FIXTURE AND STRAY CAPACITANCE. Figure 1. AC Test Circuit Notes: Unused BX inputs must be grounded. Logic Input VIH VIL 50% On Off tr < 5ns tf < 5ns Off tOFF VOUT Switch Output 0V 90% 90% tON Logic Input Waveforms inverted for Switches that have opposite logic 1.5V for 3.3V Supply Figure 2. AC Waveforms VIN NO COM VOUT NC A RL CL 50Ω 35pF Logic Input 50% V OUT 0.9 x V OUT t BBM Logic Input Figure 3. Break Before Make Interval Timing 06-0322 6 PS8804B 12/06/06 PI3A412E 0.5Ω, 3.3V, Quad SPDT Analog Switch with Enable RGEN NO or NC COM VOUT Logic Input OFF ON OFF CL 1nF VGEN ΔV OUT A Logic Input Q = (ΔV OUT )(CL ) Figure 4. Charge Injection Test VCC VCC 10nF 10nF 50Ω COM 50Ω VCC Signal Generator CL = 5pF A NO or NC Analyzer VCC Signal Generator Logic Input 0V or VIH NO Analyzer GND CL = 5pF RL 50Ω RL 50Ω VCC 10nF 10nF Capacitance Meter VCC Capacitance Meter A Logic Input 0V or VIH f = 1 MHz NO or NC VCC A NC Logic Input 0V or VIH COM GND GND Figure 8. Channel On Capacitance Figure 7. Channel Off Capacitance 06-0322 A GND VCC f = 1 MHz 50Ω Figure 6. Crosstalk Figure 5. Off Isolation COM COM NC 7 PS8804B 12/06/06 PI3A412E 0.5Ω, 3.3V, Quad SPDT Analog Switch with Enable VCC 10nF 50Ω VCC COM NC Signal Generator ANALYZER 50Ω A Logic Input 0V or VIH GND Figure 9. Bandwidth # # # # " # # # !! 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