PULSECORE PCS3P7100A_1

PCS3P7100A
April 2007
rev 0.6
Custom Clock Generator for Display Systems
Features
EMI clock generator for use in display systems covering
•
Custom Clock Generator for Display Systems
•
Wide Operating Frequency Range covering
wide choice of pixel frequencies.
most of the pixel frequencies
PCS3P7100A
•
Generates a low EMI 1x Output
(EMI) at the clock source, allowing system wide reduction
•
4 Spread Deviation selection options
of EMI of
•
Supply voltage : 3.3V±0.3V
allows significant system cost savings by reducing the
all clock
electromagnetic
interference
dependent signals. PCS3P7100A
number of circuit board layers, ferrite beads, shielding
2.5V±0.125V
•
reduces
that are traditionally required to pass EMI regulations.
Frequency range:
3.3V: 20 MHz – 130 MHz
The Supply Voltage of the Device is 3.3V/2.5V. It has two
2.5V: 30 MHz – 130 MHz
6 Pin TSOT-26 package
Spread Selection Pins, SS1% and SS2%. Refer to the
Commercial and Industrial Temperature range
Spread Deviation Selection Table for details.The Device
•
•
is available in 6 Pin TSOT-26 Package, in Commercial
Product Description
and Industrial Temperature grade.
Application
PCS3P7100A is a versatile spread spectrum modulator
designed
specifically
for
a
wide
range
of
clock
PCS3P7100A is targeted for use in Display Systems
frequencies. The device addresses the need of a low
Block Diagram
VDD
SS1%
SS2%
PLL
CLKIN
ModOUT
VSS
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
PCS3P7100A
April 2007
rev 0.6
Pin Configuration (6L TSOT- 26 Package)
CLKIN
1
VSS
2
ModOUT
PCS3P7100A
3
6
VDD
5
SS2%
4
SS1%
Pin Description
Pin#
Pin Name
Type
Description
1
CLKIN
I
External Reference Input frequency.
2
VSS
P
Ground to entire chip
3
ModOUT
O
Modulated Frequency Output
4
SS1%
I
5
SS2%
I
6
VDD
P
Spread Deviation Selection Pin -1. Refer to “Spread Deviation Selection Table”
for details. Has an Internal pull-up resistor.
Spread Deviation Selection Pin -2. Refer to “Spread Deviation Selection Table”
for details. Has an Internal pull-up resistor.
Power to entire chip
Spread Deviation Selection Table
SS2% Pin
SS1% Pin
Spread Deviation @ 72MHz
L
L
± 1.50%
L
H
± 1.25%
H
L
± 0.75%
H
H
± 1.00%
Custom Clock Generator for Display Systems
Notice: The information in this document is subject to change without notice.
2 of 9
PCS3P7100A
April 2007
rev 0.6
Absolute Maximum Ratings
Symbol
VDD, VIN
TSTG
Parameter
Rating
Unit
Voltage on any pin with respect to Ground
-0.5 to +4.6
V
Storage temperature
-65 to +125
°C
Ts
Max. Soldering Temperature (10 sec)
260
°C
TJ
Junction Temperature
150
°C
2
KV
TDV
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions for 2.5V and 3.3V Supply Voltage
Parameter
VDD(2.5)
VDD(3.3)
Description
Supply Voltage
TA
Operating Temperature (Ambient Temperature)
CL
Load Capacitance
Min
Max
Unit
2.375
2.625
3.0
3.6
-40
+85
°C
15
pF
V
DC Electrical Characteristics for 2.5V Supply
Symbol
Max
Unit
VIL
Input low voltage
Parameter
VSS - 0.3
0.7
V
VIH
Input high voltage
1.7
VDD + 0.3
V
IIL
Input low current
-35
µA
IIH
Input high current
35
µA
VOL
Output low voltage (VDD = 2.5V, IOL = 8 mA)
VOH
Output high voltage (VDD = 2.5V, IOH = -8 mA)
IDD
Static supply current*
ICC
Dynamic supply current (2.5V and no load)
VDD
Operating voltage
tON
Power-up time (first locked cycle after power-up)
Min
Typ
0.6
1.8
4
11
2.375
V
V
2.5
mA
mA
2.625
V
5
mS
CIN
Input Capacitance
5
pF
ZOUT
Output Impedance
40
Ω
* CLKIN pin is pulled low
Custom Clock Generator for Display Systems
Notice: The information in this document is subject to change without notice.
3 of 9
PCS3P7100A
April 2007
rev 0.6
AC Electrical Characteristics for 2.5V Supply
Symbol
CLKIN
ModOUT
Parameter
Min
Typ
Max
Unit
Input frequency
30
130
MHz
Output frequency
30
130
MHz
tLH*
Output rise time (measured from 0.7V to 1.7V)
2.2
nS
tHL*
Output fall time (measured from 1.7V to 0.7V)
1.2
nS
tJC
Jitter (Cycle to cycle)
±250
pS
tD
Output duty cycle
40
50
60
%
* tLH and tHL are measured into a capacitive load of 15pF
DC Electrical Characteristics for 3.3V Supply
Symbol
Max
Unit
VIL
Input low voltage
Parameter
VSS - 0.3
0.8
V
VIH
Input high voltage
2.0
VDD + 0.3
V
IIL
Input low current
-35
µA
IIH
Input high current
35
µA
0.4
V
VOL
Output low voltage (VDD = 3.3V, IOL = 8 mA)
VOH
Output high voltage (VDD = 3.3V, IOH = -8 mA)
IDD
Static supply current*
ICC
Dynamic supply current (3.3V and no load)
VDD
Operating voltage
Min
Typ
2.5
V
4.5
14
3.0
mA
mA
3.3
3.6
V
5
mS
tON
Power-up time (first locked cycle after power-up)
CIN
Input Capacitance
5
pF
ZOUT
Output Impedance
40
Ω
* CLKIN pin is pulled low
AC Electrical Characteristics for 3.3V Supply
Symbol
CLKIN
ModOUT
Parameter
Min
Typ
Max
Unit
Input frequency
20
130
MHz
Output frequency
20
130
MHz
tLH*
Output rise time (measured from 0.8 to 2.0V)
1.5
nS
tHL *
Output fall time (measured at 2.0V to 0.8V)
1.1
nS
±225
pS
tJC
Jitter (Cycle to cycle)
tD
Output duty cycle
45
50
55
%
*tLH and tHL are measured into a capacitive load of 15pF
Custom Clock Generator for Display Systems
Notice: The information in this document is subject to change without notice.
4 of 9
PCS3P7100A
April 2007
rev 0.6
Deviation Charts
Deviation vs Output frequency (35MHz to 130 MHz) at 25C for VDD = 2.5V
2.80%
2.30%
Dev ( % )
1.80%
1.30%
0.80%
0.30%
35
40
45
50
55
60
65
70
75
80
85
90
95
100
105
110
115
120
125
130
Output ( MHz)
Figure 1
Deviation vs Output frequency (20MHz to 29 MHz) at 25C for VDD = 3.3V
2.50%
2.00%
Dev ( % )
1.50%
1.00%
0.50%
0.00%
20
21
22
23
24
25
26
27
28
29
Output ( MHz)
Figure 2
Deviation vs Output frequency (40MHz to 130 MHz) at 25C for VDD = 3.3V
2.50%
2.00%
Dev ( % )
1.50%
1.00%
0.50%
0.00%
40
45
Figure 3
50
55
60
65
70
75
80
85
90
95
100
105
110
115
120
125
130
Output (MHz)
Note: Transition band is 30MHz to 34 MHz for VDD=2.5V at 25C. Deviation in this band is 2.5% ± 4%.
Transition band is 30MHz to 39 MHz for VDD=3.3V at 25C. Deviation in this band is 1.8% ± 30%.
Custom Clock Generator for Display Systems
Notice: The information in this document is subject to change without notice.
5 of 9
PCS3P7100A
April 2007
rev 0.6
Deviation vs Output frequency (35 MHz to 130 MHz) across temperature for VDD 2.5V ± 5%
3.00%
2.7V(-40C)
2.50%
2.5V(25C)
Dev ( % )
2.00%
2.37V(85C)
1.50%
1.00%
0.50%
0.00%
35
40
45
50
55
60
65
70
75
80
85
90
95
100
105
110
115
120
125
130
Output ( MHz)
Figure 4
Deviation vs Output frequency (20 MHz to 29 MHz) across temperature for VDD 3.3V ± 0.3V
2.50%
3.6V(-40C)
3.3V(25C)
2.00%
3.0V(85C)
Dev ( % )
1.50%
1.00%
0.50%
0.00%
20
21
22
23
24
25
26
27
28
29
Output ( MHz)
Figure 5
Deviation vs Output frequency (40MHz to 130 MHz) across temperature for VDD = 3.3V ± 0.3V
3.00%
2.50%
3.6V(-40C)
3.3V(25C)
Dev ( %)
2.00%
3.0V(85C)
1.50%
1.00%
0.50%
0.00%
40
45
50
55
60
65
70
75
80
85
90
95
100
105
110
115
120
125
130
Output ( MHz)
Note: Transition band is 30MHz to 34 MHz for VDD=2.5V ± 5%, across -40C to +85C. Deviation in this band is 1.93% ± 37%.
Transition band is 30MHz to 39 MHz for VDD=3.3V ± 0.3V, across -40C to +85C. Deviation in this band is 1.8% ± 45%.
Custom Clock Generator for Display Systems
Notice: The information in this document is subject to change without notice.
6 of 9
PCS3P7100A
April 2007
rev 0.6
Package Information
6L TSOT26
Symbol
A
Dimensions
Inches
Millimeters
Min
Max
Min
Max
0.0295
0.035
0.75
0.90
A1
0.00
0.0039
0.00
0.10
A2
0.0275
0.0314
0.70
0.80
b
0.0157
0.0197
0.40
0.50
b1
0.0118
0.0157
0.30
0.40
c
0.0031
0.0078
0.08
0.20
D
0.1141
2.90 REF
E
0.1023
0.1181
2.60
3.00
E1
0.0590
0.0069
1.50
1.70
e
0.0374
0.95 BSC
e1
0.0748
1.90 BSC
L
0.0118
0.0236
0.30
0.60
L1
0.0236 REF
0.60 REF
L2
0.0098 BSC
0.25 BSC
R
0.0039
…..
0.10
…..
R1
0.0039
0.0098
0.10
0.25
θ
0°
8°
0°
8°
y
….
0.0039
….
0.10
Custom Clock Generator for Display Systems
Notice: The information in this document is subject to change without notice.
7 of 9
PCS3P7100A
April 2007
rev 0.6
Ordering Codes
Part Number
Marking
Package Type
Temperature
PCS3P7100AG-06JT
AA4LL
6-Pin TSOT-26, TUBE, Green
Commercial
PCS3P7100AG-06JR
AA4LL
6-Pin TSOT-26, TAPE & REEL, Green
Commercial
PCS3I7100AG-06JT
AA2LL
6-Pin TSOT-26, TUBE, Green
Industrial
PCS3I7100AG-06JR
AA2LL
6-Pin TSOT-26, TAPE & REEL, Green
Industrial
LL = 2 Character LOT #
Device Ordering Information
P C S 3 P 7 1 0 0 A G - 0 6 J R
R = Tape & Reel, T = Tube or Tray
O = TSOT23
S = SOIC
T = TSSOP
A = SSOP
V = TVSOP
B = BGA
Q = QFN
U = MSOP
E = TQFP
L = LQFP
U = MSOP
P = PDIP
D = QSOP
X = SC-70
J= TSOT26
DEVICE PIN COUNT
F = LEAD FREE AND RoHS COMPLIANT PART
G = GREEN PACKAGE, LEAD FREE, and RoHS
PART NUMBER
X= Automotive
I= Industrial
P or n/c = Commercial
(-40C to +125C) (-40C to +85C)
(0C to +70C)
1 = Reserved
2 = Non PLL based
3 = EMI Reduction
4 = DDR support products
5 = STD Zero Delay Buffer
6 = Power Management
7 = Power Management
8 = Power Management
9 = Hi Performance
0 = Reserved
PulseCore Semiconductor Mixed Signal Product
Licensed under U.S Patent Nos 5,488,627 and 5,631,921
Custom Clock Generator for Display Systems
Notice: The information in this document is subject to change without notice.
8 of 9
PCS3P7100A
April 2007
rev 0.6
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200
Campbell, CA 95008
Tel: 408-879-9077
Fax: 408-879-9018
www.pulsecoresemi.com
Copyright © PulseCore Semiconductor
All Rights Reserved
Preliminary Information
Part Number: PCS3P7100A
Document Version: 0.6
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003
© Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or
registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their
respective companies. PulseCore reserves the right to make changes to this document and its products at any time without
notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein
represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct
this data at any time, without notice. If the product described herein is under development, significant changes to these
specifications are possible. The information in this product data sheet is intended to be general descriptive information for
potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or
customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product
described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products
including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual
property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are available from
PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of Sale.
The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights,
trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products
for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result
in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the
manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use.
Custom Clock Generator for Display Systems
Notice: The information in this document is subject to change without notice.
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