Revised January 1999 MM74C157 Quad 2-Input Multiplexers General Description The MM74C157 multiplexers are monolithic complementary MOS (CMOS) integrated circuits constructed with Nand P-channel enhancement transistors. They consist of four 2-input multiplexers with common select and enable inputs. When the enable input is at logical “0” the four outputs assume the values as selected from the inputs. When the enable input is at logical “1”, the outputs assume logical “0”. Select decoding is done internally resulting in a single select input only. Features ■ Supply voltage range: ■ High noise immunity: 3V to 15V 0.45 VCC (typ.) ■ Low power: 50 nW (typ.) ■ Tenth power TTL compatible: Drive 2 LPTTL loads Ordering Code: Order Number Package Number MM74C157N N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Logic Diagram Connection Diagram Pin Assignments for DIP Top View Truth Table Enable Select A B 1 X X X 0 0 0 0 X 0 0 0 1 X 1 0 1 X 0 0 0 1 X 1 1 © 1999 Fairchild Semiconductor Corporation DS005894.prf Output Y www.fairchildsemi.com MM74C157 Quad 2-Input Multiplexers October 1987 MM74C157 Absolute Maximum Ratings(Note 1) Operating VCC Range −0.3V to VCC + 0.3V Voltage at Any Pin Operating Temperature Range Storage Temperature Range 3V to 15V Lead Temperature (Soldering, 10 seconds) −40°C to +85°C 260°C −65°C to +150°C Maximum VCC Voltage 18V Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. Power Dissipation (PD) Dual-In-Line 700 mW Small Outline 500 mW DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) Logical “1” Input Voltage Logical “0” Input Voltage Logical “1” Output Voltage Logical “0” Output Voltage VCC = 5V 3.5 V VCC = 10V 8.0 V VCC = 5V 1.5 V VCC = 10V 2.0 V VCC = 5V 4.5 V VCC = 10V 9.0 V VCC = 5V 0.5 VCC = 10V 1.0 V 1.0 µA VCC = 15V IIN(1) Logical “1” Input Current IIN(0) Logical “0” Input Current VCC = 15V ICC Supply Current VCC = 15V 0.005 −1.0 −0.005 0.05 V µA 60 µA 0.8 V CMOS TO TENTH POWER INTERFACE VIN(1) Logical “1” Input Voltage VCC = 4.75V VIN(0) Logical “0” Input Voltage VCC = 4.75V VCC − 1.5 VOUT(1) Logical “1” Output Voltage VCC = 4.75V, IO = −360 µA VOUT(0) Logical “0” Output Voltage VCC = 4.75V, IO = 360 µA V 2.4 V 0.4 V OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current) ISOURCE Output Source Current VCC = 5V, VIN(0) = 0V −1.75 mA −8.0 mA 1.75 mA 8.0 mA TA = 25°C, VOUT = 0V ISOURCE Output Source Current VCC = 10V, VIN(0) = 0V TA = 25°C, VOUT = 0V ISINK Output Sink Current VCC = 5V, VIN(1) = 5V TA = 25°C, VOUT = VCC ISINK Output Sink Current VCC = 10V, VIN(1) = 10V TA = 25°C, VOUT = VCC www.fairchildsemi.com 2 (Note 2) TA = 25°C, CL = 50 pF, unless otherwise specified Symbol Typ Max Propagation Delay from VCC = 5.0V 150 250 ns Data to Output VCC = 10V 70 110 ns Propagation Delay from VCC = 5V 180 300 ns Select to Output VCC = 10V 80 130 ns Propagation Delay from VCC = 5V 180 300 ns Enable to Output VCC = 10V 80 130 CIN Input Capacitance (Note 3) 5 pF CPD Power Dissipation (Note 4) 20 pF tpd0, tpd1 tpd0, tpd1 tpd0, tpd1 Parameter Conditions Min Units ns Capacitance Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: Capacitance is guaranteed by periodic testing. Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics, Application Note AN-90. Typical Applications 74L Compatibility Guaranteed Noise Margin as a Function of VCC 3 www.fairchildsemi.com MM74C157 AC Electrical Characteristics MM74C157 Quad 2-Input Multiplexers Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001. 0.300” Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.