FAIRCHILD 74C14

Revised January 1999
MM74C14
Hex Schmitt Trigger
General Description
The MM74C14 Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with
N- and P-channel enhancement transistors. The positive
and negative going threshold voltages VT+ and VT−, show
low variation with respect to temperature (typ. 0.0005V/°C
at VCC = 10V), and hysteresis, VT+ − VT− ≥ 0.2 VCC is guaranteed.
All inputs are protected from damage due to static discharge by diode clamps to VCC and GND.
Features
■ Wide supply voltage range:
■ High noise immunity:
3.0V to 15V
0.70 VCC (typ.)
■ Low power: TTL compatibility:
0.4 VCC (typ.)
■ Hysteresis:
0.2 VCC guaranteed
0.4 VCC (typ.): 0.2 VCC guaranteed
Ordering Code:
Order Number
Package Number
Package Description
MM74C14M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74C14N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP and SOIC
Top View
© 1999 Fairchild Semiconductor Corporation
DS005879.prf
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MM74C14 Hex Schmitt Trigger
October 1987
MM74C14
Absolute Maximum Ratings(Note 1)
Absolute Maximum VCC
−0.3Vto VCC + 0.3V
Voltage at Any Pin
Operating Temperature Range
Storage Temperature Range
(Soldering, 10 seconds)
−40°C to +85°C
−65°C to +150°C
700 mW
Small Outline
260°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics tables provide conditions
for actual device operation.
Power Dissipation
Dual-In-Line
18V
Lead Temperature
500mW
Operating VCC Range
3.0V to 15V
DC Electrical Characteristics
Min/Max limits apply across the guaranteed temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
VT+
VT−
VT+–VT−
VOUT(1)
VOUT(0)
Positive Going Threshold Voltage
Negative Going Threshold Voltage
Hysteresis
Logical “1” Output Voltage
Logical “0” Output Voltage
VCC = 5V
3.0
3.6
4.3
V
VCC = 10V
6.0
6.8
8.6
V
V
VCC = 15V
9.0
10.0
12.9
VCC = 5V
0.7
1.4
2.0
V
VCC = 10V
1.4
3.2
4.0
V
VCC = 15V
2.1
5.0
6.0
V
VCC = 5V
1.0
2.2
3.6
V
VCC = 10V
2.0
3.6
7.2
V
VCC = 15V
3.0
5.0
10.8
V
VCC = 5V, IO = −10 µA
4.5
VCC = 10V, IO = −10 µA
9.0
V
V
VCC = 5V, IO = 10 µA
0.5
VCC = 10V, IO = 10 µA
1.0
V
1.0
µA
IIN(1)
Logical “1” Input Current
VCC = 15V, VIN = 15V
IIN(0)
Logical “0” Input Current
VCC = 15V, VIN = 0V
ICC
Supply Current
VCC = 15V, VIN = 0V/15V
0.005
−1.0
−0.005
0.05
V
µA
15
µA
VCC = 5V, VIN = 2.5V (Note 2)
20
µA
VCC = 10V, VIN = 5V (Note 2)
200
µA
VCC = 15V, VIN = 7.5V (Note 2)
600
µA
CMOS/LPTTL INTERFACE
VIN(1)
Logical “1” Input Voltage
VCC = 5V
VIN(0)
Logical “0” Input Voltage
VCC = 5V
VOUT(1)
Logical “1” Output Voltage
74C, VCC = 4.75V, IO = −360 µA
VOUT(0)
Logical “0” Output Voltage
74C, VCC = 4.75V, IO = 360 µA
4.3
V
0.7
2.4
V
V
0.4
V
OUTPUT DRIVE (see Family Characteristics Data Sheet) TA = 25°C (Short Circuit Current)
ISOURCE
Output Source Current
VCC = 5V, VOUT = 0V
−1.75
−3.3
mA
VCC = 10V, VOUT = 0V
−8.0
−15
mA
VCC = 5V, VOUT = VCC
1.75
3.6
mA
VCC = 10V, VOUT = VCC
8.0
16
mA
(P-Channel)
ISOURCE
Output Source Current
(P-Channel)
ISINK
Output Sink Current
(N-Channel)
ISINK
Output Sink Current
(N-Channel)
Note 2: Only one of the six inputs is at ½ VCC; the others are either at VCC or GND.
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2
(Note 3)
Typ
Max
tPD0
Symbol
Propagation Delay from Input
Parameter
VCC = 5V
Conditions
Min
220
400
Units
n
tPD1
to Output
VCC = 10V
80
200
ns
CIN
Input Capacitance
Any Input (Note 4)
5.0
pF
CPD
Power Dissipation Capacitance
Per Gate (Note 5)
20
pF
Note 3: AC Parameters are guaranteed by DC correlated testing.
Note 4: Capacitance is guaranteed by periodic testing.
Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note—
AN-90.
Typical Applications
Low Power Oscillator
Note: The equations assume t1 + t2 >> tpd0 +tpd1
3
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MM74C14
AC Electrical Characteristics
TA = 25°C, CL = 50 pF, unless otherwise specified
MM74C14
Typical Performance Characteristics
Typical Transfer Characteristics
Guaranteed Trip Point Range
Note: For more information on output drive characteristics, power dissipation, and propagation delays, see AN-90.
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4
MM74C14
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
Package Number M14A
5
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MM74C14 Hex Schmitt Trigger
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N14A
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
1. Life support devices or systems are devices or systems
device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the
sonably expected to cause the failure of the life support
body, or (b) support or sustain life, and (c) whose failure
device or system, or to affect its safety or effectiveness.
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
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user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.