Revised May 2002 MM74C85 4-Bit Magnitude Comparator General Description Features The MM74C85 is a four-bit magnitude comparator which will perform comparison of straight binary or BCD codes. The circuit consists of eight comparing inputs (A0, A1, A2, A3, B0, B1, B2, B3), three cascading inputs (A > B, A < B and A = B), and three outputs (A > B, A < B and A = B). This device compares two four-bit words (A and B) and determines whether they are “greater than,” “less than,” or “equal to” each other by a high level on the appropriate output. For words greater than four-bits, units can be cascaded by connecting the outputs (A > B, A < B, and A = B) of the least significant stage to the cascade inputs (A > B, A < B and A = B) of the next-significant stage. In addition the least significant stage must have a high level voltage (VIN(1)) applied to the A = B input and low level voltage (VIN(0)) applied to A > B and A < B inputs. ■ Wide supply voltage range: 3.0V to 15V ■ Guaranteed noise margin: 1.0V ■ High noise immunity: 0.4 VCC (typ.) ■ Low power: TTL compatibility: fan out of 2 driving 74L ■ Expandable to 'N' stages ■ Applicable to binary or BCD ■ Low power pinout: 74L85 Ordering Code: Order Number MM74C85N Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Connection Diagram Top View © 2002 Fairchild Semiconductor Corporation DS005886 www.fairchildsemi.com MM74C85 4-Bit Magnitude Comparator October 1987 MM74C85 Truth Table Comparing Inputs Cascading Inputs Outputs A2, B2 A1, B1 A0, B0 A>B A<B A=B A>B A<B A3 > B3 X X X X X X H L L A3 < B3 X X X X X X L H L A3 = B3 A2 > B2 X X X X X H L L A3 = B3 A2 < B2 X X X X X L H L A3, B3 A=B A3 = B3 A2 = B2 A1 > B1 X X X X H L L A3 = B3 A2 = B2 A1 < B1 X X X X L H L A3 = B3 A2 = B2 A1 = B1 A0 > B0 X X X H L L A3 = B3 A2 = B2 A1 = B1 A0 < B0 X X X L H L A3 = B3 A2 = B2 A1 = B1 A0 = B0 H L L H L L A3 = B3 A2 = B2 A1 = B1 A0 = B0 L H L L H L A3 = B3 A2 = B2 A1 = B1 A0 = B0 L L H L L H A3 = B3 A2 = B2 A1 = B1 A0 = B0 L H H L H H A3 = B3 A2 = B2 A1 = B1 A0 = B0 H L H H L H A3 = B3 A2 = B2 A1 = B1 A0 = B0 H H H H H H A3 = B3 A2 = B2 A1 = B1 A0 = B0 H H L H H L A3 = B3 A2 = B2 A1 = B1 A0 = B0 L L L L L L H = HIGH Level, L = LOW Level, X = Irrelevant Logic Diagram www.fairchildsemi.com 2 Voltage at Any Pin Lead Temperature −0.3V to VCC + 0.3V Operating Temperature Range −55°C to +125°C Storage Temperature Range −65°C to +150°C Dual-In-Line 700 mW Small Outline 500 mW 260°C (Soldering, 10 seconds) Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. Power Dissipation (PD) Operating VCC Range 18V VCC 3.0V to 15V DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) Logical “1” Input Voltage Logical “0” Input Voltage Logical “1” Output Voltage Logical “0” Output Voltage VCC = 5.0V 3.5 VCC = 10V 8.0 V VCC = 5.0V 1.5 VCC = 10V 2.0 VCC = 5.0V, IO = −10 µA 4.5 VCC = 10V, IO = −10 µA 9.0 V VCC = 5.0V, IO = +10 µA 0.5 VCC = 10V, IO = +10 µA 1.0 IIN(1) Logical “1” Input Current VCC = 15V, VIN = 15V IIN(0) Logical “0” Input Current VCC = 15V, VIN = 0V ICC Supply Current VCC = 15V 0.005 −1.0 V 1.0 −0.005 0.05 V µA µA 300 µA 0.8 V CMOS/LPTTL INTERFACE VIN(1) Logical “1” Input Voltage VCC = 4.75V VIN(0) Logical “0” Input Voltage VCC = 4.75V VCC − 1.5 VOUT(1) Logical “1” Output Voltage VCC = 4.75V, IO = −360 µA VOUT(0) Logical “0” Output Voltage VCC = 4.75V, IO = 360 µA V 2.4 V 0.4 V OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current) ISOURCE ISOURCE ISINK ISINK Output Source Current VCC = 5.0V, VOUT = 0V (P-Channel) TA = 25°C Output Source Current VCC = 10V, VOUT = 0V (P-Channel) TA = 25°C Output Sink Current VCC = 5.0V, VOUT = VCC (N-Channel) TA = 25°C Output Sink Current VCC = 10V, VOUT = VCC (N-Channel) TA = 25°C AC Electrical Characteristics −3.3 mA −8.0 −15 mA 1.75 3.6 mA 8.0 16 mA Min (Note 2) TA = 25°C, CL = 50 pF, unless otherwise specified Symbol Parameter tpd −1.75 Typ Max Propagation Delay from any A VCC = 50V Conditions 250 600 or B Data Input to any Data Output VCC = 10V 100 300 Units ns Propagation Delay Time from VCC = 50V 200 500 any Cascade Input to any Output VCC = 10V 100 250 CIN Input Capacitance Any Input 5.0 pF CPD Power Dissipation Capacitance Per Package (Note 4) 45 pF tpd ns Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: Capacitance is guaranteed by periodic testing. Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics application note, AN-90. 3 www.fairchildsemi.com MM74C85 Absolute Maximum Ratings(Note 1) MM74C85 Typical Applications Four Digit Comparator Switching Time Waveforms Unused inputs must be tied to an appropriate logic level. www.fairchildsemi.com 4 MM74C85 4-Bit Magnitude Comparator Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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