SITRONIX ST20P16

ST
ST20P16
16K 8-bit Single Chip Microcontroller
Notice: Sitronix Technology Corp. reserves the right to change the contents in this document without prior notice. This is not a final specification.
Some parameters are subject to change.
1. FEATURES
8-bit static pipeline CPU
ROM: 16K x 8 bits
RAM: 192 x 8 bits
Operation voltage : 2.4V ~3.6V
24 CMOS Bi-directional bit programmable I/O pins
- Twenty (Port-A high nibble & Port-B/C) are shared with
LCD drives
6 Output pins (Four are shared with LCD common and two are
shared with PSG)
2 Input pins (code option: Shared with OSCX)
Hardware debounce option for input port
Bit programmable PULL-UP for input port
Timer/Counter :
- One 8-bit timer / 16-bit event counter
- One 8-bit BASE timer
Five powerful interrupt sources :
- External interrupt (edge trigger)
- TIMER1 interrupt
- BASE timer interrupt
- PORTA[7~0] interrupt (transition trigger)
- DAC reload interrupt
32-level deep stack
Dual clock source :
- OSCX: Crystal oscillator: 32768Hz
- OSC: RC oscillator 500K ~ 4M Hz
CPU clock 250k ~ 2M Hz
Build-in oscillator with warm-up timer
LCD controller driver:
- 16 level contrast control
- 320 ( 8x40) dots ( 1/8 duty, 1/4 bias, programmable)
- 160 ( 4x40) dots ( 1/4 duty, 1/3 bias, programmable)
- Two clock source options: RC and resonator oscillator
- Keyboard scan function supported on 20 shared segment
drives
- Internal bias resistors(1/4 bias & 1/3 bias) with 32 level
driving strength control
Programmable Sound Generator (PSG) includes :
- Tone generator
- Sound effect generator
- 16 level volume control
- Digital DAC for speech / tone
Three power down modes :
- WAI0 mode
- WAI1 mode
- STP mode
2. GENERAL DESCRIPTION
ST20P16 is a low-cost, high-performance, fully static, 8-bit
microcontroller designed with CMOS silicon gate technology. It
comes with 8-bit pipeline CPU core, SRAM, timer, LCD driver,
I/O port, PSG and mask program ROM. A build-in dual oscillator
Ver 1.5
is specially integrated to enhance chip performance. For business
equipment and consumer applications. Such as watch, calculator,
and LCD game , ST20P16 is definitely a perfect solution for
implementation.
1/10
6/13/07
ST20P16
3. BLOCK DIAGRAM
Ver 1.5
2/10
6/13/07
ST20P16
4. PAD DIAGRAM
Ver 1.5
COM3
COM4
COM5
COM6
30
PWRT
GND
PSGO
PSGOB
21
COM7
NC
VDD
OSCI
RESET
VPP
OSCXI/PD0
OSCXO/PD1
3/10
NC
NC
9 10 11 12 13 14 15 16 17 18 19 20
PE3
PE2
3 4 5 6 7 8
PA1
PA0/INTX
2
PA3
PA2
1
SEG8
SEG7
SEG6
SEG5
SEG4
SEG12
PA7/SEG3
PA6/SEG2
PA5/SEG1
PA4/SEG0
66
67
68
36
35
34
33
32
31
29
28
27
26
25
24
23
22
SEG9
SEG14
SEG13
ST20P16
SEG10
65
48 47 46 45 44 43 42 41 40 39 38 37
SEG11
SEG15
COM2
COM1
COM0
SEG18
SEG17
SEG16
61
62
63
64
SEG19
NC
PB7/SEG39
PB6/SEG38
PB5/SEG37
PB4/SEG36
PB3/SEG35
PC1/SEG25 55
PC0/SEG24 56
SEG23 57
SEG22 58
SEG21 59
SEG20 60
PB2/SEG34
PB1/SEG33
PB0/SEG32
PC7/SEG31
PC6/SEG30
PC5/SEG29
PC4/SEG28
PC3/SEG27
PC2/SEG26
54 53 52 51 50 49
6/13/07
ST20P16
5. PAD DESCRIPTION
Pin No.
Designation
Type
Description
12~9
SEG0/PA4 ~
SEG3/PA7
O
I/O
SEG4 ~ SEG23
O
SEG24/PC0 ~
SEG31/PC7
SEG32/PB0 ~
SEG39/PB7
O
I/O
O
I/O
39~36
COM 0 – 3
O
LCD Common output
35~32
COM 4 - 7
O
O
LCD Common output
I
Pad reset input (HIGH Active)
P
Ground Input and chip substrate
LCD Segment output
Port-A bit programmable I/O
8~1
LCD Segment output
68 ~ 57
56~49
48~41
24
RESET
29
GND
I/O
I
I
I
I/O
I
LCD Segment output
Port-C bit programmable I/O
LCD Segment output
Port-B bit programmable I/O
Output port
Port-A bit programmable I/O
Edge-trigger Interrupt.
Transition-trigger Interrupt
Programmable Timer1 clock source
Port-A bit programmable I/O
Transition-trigger Interrupt
16
PA0/INTX
15~9
PA 1-7
28~27
PSGO,PSGOB
O
PSG/DAC Output
26
VDD
P
Power supply
22
OSCXI/PD0
21
OSCXO/PD1
I
I
O
I
25
OSCI
I
OSC input pin. For 32768Hz crystal
Port-D input
OSC output pin. For 32768Hz crystal
Port-D input
OSC input pin. Toward to external
resistor
17~18
PE2~PE3
P
OTP programming power
19,20,31,40
NC
-
-
23
VPP
P
OTP programming power
30
PWRT
I
Power on timer control pin.
Suggest tie to GND to disable
Legend: I = input, O = output, I/O = input/output, P = power.
Ver 1.5
4/10
6/13/07
ST20P16
6. Application Circuits
6.1
APPLICATION CIRCUIT UNDER 3V OPERATING VOLTAGE
VDD
Clock
LCD
I/O
ALARM
: 3V
: 32768Hz crystal and 4.0MHz RC oscillator
: 1/8 duty
: PORT A
: PSGO, PSGOB
FIGURE 6-1: APPLICATION CIRCUIT WITHOUT LCD KEYBOARD AWAKING PULSE
Note: The functions of PWRT have been added in the ST20P18. When ST20P18 is used as ST20P16,please connect to
GND.
Ver 1.5
5/10
6/13/07
ST20P16
: 3V
: 32768Hz crystal and 4.0MHz RC oscillator
: 1/8 duty
: PORT A
: PSG0, PSG1
25pF
VDD
Clock
LCD
I/O
ALARM
FIGURE 6-2: APPLICATION CIRCUIT WITH LCD KEYBOARD AWAKING PULSE
Note:
1. COMs and SEGs output GND level, while the LCD is turned off.
2. If LCD is turned off, Keyboard Awaking Pulses must be turned off at the same
time.
3. Connect one capacitor of 100PF to OSCI stabilize oscillation frequency. This
capacitor must be placed close to OSCI.
4.The functions of PWRT have been added in the ST20P18. When ST20P18 is used as
ST20P16,please connect to GND.
Ver 1.5
6/10
6/13/07
ST20P16
7. OTP ROM Programming Interface
7.1
Interface Description
In order to program OTP ROM, several pins have to be reserved on
the PCB which is bounding with ST20P18. These total are 8 pins
that include following list TABLE 7-1: . It just be used to connect
writer to program OTP ROM. After programming and
disconnecting from writer, they can be used as original purpose.
TABLE 7-1: Pin assignment of interface
ST20P16 Pad Name
(SPI Interface)
Pin Type
VPP
VPP
Power
GND
VCC
PE3
SEG4
SEG5
PE2
RESET
VSS
VDD
SSB
MOSI
MISO
SCK
RESET
Power
Power
Input
Input
Output
Input
Input
7.2
Description
High Voltage Power Supply
1) OTP Program, Program Verify, VPP=> 12V
2) OTP Read:VPP=> Floating
Ground.
Low Voltage (2.4V-5.4V) Power Supply.
SPI signal
SPI signal
SPI signal
SPI signal
SPI RESET
Programming Function Specification
There are reserved 5 option bits to select to apply or not the
function we needed. It includes PD input and Code Protection.
To setup the options should program the OTP ROM by OTP
writer .
TABLE 7-2: Option ward
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default
CP
-
-
-
WDTSTP
WDTEN
-
PD
1--- 00-1
Bit 7: CP: OTP ROM code protect.
0 =protect OTP data.
1 =Un-Protect OTP data.
Bit 3: WDTSTP: WDT stop control bit.
0 = WDT stop at WAI-1 and STP mode.
Bit 2: WDTEN: WDT enable.
0 = WDT disable.
Bit 0: PD: Port function selection
0 = PD used as input port.
1 = OSC input pin for 32768Hz crystal.
Note :Watchdog timer (WDT) circuit has been added in the ST20P18. When ST20P18 is used as ST20P16, the option bits of WDTEN
and WDTSTP have to be programmed to “0”.(OTP firmware option select )
Ver 1.5
7/10
6/13/07
ST20P16
8. PACKAGE INFORMATION
Dimensions in Millimeters
SYMBOL
b
e
D2
E2
aaa
bbb
ccc
Ver 1.5
80L
MILLIMETER
MIN.
NOM.
MAX.
0.30
0.35
0.45
0.80 BSC.
18.4 REF
12.0 REF
TOLEREANCE OF FORM AND POSITION
0.25
0.20
0.20
8/10
6/13/07
ST20P16
9. PIN CONFIGURATION(QFP80)
S
E
N N
G
C C
1
2
S
E
G
1
3
S
E
G
1
4
S
E
G
1
5
S
E
G
1
6
S
E
G
1
7
S
E
G
1
8
S
E
G
1
9
S
E
G
2
0
S
E
G
2
1
S
E
G
2
2
S
E
G
2
3
P
C
0
/
S
E
G
2
4
P
C
1
/
S
E
G
2
5
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
NC
NC
SEG11
SEG10
SEG 9
SEG 8
SEG 7
SEG 6
SEG 5
SEG 4
PA7/SEG 3
PA6/SEG 2
PA5/SEG 1
PA4/SEG 0
PA3
PA2
PA1
PA0/INTX
PE3
PE2
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
O
S
C
X
O
/
P
D
1
Ver 1.5
O V R O V P P G P N C C C
S P E S D S S N W C O O O
MM M
C P S C D G G D R
O O
7 6 5
T
E I
X
B
T
I
/
P
D
0
9/10
C
O
M
4
NC
NC
NC
NC
PC2/SEG26
PC3/SEG27
PC4/SEG28
PC5/SEG29
PC6/SEG30
PC7/SEG31
PB0/SEG32
PB1/SEG33
PB2/SEG34
PB3/SEG35
PB4/SEG36
PB5/SEG37
PB6/SEG38
PB7/SEG39
NC
COM0
COM1
COM2
NC
NC
C
O
M
3
6/13/07
ST20P16
Revisions
Version
1.3
1.4
1.5
Page
7,8
1
8,9
Description
Date
Modify Rosc 180k ohm to 226k ohm under 4Mhz condition……………2006/3/1
Add CPU clock 250k ~ 2M Hz………………………………………………2006/6/23
Move package information to page8,9…………………………………..2006/8/8
The above information is the exclusive intellectual property of Sitronix Technology Corp. and shall not be disclosed, distributed or
reproduced without permission from Sitronix. Sitronix Technology Corp. reserves the right to change this document without prior notice
and makes no warranty for any errors which may appear in this document. Sitronix products are not intended for use in life support,
critical care, medical, safety equipment, or similar applications where products failure could result in injury, or loss of life, or personal or
physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply.
Ver 1.5
10/10
6/13/07