SONY CXM3539XR

SP8T Antenna Switch for GSM/UMTS Dual Mode Handsets
Preliminary
Preliminary
CXM3539XR
Description
The CXM3539XR is SP8T antenna switch for Triple bands GSM and Triple bands UMTS dual mode handsets.
The CXM3539XR has a 1.8V CMOS compatible decoder.
The Sony GaAs junction gate pHEMT (JPHEMT) MMIC process is used for low insertion loss and high linearity.
(Applications: Triple bands GSM/Triple bands UMTS Dual Mode Handsets)
Features
‹ Low Insertion Loss:
0.30dB (Typ.) Tx1 (GSM Low Band Tx)
0.45dB (Typ.) Tx2 (GSM High Band Tx)
0.60dB (Typ.) TRx1 (UMTS Band I)
‹ Low Voltage Operation:VDD = 2.5V
‹ No DC Blocking Capacitors
‹ Small package size: XQFN-24P-02 (2.2mm × 2.9mm × 0.4mm Max.)
‹ Lead-Free and RoHS Compliant
Structure
GaAs Junction Gate pHEMT (JPHEMT) MMIC Switch, CMOS Decoder
Absolute Maximum Ratings
(Ta = 25°C)
Š Bias voltage (VDD)
4
V
Š Control voltage (CTL-A/B/C/D)
4
V
Š Input power max. (Tx1)
36
dBm (Duty cycle = 12.5 to 50%)
Š Input power max. (Tx2)
34
dBm (Duty cycle = 12.5 to 50%)
Š Input power max. (TRx1, 2, 3)
32
dBm
Š Input power max. (Rx1, 2, 4)
13
dBm
Š Operating temperature range
–35 to +85
°C
Š Storage temperature range
–65 to +150
°C
Note on Handling
GaAs MMIC’s are ESD sensitive devices. Special handling precautions are required.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license
by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating
the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
PE09702
CXM3539XR
Block Diagram
SP8T Antenna Switch
TRx1
Ant
TRx2
TRx3
Tx1
Decoder Logic
Tx2
Rx1
Rx2
Rx4
Tx1
GND
Tx2
GND
Ant
Pin Configuration
12
11
10
9
8
GND
13
7
GND
GND
14
6
TRx3
Rx1
15
5
TRx2
Rx2
16
4
GND
GND
17
3
GND
Rx4
18
2
TRx1
GND
19
1
GND
21
22
23
24
CTLC
CTLB
CTLA
VDD
20
CTLD
24-pin XQFN
(2.2mm × 2.9mm
× 0.4mm Max.)
Top View
-2-
CXM3539XR
Pin Description
Pin No.
Name
Pin No.
Name
1
GND
13
GND
2
TRx1
14
GND
3
GND
15
Rx1
4
GND
16
Rx2
5
TRx2
17
GND
6
TRx3
18
Rx4
7
GND
19
GND
8
Ant
20
VDD
9
GND
21
CTLD
10
Tx2 (DCS/PCS)
22
CTLC
11
GND
23
CTLB
12
Tx1 (GSM850/900M)
24
CTLA
-3-
CXM3539XR
RF Switch
Ant
Ant
F1
F1
F2
F2
F14
F14
F7
F7
F16
F16
F18
F18
F17
F17
F19
F19
F10
F10
F9
F9
F3
F3
Tx1
Tx1
F4
F4
F6
F6
Rx4
Rx1
Rx1 Rx2
Rx2 Rx4
Tx2
Tx2
TRx3
TRx3
TRx2
TRx2
TRx1
TRx1
Truth Table
State Active Path
Switch State
Vctl State
A
B
C
D
F1
F2
F3
F4
F6
F7
F9 F10 F14 F16 F17 F18 F19
1
Tx1
H
H
L
H
H
L
L
L
L
L
H
H
L
L
H
L
H
2
Tx2
H
L
L
H
L
H
L
L
L
L
L
H
L
L
H
L
H
3
Rx1
L
L
L
H
L
L
H
L
L
L
H
L
H
L
H
L
H
4
Rx2
L
L
H
H
L
L
L
H
L
L
H
L
H
L
H
L
H
5
Rx4
L
H
H
H
L
L
L
L
H
L
H
L
H
L
H
L
H
6
TRx1
L
H
L
H
L
L
L
L
L
H
H
H
L
L
H
L
H
7
TRx2
H
L
H
H
L
L
L
L
L
L
H
H
L
H
L
L
H
8
TRx3
H
H
H
H
L
L
L
L
L
L
H
H
L
L
H
H
L
9
Sleep
L
L
L
L
—
—
—
—
—
—
—
—
—
—
—
—
—
-4-
CXM3539XR
Electrical Characteristics
Supply Voltage Value
(Ta = 25°C)
Item
Min.
Typ.
Max.
Unit
Bias voltage (VDD)
+2.5
+2.65
+3.3
V
Logic Value
(Ta = 25°C)
Item
Control voltage
(CTL-A/B/C/D)
State
Min.
Typ.
Max.
High
+1.5
+1.8
+3.3
Low
0
—
+0.3
-5-
Unit
V
CXM3539XR
Specification 1
(Ta = 25°C, VDD = 2.5V, Vctl = 1.5V)
Item
Symbol
Port
Condition
—
0.30
0.45
Ant-Tx2
*2
—
0.45
0.60
*3
—
0.75
0.90
*4
—
1.00
1.15
*3
—
0.75
0.90
*4
—
1.00
1.15
*3
—
0.75
0.90
*4
—
1.00
1.15
*5
—
0.55
0.70
*6
—
0.60
0.75
*5
—
0.58
0.73
*6
—
0.63
0.78
*7
—
0.45
0.60
*8
—
0.45
0.60
*9
—
0.57
0.72
*10
—
0.60
0.75
*5
—
0.60
0.75
*6
—
0.63
0.78
*7
—
0.45
0.60
*8
—
0.45
0.60
*9
—
0.60
0.75
*10
—
0.62
0.77
All ports in Active Paths
824 to 2170MHz
—
1.20
1.50
Tx1-Ant
*1
—
–52
–36
—
–40
–35
Tx2-Ant
*2
—
–52
–36
—
–38
–33
TRx1-Ant
*5
—
–53
–39
—
–54
–39
TRx2-Ant
*7,*9
—
–56
–39
—
–55
–39
TRx3-Ant
*7,*9
—
–56
–39
—
–53
–39
Ant-Rx4
Ant-TRx1
IL
Ant-TRx2
Ant-TRx3
VSWR
2fo
3fo
2fo
3fo
Harmonics
2fo
3fo
2fo
3fo
2fo
3fo
Max.
*1
Ant-Rx2
VSWR
Typ.
Ant-Tx1
Ant-Rx1
Insertion loss
Min.
-6-
Unit
dB
—
dBm
CXM3539XR
Item
Symbol
Port
Condition
TRx1-Ant
TRx2-Ant
IMD2
TRx3-Ant
Intermodulation
distortion level
in Rx band
TRx1-Ant
TRx2-Ant
IMD3
TRx3-Ant
Min.
Typ.
Max.
*11, *19
—
–106
–97
*12, *19
—
–108
–97
*13, *19
—
–106
–97
*14, *19
—
–117
–97
*12, *19
—
–106
–97
*13, *19
—
–105
–97
*14, *19
—
–116
–97
*15, *19
—
–105
–97
*16, *19
—
–105
–97
*17, *19
—
–108
–97
*18, *19
—
–109
–97
*16, *19
—
–104
–97
*17, *19
—
–107
–97
*18, *19
—
–108
–97
Unit
dBm
Switching time
Ts
50%Ctl to 90%RF
—
3
5
μs
Control current
Ictl
Vctl = 1.80V
—
1
5
μA
Supply current
Idd
VDD = 2.65V
—
0.18
0.40
mA
Sleep current
Isleep
Sleep Mode
*State9
VDD = 2.65V
—
1
10
μA
Electrical Characteristics are measured with all RF ports terminated in 50Ω.
*1
*2
*3
*4
*5
*6
*7
*8
*9
*10
*11
*12
*13
*14
*15
*16
*17
*18
*19
Pin on Tx1: 34dBm, 824 to 915MHz, Tx1 enabled
Pin on Tx2: 32dBm, 1710 to 1910MHz, Tx2 enabled
Pin on Ant: 10dBm, 869 to 960MHz, Rx1, Rx2 or Rx4 enabled
Pin on Ant: 10dBm, 1805 to 1990MHz, Rx1, Rx2 or Rx4 enabled
Pin on TRx1, TRx2 or TRx3: 26dBm, 1920 to 1980MHz, TRx1, TRx2 or TRx3 enabled
Pin on Ant: 10dBm, 2110 to 2170MHz, TRx1, TRx2 or TRx3 enabled
Pin on TRx2 or TRx3: 26dBm, 824 to 849MHz, TRx2 or TRx3 enabled
Pin on Ant: 10dBm, 869 to 894MHz, TRx2 or TRx3 enabled
Pin on TRx2 or TRx3: 26dBm, 1710 to 1910MHz, TRx2 or TRx3 enabled
Pin on Ant: 10dBm, 1805 to 1990MHz, TRx2 or TRx3 enabled
Pin on TRx1: 20dBm, 1950MHz, Pin on Ant: –15dBm, 190MHz, TRx1 enabled
Pin on TRx2 or TRx3: 20dBm, 1745MHz, Pin on Ant: –15dBm, 95MHz, TRx2 or TRx3 enabled
Pin on TRx2 or TRx3: 20dBm, 1880MHz, Pin on Ant: –15dBm, 80MHz, TRx2 or TRx3 enabled
Pin on TRx2 or TRx3: 20dBm, 835MHz, Pin on Ant: –15dBm, 45MHz, TRx2 or TRx3 enabled
Pin on TRx1: 20dBm, 1950MHz, Pin on Ant: –15dBm, 1760MHz, TRx1 enabled
Pin on TRx2 or TRx3: 20dBm, 1745MHz, Pin on Ant: –15dBm, 1650MHz, TRx2 or TRx3 enabled
Pin on TRx2 or TRx3: 20dBm, 1880MHz, Pin on Ant: –15dBm, 1800MHz, TRx2 or TRx3 enabled
Pin on TRx2 or TRx3: 20dBm, 835MHz, Pin on Ant: –15dBm, 790MHz, TRx2 or TRx3 enabled
Measured with the recommended circuit
-7-
CXM3539XR
Specification 1-Isolation
(Ta = 25°C, VDD = 2.5V, Vctl = 1.5V)
Item
Symbol
Path
Active
Tx1
Min.
Typ.
Max.
Tx1-Rx1
35
46
—
Tx1-Rx2
35
55
—
Tx1-Rx4
35
57
—
25
29
—
Tx1-TRx2
25
48
—
Tx1-TRx3
25
38
—
Tx1-Tx2
25
28
—
18
22
—
Tx2-Rx1
35
51
—
Tx2-Rx2
35
55
—
Tx2-Rx4
35
55
—
20
23
—
Tx2-TRx2
20
38
—
Tx2-TRx3
20
31
—
Tx2-Tx1
16
19
—
TRx1-Rx1
30
52
—
TRx1-Rx2
30
57
—
TRx1-Rx4
30
54
—
27
34
—
TRx1-TRx3
23
26
—
TRx1-Tx1
17
19.5
—
TRx1-Tx2
20
28
—
TRx2-Rx1
30
59
—
TRx2-Rx2
30
60
—
TRx2-Rx4
30
60
—
20
28
—
TRx2-TRx3
20
28
—
TRx2-Tx1
20
26
—
TRx2-Tx2
20
43
—
TRx2-Rx1
30
52
—
TRx2-Rx2
30
57
—
TRx2-Rx4
30
56
—
18
21
—
TRx2-TRx3
18
20.5
—
TRx2-Tx1
17
19.5
—
TRx2-Tx2
20
33
—
Isolation
824 to 915MHz
Tx1-TRx1
Tx1-Tx2
Tx2
Isolation
ISO
TRx1
1648 to 1830MHz
Tx2-TRx1
1710 to 1910MHz
TRx1-TRx2
1920 to 1980MHz
TRx2-TRx1
TRx2
Condition
824 to 849MHz
TRx2-TRx1
1710 to 1910MHz
-8-
Unit
dB
CXM3539XR
Item
Symbol
Path
Active
Min.
Typ.
Max.
TRx3-Rx1
30
59
—
TRx3-Rx2
30
60
—
TRx3-Rx4
30
59
—
20
29
—
TRx3-TRx2
20
30
—
TRx3-Tx1
20
26
—
TRx3-Tx2
20
43
—
TRx3-Rx1
30
52
—
TRx3-Rx2
30
57
—
TRx3-Rx4
30
55
—
18
22
—
TRx3-TRx2
18
22
—
TRx3-Tx1
17
19.5
—
TRx3-Tx2
20
36
—
Isolation
TRx3-TRx1
Isolation
ISO
TRx3
Condition
824 to 849MHz
TRx3-TRx1
1710 to 1910MHz
Electrical Characteristics are measured with all RF ports terminated in 50Ω.
-9-
Unit
dB
CXM3539XR
Ant
Tx2
Tx1
Recommended Circuit
C1
L1
12
10
9
8
13
7
14
6
TRx3
5
TRx2
Rx1
15
Rx2
16
24-pin XQFN
(2.2mm × 2.9mm
× 0.4mm Max.)
Top View
17
4
3
18
2
19
1
C2
23
TRx1
24
C2
C2 100pF
CTLA
C2
22
CTLB
VDD
C2
21
CTLC
20
CTLD
Rx4
11
Note) 1. No DC blocking Capacitors are required on all RF ports.
2. DC levels of all RF ports are GND.
3. L1 Inductor(22nH) and C1 Capacitor(22pF) are recommended on Ant port for ESD protection.
4. C2 Capacitor (100pF) is recommended.
- 10 -
CXM3539XR
PCB Layout Template
XQFN-24P-02 Macro for MMIC (Reference)
Specification
• PKG size:
• Terminal pitch:
• Terminal length:
• Mask thickness:
2.9mm × 2.2mm t0.35mm
0.35mm
0.25mm
0.11mm
3.3
2.9 (PKG size)
R0
.2
41.1
0.35
R0.05
Detail A
0.28
0.28
0.2
0.2
R0.05
C0.1
0.25
C0.05
0.5
PKG Outline
0.2
2.2 (PKG size)
2.6
1.8
0.35
Detail A
: Land area
: Mask open area (Solder printing area)
: Board resist open area
: Metal area in board (GND plane is recommended.)
: PKG outline
- 11 -
CXM3539XR
Package Outline
(Unit: mm)
LEAD PLATING SPECIFICATIONS
ITEM
- 12 -
SPEC.
LEAD MATERIAL
COPPER ALLOY
SOLDER COMPOSITION
Sn-Bi Bi:1-4wt%
PLATING THICKNESS
5-18µm
Sony Corporation