Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TK2350 STEREO 300W (4Ω) CLASS-T DIGITAL AUDIO AMPLIFIER DRIVER USING DIGITAL POWER PROCESSING T M TECHNOLOGY Technical Information Revision 1.5 – September 2003 GENERAL DESCRIPTION The TK2350 (TC2001/TP2350B chipset) is a two-channel, 300W (4Ω) per channel Amplifier Driver that uses Tripath’s proprietary Digital Power Processing (DPPTM) technology. Class-T amplifiers offer both the audio fidelity of Class-AB and the power efficiency of Class-D amplifiers. Applications Features Audio/Video Amplifiers & Receivers Pro-audio Amplifiers Automobile Power Amplifiers Subwoofer Amplifiers Class-T architecture Pin compatible with Tripath TK2150 Proprietary Digital Power Processing technology “Audiophile” Sound Quality 0.02% THD+N @ 50W, 8Ω 0.03% IHF-IM @ 30W, 8Ω High Efficiency 95% @ 150W @ 8Ω 90% @ 275W @ 4Ω Supports wide range of output power levels Up to 300W/channel (4Ω), single-ended outputs Up to 1000W (4Ω), bridged outputs Output over-current protection Over- and under-voltage protection Over-temperature protection Benefits Reduced system cost with smaller/less expensive power supply and heat sink Signal fidelity equal to high quality Class-AB amplifiers High dynamic range compatible with digital media such as CD and DVD Typical Performance for TK2350 THD+N versus Output Power versus Supply Voltage RL = 4Ω 10 5 f = 1kHz BBM = 80nS BW = 22Hz - 22kHz 2 39V 45V 54V THD+N (%) 1 0.5 0.2 0.1 0.05 0.02 0.01 1 2 5 10 20 50 100 200 500 Output Power (W) 1 of 1 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Absolute Maximum Ratings TC2001 (Note 1) Value UNITS V5 SYMBOL 5V Power Supply PARAMETER 6 V Vlogic Input Logic Level V5+0.3V V TA Operating Free-air Temperature Range -40° to +85° °C TSTORE Storage Temperature Range -55° to 150° °C TJMAX Maximum Junction Temperature 150° °C ESDHB ESD Susceptibility – Human Body Model (Note 2) All pins 2000 V Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. See the table below for Operating Conditions. Note 2: Human body model, 100pF discharged through a 1.5KΩ resistor. Absolute Maximum Ratings TP2350B (Note 3) SYMBOL PARAMETER Value UNITS +/- 70 V VNN+13 V VPP, VNN Supply Voltage VN10 Voltage for FET drive TSTORE Storage Temperature Range -55º to 150º C TA Operating Free-air Temperature Range -40º to 85º C TJ Junction Temperature 150º C ESDHB ESD Susceptibility – Human Body Model (Note 4) All pins ESD Susceptibility – Machine Model (Note 5) All pins 2000 V 200 V ESDMM Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. See the table below for Operating Conditions. Note 4: Human body model, 100pF discharged through a 1.5KΩ resistor. Note 5: Machine model, 220pF – 240pF discharged through all pins. Operating Conditions TC2001 SYMBOL (Note 6) MIN. TYP. MAX. V5 Supply Voltage PARAMETER 4.5 5 5.5 VHI Logic Input High V5-1.0 VLO Logic Input Low TA Operating Temperature Range -40° UNITS V V 25° 1 V 85° C Note 6: Recommended Operating Conditions indicate conditions for which the device is functional. See Electrical Characteristics for guaranteed specific performance limits. 2 of 2 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Operating Conditions TP2350B (Note 7) SYMBOL PARAMETER VPP, VNN Supply Voltage VN10 Voltage for FET drive (Volts above VNN) MIN. TYP. MAX. UNITS +/- 15 +/-45 +/- 65 V 9 10 12 V Note 7: Recommended Operating Conditions indicate conditions for which the device is functional. See Electrical Characteristics for guaranteed specific performance limits. Operating Characteristics TC2001 SYMBOL I5 (Note 8) PARAMETER MIN. Supply Current fsw Switching Frequency VIN Input Sensitivity VOUTHI High Output Voltage VOUTLO Low Output Voltage RIN Input Impedance TYP. MAX. 50 mA 650 0 kHz 1.5 V5-0.5 V V 100 Input DC Bias UNITS mV 2 kΩ 2.4 V Note 8: Recommended Operating Conditions indicate conditions for which the device is functional. See Electrical Characteristics for guaranteed specific performance limits. Thermal Characteristics TC2001 SYMBOL θJA PARAMETER Junction-to-ambient Thermal Resistance (still air) Value UNITS 80° C/W Value UNITS 3° C/W Thermal Characteristics TP2350B SYMBOL θJC PARAMETER Junction-to-case Thermal Resistance (Note 9) Note 9: Recommended Operating Conditions indicate conditions for which the device is functional. See Electrical Characteristics for guaranteed specific performance limits. 3 of 3 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Electrical Characteristics TC2001 (Note 10) TA = 25 °C. See Application/Test Circuit on page 7. Unless otherwise noted, the supply voltage is VPP=|VNN|=45V. SYMBOL Iq PARAMETER CONDITIONS TYP. MAX. UNITS V5 = 5V 45 60 mA V5 = 5V 20 25 mA VIH Quiescent Current (Mute = 0V) Mute Supply Current (Mute = 5V) High-level input voltage (MUTE) VIL Low-level input voltage (MUTE) VOH High-level output voltage (HMUTE) IOH = 3mA VOL Low-level output voltage (HMUTE) IOL = 3mA VTOC Over Current Sense Voltage Threshold VPPSENSE Threshold Currents TBD IMUTE IVPPSENSE VVPPSENSE Threshold Voltages with RVPPSENSE = 422KΩ (Note 11, Note 12) IVNNSENSE VNNSENSE Threshold Currents VVNNSENSE Threshold Voltages with RVNNSENSE = 392KΩ (Note 11, Note 12) MIN. 3.5 Over-voltage turn on (muted) Over-voltage turn off (mute off) Under-voltage turn off (mute off) Under-voltage turn on (muted) Over-voltage turn on (muted) Over-voltage turn off (mute off) Under-voltage turn off (mute off) Under-voltage turn on (muted) Over-voltage turn on (muted) Over-voltage turn off (mute off) Under-voltage turn off (mute off) Under-voltage turn on (muted) Over-voltage turn on (muted) Over-voltage turn off (mute off) Under-voltage turn off (mute off) Under-voltage turn on (muted) V 1.0 V 0.5 V 0.97 1.09 V 162 154 79 72 178 68.4 65.0 33.3 30.4 174 169 86 77 75.8 -68.2 -66.2 -33.7 -30.2 -75.6 µA µA µA µA V V V V µA µA µA µA V V V V 4.0 0.85 138 62 57.6 25.9 152 65 -59.0 -25.2 V 87 37.1 191 95 -37.6 Note 10: Minimum and maximum limits are guaranteed but may not be 100% tested. Note 11: These supply voltages are calculated using the IVPPSENSE and IVNNSENSE values shown in the Electrical Characteristics table. The typical voltage values shown are calculated using a RVPPSENSE and RVNNSENSE value of 422kohm without any tolerance variation. The minimum and maximum voltage limits shown include either a +1% or –1% (+1% for Over-voltage turn on and Under-voltage turn off, -1% for Over-voltage turn off and Under-voltage turn on) variation of RVPPSENSE or RVNNSENSE off the nominal 422kohm and 392kohm values. These voltage specifications are examples to show both typical and worst case voltage ranges for a given RVPPSENSE and RVNNSENSE resistor values of 422kohm and 392kohm. Please refer to the Application Information section for a more detailed description of how to calculate the over and under voltage trip voltages for a given resistor value. Note 12: The fact that the over-voltage turn on specifications exceed the absolute maximum of +/-70V for the TK2350 does not imply that the part will work at these elevated supply voltages. It also does not imply that the TK2350 is tested or guaranteed at these supply voltages. The supply voltages are simply a calculation based on the process spread of the IVPPSENSE and IVNNSENSE currents (see note 7). The supply voltage must be maintained below the absolute maximum of +/-70V or permanent damage to the TK2350 may occur. 4 of 4 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Electrical Characteristics TK2350 (Note 14) TA = 25 °C. See Application/Test Circuit on page 7. Unless otherwise noted, the supply voltage is VPP=|VNN|=45V. SYMBOL PARAMETER Iq Quiescent Current (No load, BBM0=1,BBM1=0, Mute = 0V) IMUTE Mute Supply Current (No load, Mute = 5V) CONDITIONS MIN. TYP. MAX. UNITS mA mA mA 90 90 TBD VPP = +45V VNN = -45V (using external VN10) VNN = -45V (using SMPSO pin to drive IRF9510 for generating VN10) VN10 = 10V VPP = +45V VNN = -45V VN10 = 10V TBD 200 1 1 1 mA mA mA mA Note 14: Minimum and maximum limits are guaranteed but may not be 100% tested. Performance Characteristics TK2350 – Single Ended TA = 25 °C. Unless otherwise noted, the supply voltage is VPP=|VNN|=45V, the input frequency is 1kHz and the measurement bandwidth is 20kHz. See Application/Test Circuit. SYMBOL PARAMETER POUT Output Power (continuous Power/Channel) THD + N IHF-IM Total Harmonic Distortion Plus Noise IHF Intermodulation Distortion SNR Signal-to-Noise Ratio CONDITIONS CS Channel Separation 19kHz, 20kHz, 1:1 (IHF), RL = 8Ω POUT = 30W/Channel A Weighted, RL = 4Ω, POUT = 275W/Channel 0dBr = 30W, RL = 8Ω, f = 1kHz η Power Efficiency POUT = 150W/Channel, RL = 8Ω AV Amplifier Gain AVERROR Channel to Channel Gain Error eNOUT Output Noise Voltage VOFFSET Output Offset Voltage POUT = 10W/Channel, RL = 4Ω See Application / Test Circuit POUT = 10W/Channel, RL = 4Ω See Application / Test Circuit A Weighted, no signal, input shorted, DC offset nulled to zero No Load, Mute = Logic Low 0.1% RFBA, RFBB, RFBC resistors 5 of 5 MIN. THD+N = 0.1%, RL = 8Ω RL = 4Ω THD+N = 1%, RL = 8Ω RL = 4Ω POUT = 50W/Channel, RL = 8Ω TYP. MAX. W W W W 0.02 % 0.03 % 102 dB 97 dB 95 % 10.7 V/V 0.5 dB µV 260 -1.0 UNITS 100 190 120 220 1.0 V TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TK2350 Block Diagram Input Left Input Right 6 of 6 TC2001 Audio Signal Processor TP2350B M OSFET Driver LC Filter Output Left LC Filter Output Right Output M OSFETs TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TC2001 Pinout 28-pin SOIC (Top View) BIASCAP 1 28 FBKGND2 2 27 DCM P 3 26 FBKOUT2 4 25 VPW R 5 24 M UTE FBKGND1 6 23 INV1 FBKOUT1 7 22 OAOUT1 HM UTE 8 21 V5 AGND INV2 OAOUT2 BBM 0 BBM 1 9 20 Y1B 10 19 VPPSENSE Y2B 11 18 OVRLDB Y2 12 17 NC 13 16 14 15 Y1 OCD2 VNNSENSE OCD1 REF TP2350B Pinout HO2COM HO2 NC OCS2HN OCS2HP OCS1HP OCS1HN NC HO1 HO1COM NC LO1COM LO1 VN10 VNN VN10 LO2 LO2COM NC 64-pin LQFP (Top View) 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 NC OCS1LN OCS1LP NC NC VBOOT1 NC SW-FB SMPSO NC NC NC NC 52 53 54 55 56 57 58 59 60 61 62 63 64 32 31 30 29 28 27 26 25 24 23 22 21 20 NC OCS2LN OCS2LP NC NC VBOOT2 NC NC NC NC NC NC NC NC Y1B Y1 NC NC NC NC AGND V5 OCD1 NC TSS OCD2 NC NC Y2 Y2B NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Please note that the heatslug on the bottom of the package is connected to VNN. 7 of 7 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TC2001 Audio Signal Processor Pin Descriptions Pin 1 Function BIASCAP 2, 6 FBKGND2, FBKGND1 DCMP 3 4, 7 5 8 FBKOUT2, FBKOUT1 VPWR HMUTE 9, 12 10, 11 13 14, 16 15 17 Y1, Y2 Y1B, Y2B NC OCD2, OCD1 REF VNNSENSE 18 19 OVRLDB VPPSENSE 20 21 22, 27 23, 28 AGND V5 OAOUT1, OAOUT2 INV1, INV2 24 MUTE 25, 26 BBM1, BBM0 8 of 8 Description Bandgap reference times two (typically 2.5VDC). Used to set the common mode voltage for the input op amps. This pin is not capable of driving external circuitry. Ground Kelvin feedback (Channels 1 & 2) Internal mode selection. This pin must be grounded for proper device operation. Switching feedback (Channels 1 & 2) Test pin. Must be left floating. Logic output. A logic high indicates both amplifiers are muted, due to the mute pin state, or a “fault”. Non-inverted switching modulator outputs. Inverted switching modulator outputs. No connect Over Current Detect pins. Internal bandgap reference voltage; approximately 1.2 VDC. Negative supply voltage sense input. This pin is used for both over and under voltage sensing for the VNN supply. A logic low output indicates the input signal has overloaded the amplifier. Positive supply voltage sense input. This pin is used for both over and under voltage sensing for the VPP supply. Analog Ground. 5 Volt power supply input. Input stage output pins. Single-ended inputs. Inputs are a “virtual” ground of an inverting opamp with approximately 2.4VDC bias. When set to logic high, both amplifiers are muted and in idle mode. When low (grounded), both amplifiers are fully operational. If left floating, the device stays in the mute mode. Ground if not used. Break-before-make timing control to prevent shoot-through in the output MOSFETs. TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TP2350B Pin Description Pin 5 6 7 9 10 13,17 14,16 27,57 Function AGND V5 OCD1 TSS OCD2 Y2, Y1 Y2B, Y1B VBOOT2, VBOOT1 30,31 33,34 36,48 37,47 39,45 40,44 41,43 OCS2LP, OCS2LN OCS2HP, OCS2HN HO2, HO1 HO2COM, HO1COM LO2COM, LO1COM LO2, LO1 VN10 42 50,51 53,54 59 60 1,2,3,4,8, 11,12,15, 18,19,20, 21,22,23, 24,25,26, 28,29,32, 35,38,46, 49,52,55, 56,58,61, 62,63,64 VNN OCS1HN, OCS1HP OCS1LN ,OCS1LP SW-FB SMPSO NC Description Analog ground. 5V power supply input. Over-current threshold output (Channel 1) This a test pin for the TP2350B. This pin should be left floating. Over-current threshold output (Channel 2) Non-inverted switching modulator inputs Inverted switching modulator inputs Bootstrapped voltage to supply drive to gate of high-side FET (Channel 2 & 1) Over Current Sense inputs, Channel 2 low-side Over Current Sense inputs, Channel 2 high-side High side gate drive output (Channel 2 & 1) Kelvin connection to source of high-side transistor (Channel 2 & 1) Kelvin connection to source of low-side transistor (Channel 2 & 1) Low side gate drive output (Channel 2 & 1) “Floating” supply input for the FET drive circuitry. This voltage must be stable and referenced to VNN. Negative supply voltage. Over Current Sense inputs, Channel 1 high-side Over Current Sense inputs, Channel 1 low-side Feedback for regulating switching power supply output for VN10 Switching power supply output for VN10 Not connected (bonded) internally. Leave these pins floating. Please note that the heatslug on the bottom of the package is connected to VNN. 9 of 9 TK2350, Rev 1.5/09.03 R OFA 10K Ω *R VPP1 422K Ω , 1% V5 *R VPP1 422K Ω , 1% *R VNN2 1.18M Ω , 1% V5 VPP VNN *R VNN1 392K Ω , 1% R OFA 10K Ω Offset Trim Circuit R OFB 499K Ω RI 49.9K Ω RF 20K Ω 22 20 21 C OF 0.1uF R OFB 499K Ω 24 25 3 DCOMP V5 - VNNSENSE AGND + V5 200K Ω 2.5V AGND + - V5 AGND V5 Y1B Y1 Y2 HMUTE 13 4 2 14 * The values of these com ponents m ust be adjusted based on supply voltage range. See Application Inform ation. Power Ground NC C FB 270pF FBKGND2 FBKOUT2 AGND (Pin 28) C OCR 220pF OCD2 *R FBB 1.07K Ω *R FBB 1.07K Ω *R FBB 1.07K Ω *R FBB 1.07K Ω *R FBC 13.3K Ω *R FBC 13.3K Ω CS 0.1uF 5V *R FBC 13.3K Ω *R FBC 13.3K Ω R OCR V5 (Pin 21) 20K Ω R FBA R FBA 1K Ω 1K Ω R OCR V5 (Pin 21) 20K Ω R FBA R FBA 1K Ω 1K Ω C FB 150pF FBKGND1 FBKOUT1 11 Y2B 12 8 7 6 AGND (Pin 28) C OCR 220pF 16 OCD1 10 9 Analog Ground Processing & Modulation Processing & Modulation TC 2001 F. BEAD 19 VPPSENSE 17 26 BBM1 28 27 BBM0 C OF 0.1uF R OFB 499K Ω IN2 VP2 REF 15 MUTE 1 INV1 23 VP1 BIASCAP R REF 8.25K Ω , 1% 5V AGND R OFB 499K Ω CA 0.1uF V5 (Pin 27) CI 3.3uF + Offset Trim Circuit RF 20K Ω CS 0.1uF RI 49.9K Ω V5 (Pin 27) CI 3.3uF + 5V 5 6 7 16 17 OCD2 10 Y2B 14 Y2 13 OCD1 Y1B Y1 AGND V5 Level Shift & FET controller VN10 VNN VNN 31 OCS2LN 30 OCS2LP 39 LO2COM DS MUR120 40 LO2 37 HO2COM D G MUR120 QO D SW B1100DICT QO R S 2.2, 1W D G MUR120 R S 2.2, 1W QO R G 5.6, 1W D G MUR120 R G 5.6, 1W RS 0.01 Ω , 1W R PG 10 Ω QP IRF9510 R SW FB 1k Ω R S 2.2, 1W VNN DS MUR120 36 HO2 34 OCS2HN 27 VBOOT2 33 OCS2HP 42 D G MUR120 R G 5.6, 1W RS 0.01 Ω , 1W R S 2.2, 1W QO R G 5.6, 1W VN10 C SW 0.1uF,35V VNN 60 SMPSO C SW FB 0.1uF 59 SW -FB 53 OCS1LN 54 OCS1LP 45 LO1COM DS MUR120 44 LO1 47 HO1COM 41, 43 VN10 VN10 VN10 Switchm ode Power Supply Level Shift & FET controller DS MUR120 48 HO1 50 OCS1HN 57 VBOOT1 51 OCS1HP RS 0.01 Ω , 1W RB 16 Ω , 1W CB 220pF D S MUR120 CS 0.1uF + + VNN C SW 100uF VN10 LO 10uH CB 0.1uF + LO 10uH CO 0.22uF CB 0.1uF CS D MUR120 0.1uF B VN10 R B 250 Ω + CS 0.1uF C HBR C HBR D D MUR120 0.1uF 33uF C SW 0.1uF L SW 100uH CB 220pF D S MUR120 RS 0.01 Ω , 1W RB 16 Ω , 1W + C HBR C HBR D D MUR120 0.1uF 33uF CS D MUR120 0.1uF B VN10 R B 250 Ω + VPP CS 330uF VPP CS 330uF VNN CS 330uF CO 0.22uF C BAUX 47uF + VNN CS 330uF C BAUX 47uF + 10 of 10 + TP2350 CZ 0.22uF RZ 20 Ω , 2W CZ 0.22uF RZ 20 Ω , 2W RL 4 Ω or 8 Ω RL 4 Ω or 8 Ω Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Application/Test Circuit TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on External Components Description (Refer to the Application/Test Circuit) Components RI RF CI RFBA RFBB RFBC CFB ROFA ROFB RREF CA DB CB CBAUX RB CS RVNN1 11 of 11 Description Inverting input resistance to provide AC gain in conjunction with RF. This input is biased at the BIASCAP voltage (approximately 2.5VDC). Feedback resistor to set AC gain in conjunction with RI. Please refer to the Amplifier Gain paragraph, in the Application Information section. AC input coupling capacitor which, in conjunction with RI, forms a highpass filter at fC = 1 (2πRICI ) . Feedback divider resistor connected to V5. This resistor is normally set at 1kΩ. Feedback divider resistor connected to AGND. This value of this resistor depends on the supply voltage setting and helps set the TK2350 gain in conjunction with RI, RF, RFBA, and RFBC. Please see the Modulator Feedback Design paragraphs in the Application Information Section. Feedback resistor connected from either the OUT1(OUT2) to FBKOUT1(FBKOUT2) or speaker ground to FBKGND1(FBKGND2). The value of this resistor depends on the supply voltage setting and helps set the TK2350 gain in conjunction with RI, RF, RFBA,, and RFBB. It should be noted that the resistor from OUT1(OUT2) to FBKOUT1(FBKOUT2) must have a power rating of greater than PDISS = VPP2 (2RFBC) . Please see the Modulator Feedback Design paragraphs in the Application Information Section. Feedback delay capacitor that both lowers the idle switching frequency and filters very high frequency noise from the feedback signal, which improves amplifier performance. The value of CFB should be offset between channel 1 and channel 2 so that the idle switching difference is greater than 40kHz. Please refer to the Application / Test Circuit. Potentiometer used to manually trim the DC offset on the output of the TK2350. Resistor that limits the manual DC offset trim range and allows for more precise adjustment. Bias resistor. Locate close to pin 15 of the TC2001 and ground at pin 20 of the TC2001. BIASCAP decoupling capacitor. Should be located close to pin 1 of the TC2001 and grounded at pin 20 of the TC2001. Bootstrap diode. This diode charges up the bootstrap capacitors when the output is low (at VNN) to drive the high side gate circuitry. A fast or ultra fast recovery diode is recommended for the bootstrap circuitry. In addition, the bootstrap diode must be able to sustain the entire VPP-VNN voltage. Thus, for most applications, a 150V (or greater) diode should be used. High frequency bootstrap capacitor, which filters the high side gate drive supply. This capacitor must be located as close to VBOOT1 (pin 57 of the TP2350B) or VBOOT2 (pin 27 of the TP2350B) for reliable operation. The “negative” side of CB should be connected directly to the HO1COM (pin 47 of the TP2350B) or HO2COM (pin 37 of the TP2350B). Please refer to the Application / Test Circuit. Bulk bootstrap capacitor that supplements CB during “clipping” events, which result in a reduction in the average switching frequency. Bootstrap resistor that limits CBAUX charging current during TK2350 power up (bootstrap supply charging). Supply decoupling for the power supply pins. For optimum performance, these components should be located close to the TC2001 and TP2350B and returned to their respective ground as shown in the Application/Test Circuit. Main overvoltage and undervoltage sense resistor for the negative supply (VNN). Please refer to the Electrical Characteristics Section for the trip points as well as the hysteresis band. Also, please refer to the Over / Under-voltage Protection section in the Application Information for a detailed discussion of the internal circuit operation and external component selection. TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on RVNN2 RVPP1 RVPP2 RS ROCR COCR CHBR RG DG CZ RZ LO CO DD 12 of 12 Secondary overvoltage and undervoltage sense resistor for the negative supply (VNN). This resistor accounts for the internal VNNSENSE bias of 1.25V. Nominal resistor value should be three times that of RVNN1. Please refer to the Over / Undervoltage Protection section in the Application Information for a detailed discussion of the internal circuit operation and external component selection. Main overvoltage and undervoltage sense resistor for the positive supply (VPP). Please refer to the Electrical Characteristics Section for the trip points as well as the hysteresis band. Also, please refer to the Over / Under-voltage Protection section in the Application Information for a detailed discussion of the internal circuit operation and external component selection. Secondary overvoltage and undervoltage sense resistor for the positive supply (VPP). This resistor accounts for the internal VPPSENSE bias of 2.5V. Nominal resistor value should be equal to that of RVPP1. Please refer to the Over / Undervoltage Protection section in the Application Information for a detailed discussion of the internal circuit operation and external component selection. Over-current sense resistor. Please refer to the section, Setting the Over-current Threshold, in the Application Information for a discussion of how to choose the value of RS to obtain a specific current limit trip point. Over-current “trim” resistor, which, in conjunction with RS, sets the current trip point. Please refer to the section, Setting the Over-current Threshold, in the Application Information for a discussion of how to calculate the value of ROCR. Over-current filter capacitor, which filters the overcurrent signal at the OCR pins to account for the half-wave rectified current sense circuit internal to the TC2001. A typical value for this component is 220pF. In addition, this component should be located near pin 14 or pin 16 of the TC2001 as possible. Supply decoupling for the high current Half-bridge supply pins. These components must be located as close to the output MOSFETs as possible to minimize output ringing which causes power supply overshoot. By reducing overshoot, these capacitors maximize both the TP2350B and output MOSFET reliability. These capacitors should have good high frequency performance including low ESR and low ESL. In addition, the capacitor rating must be twice the maximum VPP voltage. Panasonic EB capacitors are ideal for the bulk storage (nominally 33uF) due to their high ripple current and high frequency design. Gate resistor, which is used to control the MOSFET rise/ fall times. This resistor serves to dampen the parasitics at the MOSFET gates, which, in turn, minimizes ringing and output overshoots. The typical power rating is 1 watt. Gate diode, placed in parallel to the gate resistor. This diode will help discharge the parasitic capacitance at the MOSFET gates, thus decreasing the MOSFET fall time. This helps reduce shoot through current between the top side and bottom side output MOSFETs. Zobel capacitor, which in conjunction with RZ, terminates the output filter at high frequencies. Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. Zobel resistor, which in conjunction with CZ, terminates the output filter at high frequencies. The combination of RZ and CZ minimizes peaking of the output filter under both no load conditions or with real world loads, including loudspeakers which usually exhibit a rising impedance with increasing frequency. Depending on the program material, the power rating of RZ may need to be adjusted. The typical power rating is 2 watts. Output inductor, which in conjunction with CO, demodulates (filters) the switching waveform into an audio signal. Forms a second order filter with a cutoff frequency of f C = 1 ( 2 π L O C O ) and a quality factor of Q = R L C O L O C O . Output capacitor, which, in conjunction with LO, demodulates (filters) the switching waveform into an audio signal. Forms a second order low-pass filter with a cutoff frequency of f C = 1 ( 2 π L O C O ) and a quality factor of Q = R L C O L O C O . Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. Drain diode. This diode must be connected from the drain of the high side output TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on DS RB MOSFET to the drain of the low side output MOSFET. This diode absorbs any high frequency overshoots caused by the output inductor LO during high output current conditions. In order for this diode to be effective it must be connected directly to the drains of both the top and bottom side output MOSFET. An ultra fast recovery diode that can sustain the entire VPP-VNN voltage should be used here. In most applications a 150V or greater diode must be used. Source diode. This diode must be connected from the source of the high side output MOSFET to the source of the low side output MOSFET. This diode absorbs any high frequency undershoots caused by the output inductor LO during high output current conditions. In order for this diode to be effective it must be connected directly to the sources of both the top and bottom sides output MOSFETs. An ultra fast recovery diode that can sustain the entire VPP-VNN voltage should be used here. In most applications a 150V or greater diode must be used. Output MOSFET snubber resistor. This resistor forms a low pass filter with CO with a frequency of fC = 1 (2πRBCB ) . This RC filter removes any high frequency overshoots that can be present on the switching output waveform. This RC filter must be connected right across the drain and source of the low side output MOSFET. CB RS RPG QB DSW LSW CSW RSWFB CSWFB 13 of 13 Output MOSFET snubber capacitor. This resistor forms a low pass filter with RB with a frequency of fC = 1 (2πRBCB ) . This RC filter removes any high frequency overshoots that can be present on the switching output waveform. This RC filter must be connected right across the drain and source of the low side output MOSFET. Source resistor. This resistor is in series between HOCOM and the source of the top side output MOSFET. This resistor serves to limit the voltage swing at the HOCOM pin (pins 37 and 47 of the TP2350B) to protect the TP2350B during any output overshoots/undershoots. Since this resistor alters the rise and fall times of the gate on the high side output MOSFET an additional resistor of the same value is placed in series with LOCOM and the source of the bottom side output MOSFET to match the rise and fall times of the top side to the bottom side. Gate resistor for the output MOSFET for the switchmode power supply. Controls the rise time, fall time, and reduces ringing for the gate of the output MOSFET for the switchmode power supply. Output MOSFET for the switchmode power supply to generate the VN10. This output MOSFET must be a P channel device. Flywheel diode for the internal VN10 buck converter. This diode also prevents VN10SW from going more than one diode drop negative with respect to VNN. VN10 generator filter inductor. This inductor should be sized appropriately so that LSW pass 0.5A of current without saturation, and VN10 does not overshoot with respect to VNN during TK2350 turn on. VN10 generator filter capacitors. The high frequency capacitor (0.1uF) must be located close to the VN10 pins (pin 41 and 43 of the TP2350B) to maximize device performance. The bulk capacitor (100uF) should be sized appropriately such that the VN10 voltage does not overshoot with respect to VNN during TK2350 turn on. VN10 generator feedback resistor. This resistor sets the nominal VN10 voltage. With RSWFB equal to 1kΩ, the VN10 voltage generated will typically be 11V above VNN. VN10 generator feedback capacitor. This capacitor, in conjunction with RSWFB, filters the VN10 feedback signal such that the loop is unconditionally stable. TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Typical Performance 5 2 100 f = 1kHz BBM = 80nS Vs =+28V BW = 22Hz - 22kHz RL = 8Ω 70 Efficiency (%) RL = 4Ω 0.2 60 50 40 0.1 30 0.05 20 0 2 5 10 20 50 100 200 0 Output Power (W) 19kHz, 20kHz, 1:1 Pout = 40W/Channel 0dBr = 12.65Vrms Vs = +28V BW = 22Hz - 22kHz FFT (dBr) -50 -70 -80 120 Intermodulation Performance RL = 8Ω -60 -70 -80 -90 -90 -100 -100 -110 -110 50 100 200 500 1k 2k 5k 10k -120 20 20k 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) Frequency (Hz) Noise Floor Channel Separation versus Frequency -70 -40 -55 100 19kHz, 20kHz, 1:1 Pout = 20W/Channel 0dBr = 12.65Vrms Vs =+28V BW = 22Hz - 22kHz -30 -60 -50 80 -20 -50 -45 60 -10 -40 -120 20 40 +0 -40 VS =+28V BBM = 80nS 16K FFT -80 Fs = 48kHz BW = 22Hz - 22kHz -75 Pout = 40W/Channel @ 4Ω Pout = 20W/Channel @ 8Ω VS = +28V BW = 22Hz - 22kHz Noise FFT (dBV) -60 -65 Channel Separation (dBr) FFT (dBr) -30 20 Output Power (W) Intermodulation Performance RL = 4Ω +0 -20 f = 1kHz BBM = 80nS Vs =+28V THD+N =<10% 10 0.02 -10 RL = 4Ω 80 0.5 0.01 RL = 8Ω 90 1 THD+N (%) Efficiency versus Output Power THD+N versus Output Power 10 -70 -75 -80 -85 -85 -90 -95 -100 RL = 4Ω -90 -105 -95 -100 -110 -105 RL = 8Ω -115 -110 -115 -120 20 50 100 200 500 Frequency (Hz) 14 of 14 1k 2k 5k 10k 20k -120 20 50 100 200 500 1k 2k 5k Frequency (Hz) TK2350, Rev 1.5/09.03 10k 20k Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Typical Performance THD+N versus Frequency versus Break Before Make RL = 8Ω THD+N versus Frequency versus Break Before Make RL = 4Ω 10 10 5 Pout = 40W/Channel Vs =+28V BW = 22Hz - 22kHz 5 2 2 1 THD+N (%) 1 THD+N (%) Pout = 20W/Channel Vs =+28V BW = 22Hz - 22kHz 0.5 0.2 0.5 0.2 BBM = 120nS BBM = 120nS 0.1 0.1 0.05 0.05 0.02 0.02 0.01 20 BBM = 80nS 50 100 200 500 1k 2k BBM = 80nS 5k 10k 20k 0.01 20 50 100 200 5 THD+N versus Frequency versus Bandwidth RL = 4Ω 2k 5k 10k 20k 5k 10k 20k THD+N versus Frequency versus Bandwidth RL = 8Ω 10 Pout = 40W/Channel Vs =+28V BBM = 80nS 5 2 Pout = 20W/Channel Vs =+28V BBM = 80nS 2 1 1 0.5 0.5 THD+N (%) THD+N (%) 1k Frequency (Hz) Frequency (Hz) 10 500 0.2 0.1 0.2 0.1 BW = 30kHz 0.05 0.05 0.02 BW = 30kHz 0.02 BW = 22kHz 0.01 20 50 100 200 500 1k 2k 5k 10k 20k 0.01 20 BW = 22kHz 50 100 200 Frequency (Hz) THD+N versus Output Power versus Supply Voltage RL = 4Ω 10 5 1k 2k 5 23V 28V THD+N versus Output Power versus Supply Voltage RL = 8Ω 10 f = 1kHz BBM = 80nS BW = 22Hz - 22kHz 2 f = 1kHz BBM = 80nS BW = 22Hz - 22kHz 2 35V 1 23V 28V 35V THD+N (%) THD+N (%) 1 0.5 0.5 0.2 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 1 500 Frequency (Hz) 2 5 10 20 Output Power (W) 15 of 15 50 100 200 0.01 2 5 10 20 50 100 Output Power (W) TK2350, Rev 1.5/09.03 200 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Typical Performance Efficiency versus Output Power THD+N versus Output Power 100 10 5 RL = 8Ω f = 1kHz BBM = 80nS Vs =+45V BW = 22Hz - 22kHz RL = 4Ω 80 2 RL = 8Ω RL = 4Ω Efficiency (%) 1 THD+N (%) 0.5 0.2 60 40 0.1 0.05 f = 1kHz BBM = 80nS Vs = +45V THD+N <10% 20 0.02 0 0.01 2 5 10 20 50 100 200 0 500 50 100 150 Intermodulation Performance RL = 4Ω +0 250 300 Intermodulation Performance RL = 8Ω +0 19kHz, 20kHz, 1:1 Pout = 30W/Channel 0dBr = 15.5Vrms -20 Vs =+45V BW = 22Hz - 22kHz 19kHz, 20kHz, 1:1 Pout = 60W/Channel 0dBr = 15.5Vrms -20 Vs = +45V BW = 22Hz - 22kHz -10 -10 -30 -30 -40 -40 FFT (dBr) -50 -60 -70 -50 -60 -70 -80 -80 -90 -90 -100 -100 -110 -110 -120 20 50 100 200 500 1k 2k 5k 10k -120 20 20k 50 100 200 -50 -55 1k 2k 5k 10k 20k Noise Floor Channel Separation versus Frequency -70 VS = +/-45V BBM = 80nS 16kFFT FS = 48kHz BW = 22Hz-22kHz -40 -45 500 Frequency (Hz) Frequency (Hz) Pout = 60W/Channel @ 4Ω Pout = 30W/Channel @ 8Ω VS = +45V BW = 22Hz - 22kHz -75 -80 -60 -85 -65 Amplitude (dBV) Channel Separation (dBr) FFT (dBr) 200 Output Power (W) Output Power (W) -70 -75 -80 -85 RL = 4Ω -90 -95 -90 -95 -100 -105 -100 RL = 8Ω -105 -110 -110 -115 -115 -120 20 50 100 200 500 Frequency (Hz) 16 of 16 1k 2k 5k 10k 20k -120 20 50 100 200 500 1k 2k Frequency (Hz) TK2350, Rev 1.5/09.03 5k 10k 20k Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Typical Performance THD+N versus Frequency versus Break Before Make RL = 4Ω 10 5 THD+N versus Frequency versus Break Before Make RL = 8Ω 10 Pout = 60W/Channel Vs =+45V BW = 22Hz - 22kHz 5 2 Pout = 30W/Channel Vs =+45V BW = 20Hz - 22kHz 2 1 THD+N (%) THD+N (%) 1 0.5 0.5 0.2 0.2 BBM = 120nS BBM = 120nS 0.1 0.1 0.05 0.05 BBM = 80nS 0.02 0.02 BBM = 80nS 0.01 20 50 100 200 500 1k 2k 5k 10k 0.01 20 20k 50 100 200 500 2k 5k 10k 20k 5k 10k 20k Frequency (Hz) Frequency (Hz) THD+N versus Frequency versus Bandwidth RL = 4Ω THD+N versus Frequency versus Bandwidth RL = 8Ω 10 5 1k 10 Pout = 60W/Channel Vs =+45V BBM = 80nS 5 Pout = 30W/Channel Vs =+45V BBM = 80nS 2 2 1 THD+N (%) THD+N (%) 1 0.5 0.2 BW = 30kHz 0.1 0.5 0.2 BW = 30kHz 0.1 0.05 0.05 BW = 22kHz 0.02 0.02 0.01 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) BW = 22kHz 0.01 20 50 100 200 500 1k 2k Frequency (Hz) THD+N versus Output Power versus Supply Voltage RL = 4Ω 10 5 f = 1kHz BBM = 80nS BW = 22Hz - 22kHz 5 2 39V 45V f = 1kHz BBM = 80nS BW = 22Hz - 22kHz 2 54V 39V 1 45V 54V THD+N (%) THD+N (%) 1 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 1 THD+N versus Output Power versus Supply Voltage RL = 8Ω 10 2 5 10 20 Output Power (W) 17 of 17 50 100 200 500 0.01 2 5 10 20 50 100 Output Power (W) TK2350, Rev 1.5/09.03 200 500 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Application Information Figure 1 is a simplified diagram of one channel (Channel 1) of a TK2350 amplifier to assist in understanding its operation. TC 2001 BBM0 TP 2350B 26 BBM1 25 OAOUT1 22 RF RI CI + INV1 23 - 9 R O FB COF CA 50 OCS1HN 57 VBOOT1 Y1 17 2.5V Y1B 16 CB 0.1uF + C BA U X OUTPUT FILTER RL 45 LO1COM 54 OCS1LP RS 53 OCS1LN VN10 V5 QO RG 44 LO1 OVER CURRENT DETECTION BIASCAP 1 VN10 CHBR VN10 10 DB RB 47 HO1COM Processing & M odulation CS QO RG 48 HO1 AGND V5 Offset Trim Circuit VPP RS V5 + R O FB R O FA 51 OCS1HP OVER CURRENT DETECTION VNN 41,43 VN10 CS C SW 5V MUTE 24 VNN 42 OCR1 7 6 V5 REF 15 VNNSENSE 17 VNN R VP P1 VPPSENSE 19 VPP OVER/ UNDER VOLTAGE DETECTION 16 OCR1 OVER CURRENT DETECTION R VN N 2 V5 R VP P1 V5 5V CS ROCR R FBA FBKOUT1 7 FBKGND1 8 20 F. BEAD R FBA R FBC C FB V5 21 AGND V5 COCR 6 5V CS 5 AGND RREF R VN N 1 VNN VNN R FBC R FBB R FBB HMUTE Analog Ground Power Ground Figure 1: Simplified TK2350 Amplifier TK2350 Basic Amplifier Operation The audio input signal is fed to the processor internal to the TC2001, where a switching pattern is generated. The average idle (no input) switching frequency is approximately 700kHz. With an input signal, the pattern is spread spectrum and varies between approximately 200kHz and 1.5MHz depending on input signal level and frequency. Complementary copies of the switching pattern is output through the Y1 and Y1B pins on the TC2001. These switching patterns are input to the TP230 where they are level-shifted by the MOSFET drivers and then output to the gates (HO1 and LO1) of external power MOSFETs that are connected as a half bridge. The output of the half bridge is a power-amplified version of the switching pattern that switches between VPP and VNN. This signal is then low-pass filtered to obtain an amplified reproduction of the audio input signal. The TC2001 processor is operated from a 5-volt supply. In the generation of the switching patterns for the output MOSFETs, the processor inserts a “break-before-make” dead time between the turn-off of one transistor and the turn-on of the other in order to minimize shoot-through currents in the external MOSFETs. The dead time can be programmed by setting the breakbefore-make control bits, BBM1 and BBM0. Feedback information from the output of the halfbridge is supplied to the processor via FBKOUT1. Additional feedback information to account for ground bounce is supplied via FBKGND1. 18 of 18 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on The MOSFET drivers in the TP2350B are operated from voltages obtained from VN10 and LO1COM for the low-side driver, and VBOOT1 and HO1COM for the high-side driver. VN10 must be a regulated 10V above VNN. N-Channel MOSFETs are used for both the top and bottom of the half bridge. The gate resistors, RG, are used to control MOSFET slew rate and thereby minimize voltage overshoots. Circuit Board Layout The TK2350 is a power (high current) amplifier that operates at relatively high switching frequencies. The output of the amplifier switches between VPP and VNN at high speeds while driving large currents. This high-frequency digital signal is passed through an LC low-pass filter to recover the amplified audio signal. Since the amplifier must drive the inductive LC output filter and speaker loads, the amplifier outputs can be pulled above the supply voltage and below ground by the energy in the output inductance. To avoid subjecting the TK2350 to potentially damaging voltage stress, it is critical to have a good printed circuit board layout. It is recommended that Tripath’s layout and application circuit be used for all applications and only be deviated from after careful analysis of the effects of any changes. Please refer to the TK2350 evaluation board document, RB-TK2350, available on the Tripath website, at www.tripath.com. The following components are important to place near either their associated TK2350 or output MOSFET pins. The recommendations are ranked in order of layout importance, either for proper device operation or performance considerations. - The capacitors, CHBR, provide high frequency bypassing of the amplifier power supplies and will serve to reduce spikes across the supply rails. Please note that both mosfet half-bridges must be decoupled separately. In addition, the voltage rating for CHBR should be at least 150V as this capacitor is exposed to the full supply range, VPP-VNN. - CFB removes very high frequency components from the amplifier feedback signals and lowers the output switching frequency by delaying the feedback signals. In addition, the value of CFB is different for channel 1 and channel 2 to keep the average switching frequency difference greater than 40kHz. This minimizes in-band audio noise. Locate these capacitors as close to their respective TC2001 pin as possible. - To minimize noise pickup and minimize THD+N, RFBC should be located as close to the TC2001 as possible. Make sure that the routing of the high voltage feedback lines is kept far away from the input op amps or significant noise coupling may occur. It is best to shield the high voltage feedback lines by using a ground plane around these traces as well as the input section. The feedback and feedback ground traces should be routed together in parallel. - CB, CSW provides high frequency bypassing for the VN10 and bootstrap supplies. Very high currents are present on these supplies. In general, to enable placement as close to the TK2350, and minimize PCB parasitics, the capacitors CFB, CB and CSW should be surface mount types, located on the “solder” side of the board. 19 of 19 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Some components are not sensitive to location but are very sensitive to layout and trace routing. - To maximize the damping factor and reduce distortion and noise, the modulator feedback connections should be routed directly to the pins of the output inductors. LO. Please refer to the RB-TK2350 for more information. - The output filter capacitor, CO, and zobel capacitor, CZ, should be star connected with the load return. The output ground feedback signal should be taken from this star point. - The modulator feedback resistors, RFBA and RFBB, should all be grounded and attached to 5V together. These connections will serve to minimize common mode noise via the differential feedback. Please refer to the RB-TK2350 evaluation board for more information. - The feedback signals that come directly from the output inductors are high voltage and high frequency in nature. If they are routed close to the input nodes, INV1 and INV2, the high impedance inverting opamp pins will pick up noise. This coupling will result in significant background noise, especially when the input is AC coupled to ground, or an external source such as a CD player or signal generator is connected. Thus, care should be taken such that the feedback lines are not routed near any of the input section. - To minimize the possibility of any noise pickup, the trace lengths of INV1 and INV2 should be kept as short as possible. This is most easily accomplished by locating the input resistors, RI and the input stage feedback resistors, RF as close to the TC2001 as possible. In addition, the offset trim resistor, ROFB, which connects to either INV1, or INV2, should be located close to the TC2001 input section. TK2350 Grounding Proper grounding techniques are required to maximize TK2350 functionality and performance. Parametric parameters such as THD+N, Noise Floor and Crosstalk can be adversely affected if proper grounding techniques are not implemented on the PCB layout. The following discussion highlights some recommendations about grounding both with respect to the TK2350 as well as general “audio system” design rules. The TK2350 is divided into three sections: the input section, which is the TC2001, the MOSFET driver section, which is the TP2350B, and the output (high voltage) section, which is the output MOSFETs. On the TK2350 evaluation board, the ground is also divided into distinct sections, one for the input and the MOSFET driver, and another one for the output. To minimize ground loops and keep the audio noise floor as low as possible, the two grounds must be only connected at a single point. Depending on the system design, the single point connection may be in the form of a ferrite bead or a PCB trace. The analog grounds, must be connected to pin 20 on the TC2001 and pin 5 on the TP2350B. The ground for the V5 power supply should connect directly to pin 20 of the TC2001. Additionally, any external input circuitry such as preamps, or active filters, should be referenced to pin 20 on the TC2001. For the power section, Tripath has traditionally used a “star” grounding scheme. Thus, the load ground returns and the power supply decoupling traces are routed separately back to the power supply. In addition, any type of shield or chassis connection would be connected directly to the ground star located at the power supply. These precautions will both minimize audible noise and enhance the crosstalk performance of the TK2350. 20 of 20 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on The TC2001 incorporates a differential feedback system to minimize the effects of ground bounce and cancel out common mode ground noise. As such, the feedback from the output ground for each channel needs to be properly sensed. This can be accomplished by connecting the output ground “sensing” trace directly to the star formed by the output ground return, output capacitor, CO, and the zobel capacitor, CZ. Refer to the Application / Test Circuit for a schematic description. TK2350 Amplifier Gain The gain of the TK2350 is the product of the input stage gain and the modulator gain for the TC2001. Please refer to the sections, Input Stage Design, and Modulator Feedback Design, for a complete explanation of how to determine the external component values. A VTK2350 = A VINPUTSTAG A VTK2350 ≈ − E * A V MODULATOR R F R FBC * (R FBA + R FBB ) + 1 RI R FBA * R FBB For example, using a TC2001 with the following external components, RI = 20kΩ RF = 20kΩ RFBA = 1kΩ RFBB = 1.07kΩ RFBC = 13.3kΩ A VTK2350 ≈ − V 20k Ω 13.3k Ω * (1.0k Ω + 1.07k Ω ) + 1 = - 10.71 49.9k Ω 1.0k Ω * 1.07k Ω V Input Stage Design The TC2001 input stage is configured as an inverting amplifier, allowing the system designer flexibility in setting the input stage gain and frequency response. Figure 2 shows a typical application where the input stage is a constant gain inverting amplifier. The input stage gain should be set so that the maximum input signal level will drive the input stage output to 4Vpp. The gain of the input stage, above the low frequency high pass filter point, is that of a simple inverting amplifier: A VINPUTSTAG 21 of 21 E =− RF RI TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TC2001 O AO UT1 22 CI RI V5 RF INV 1 23 + INPUT1 + AGND BIASCAP V5 CI RI INV 2 28 + INPUT2 + - RF O AO UT2 27 AGND Figure 2: TC2001 Input Stage Input Capacitor Selection CIN can be calculated once a value for RIN has been determined. CIN and RIN determine the input low-frequency pole. Typically this pole is set at 10Hz. CIN is calculated according to: CIN = 1 / (2π x FP x RIN) where: RIN = Input resistor value in ohms FP = Input low frequency pole (typically 10Hz) Modulator Feedback Design The modulator converts the signal from the input stage to the high-voltage output signal. The optimum gain of the modulator is determined from the maximum allowable feedback level for the modulator and maximum supply voltages for the power stage. Depending on the maximum supply voltage, the feedback ratio will need to be adjusted to maximize performance. The values of RFBA, RFBB and RFBC (see explanation below) define the gain of the modulator. Once these values are chosen, based on the maximum supply voltage, the gain of the modulator will be fixed even with as the supply voltage fluctuates due to current draw. For the best signal-to-noise ratio and lowest distortion, the maximum modulator feedback voltage should be approximately 4Vpp. This will keep the gain of the modulator as low as possible and still allow headroom so that the feedback signal does not clip the modulator feedback stage. Figure 3 shows how the feedback from the output of the amplifier is returned to the input of the modulator. The input to the modulator (FBKOUT1/FBKGND1 for channel 1) can be viewed as inputs to an inverting differential amplifier. RFBA and RFBB bias the feedback signal to approximately 2.5V and RFBC scales the large OUT1/OUT2 signal to down to 4Vpp. 22 of 22 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on 1/2 TC2001 V5 R FBA Processing & Modulation R FBA R FBC FBKO UT1 28 OUT1 FBKG ND1 27 OUT1 GROUND R FBC R FBB R FBB AGND Figure 3: Modulator Feedback The modulator feedback resistors are: R FBA = User specified, typically 1K Ω R FBA * VPP R FBB = (VPP - 4) R FBA * VPP R FBC = 4 R FBC * (R FBA + R FBB ) +1 A V - MODULATOR ≈ R FBA * R FBB The above equations assume that VPP=|VNN|. For example, in a system with VPPMAX=52V and VNNMAX=-52V, RFBA = 1kΩ, 1% RFBB = 1.08kΩ, use 1.07kΩ, 1% RFBC = 13.0kΩ, use 13.3kΩ, 1% The resultant modulator gain is: AV - MODULATOR 23 of 23 ≈ 13.3k Ω * (1.0k Ω + 1.07k Ω ) + 1 = 26.73V/V 1.0k Ω * 1.07k Ω TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Mute When a logic high signal is supplied to MUTE, both amplifier channels are muted (both high- and low-side transistors are turned off). When a logic level low is supplied to MUTE, both amplifiers are fully operational. There is a delay of approximately 200 milliseconds between the de-assertion of MUTE and the un-muting of the TK2350. Turn-on & Turn-off Noise If turn-on or turn-off noise is present in a TK2350 amplifier, the cause is frequently due to other circuitry external to the TK2350. While the TK2350 has circuitry to suppress turn-on and turn-off transients, the combination of the power supply and other audio circuitry with the TK2350 in a particular application may exhibit audible transients. One solution that will completely eliminate turn-on and turn-off pops and clicks is to use a relay to connect/disconnect the amplifier from the speakers with the appropriate timing at power on/off. The relay can also be used to protect the speakers from a component failure (e.g. shorted output MOSFET), which is a protection mechanism that some amplifiers have. Circuitry external to the TK2350 would need to be implemented to detect these failures. DC Offset While the DC offset voltages that appear at the speaker terminals of a TK2350 amplifier are typically small, Tripath recommends that any offsets during operation be nulled out of the amplifier with a circuit like the one shown connected to IN1 and IN2 in the Test/Application Circuit. It should be noted that the DC voltage on the output of a TK2350 amplifier with no load in mute will not be zero. This offset does not need to be nulled. The output impedance of the amplifier in mute mode is approximately 10KΩ. This means that the DC voltage drops to essentially zero when a typical load is connected. HMUTE The HMUTE pin on the TC2001 is a 5V logic output that indicates various fault conditions within the device. These conditions include: over-current, overvoltage and undervoltage. The HMUTE output is capable of directly driving an LED through a series 2kΩ resistor. Over-current Protection The TK2350 has over-current protection circuitry to protect itself and the output transistors from short-circuit conditions. The TK2350 uses the voltage across a resistor RS (measured via OCS1HP, OCS1HN, OCS1LP and OCS1LN of the TP2350B) that is in series with each output MOSFET to detect an over-current condition. RS and ROCR are used to set the over-current threshold. The OCS pins must be Kelvin connected for proper operation. See “Circuit Board Layout” in Application Information for details. When the voltage across ROCR becomes greater than VTOC (typically 0.97V) the TC2001 will shut off the output stages of its amplifiers. The occurrence of an over-current condition is latched in the TK2350 and can be cleared by toggling the MUTE input or cycling power. Setting Over-current Threshold RS and ROCR determine the value of the over-current threshold, ISC: ISC = 3580 x (VTOC – IBIAS * ROCR)/(R OCR * RS) ROCR = (3580 x VTOC)/(ISC * RS+3580 * IBIAS) 24 of 24 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on where: RS and ROCR are in Ω VTOC = Over-current sense threshold voltage (See Electrical Characteristics Table) = 0.97V typically IBIAS = 20uA For example, to set an ISC of 30A, ROCR = 9.63KΩ and RS will be 10mΩ. As high-wattage resistors are usually only available in a few low-resistance values (10mΩ, 25mΩ and 50mΩ), ROCR can be used to adjust for a particular over-current threshold using one of these values for RS. It should be noted that the addition of the bulk CHBR capacitor shown in the Application / Test Diagram will increase the ISC level. Thus, it will be larger than the theoretical value shown above. Once the designer has settled on a layout and specific CHBR value, the system ISC trip point can be adjusted by increasing the ROCR value. The ROCR should be increased to a level that allows expected range of loads to be driven well into clipping without current limiting while still protecting the output MOSFETs in case of a short circuit condition. Auto Recovery Circuit for Overcurrent Fault Condition If an overcurrent fault condition occurs the HMUTE pin (pin 8 of the TC2001) will be latched high and the amplifier will be muted. The amplifier will remain muted until the MUTE pin (pin 24 of the TC2001) is toggled high and then low or the power supplies are turned off and then on again. The circuit shown below in Figure 4 is a circuit that will detect if HMUTE is high and then toggle the mute pin high and then low, thus resetting the amplifier. The LED, D1 will turn on when HMUTE is high. The reset time has been set for approximately 2.5 seconds. The duration of the reset time is controlled by the RC time constant set by R306 and C311. To increase the reset, time increase the value of C311. To reduce the reset time, reduce the value of C311. Please note that this circuit is optional and is not included on the RB-TK2350-X evaluation boards. V5 D1 R311 LED 1k Ω , 5% R306 510k Ω , 5% R307 10k Ω , 5% R308 10k Ω , 5% R309 1k Ω , 5% Q305 2N3906 R311 1k Ω , 5% HMUTE Pin 8 R311 1k Ω , 5% MUTE Pin 24 C311 10uF, NP Q302 2N3904 Q303 2N7002 Jumper Q304 2N3904 R310 1k Ω , 5% rem ove jumper to enable m ute AGND Figure 4: Overcurrent Autorecovery Circuit 25 of 25 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Over- and Under-Voltage Protection The TC2001 senses the power rails through external resistor networks connected to VNNSENSE and VPPSENSE. The over- and under-voltage limits are determined by the values of the resistors in the networks, as described in the table “Test/Application Circuit Component Values”. If the supply voltage falls outside the upper and lower limits determined by the resistor networks, the TC2001 shuts off the output stages of the amplifiers. The removal of the over-voltage or undervoltage condition returns the TK2350 to normal operation. Please note that trip points specified in the Electrical Characteristics table are at 25°C and may change over temperature. The TC2001 has built-in over and under voltage protection for both the VPP and VNN supply rails. The nominal operating voltage will typically be chosen as the supply “center point.” This allows the supply voltage to fluctuate, both above and below, the nominal supply voltage. VPPSENSE (pin 19) performs the over and undervoltage sensing for the positive supply, VPP. VNNSENSE (pin 17) performs the same function for the negative rail, VNN. When the current through RVPPSENSE (or RVNNSENSE) goes below or above the values shown in the Electrical Characteristics section (caused by changing the power supply voltage), the TK2350 will be muted. VPPSENSE is internally biased at 2.5V and VNNSENSE is biased at 1.25V. Once the supply comes back into the supply voltage operating range (as defined by the supply sense resistors), the TK2350 will automatically be unmuted and will begin to amplify. There is a hysteresis range on both the VPPSENSE and VNNSENSE pins. If the amplifier is powered up in the hysteresis band the TK2350 will be muted. Thus, the usable supply range is the difference between the over-voltage turn-off and under-voltage turn-off for both the VPP and VNN supplies. It should be noted that there is a timer of approximately 200mS with respect to the over and under voltage sensing circuit. Thus, the supply voltage must be outside of the user defined supply range for greater than 200mS for the TK2350 to be muted. Figure 5 shows the proper connection for the Over / Under voltage sense circuit for both the VPPSENSE and VNNSENSE pins. V5 VNN TC2001 R VNN2 R VNN1 17 V5 R VPP2 VNNSENSE VPP R VPP1 19 VPPSENSE Figure 5: Over / Under voltage sense circuit The equation for calculating RVPP1 is as follows: R VPP1 = VPP I VPPSENSE Set R VPP2 = R VPP1 . 26 of 26 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on The equation for calculating RVNNSENSE is as follows: R VNN1 = VNN I VNNSENSE Set R VNN2 = 3 × R VNN1 . IVPPSENSE or IVNNSENSE can be any of the currents shown in the Electrical Characteristics table for VPPSENSE and VNNSENSE, respectively. The two resistors, RVPP2 and RVNN2 compensate for the internal bias points. Thus, RVPP1 and RVNN1 can be used for the direct calculation of the actual VPP and VNN trip voltages without considering the effect of RVPP2 and RVNN2. Using the resistor values from above, the actual minimum over voltage turn off points will be: VPP MIN_OV_TUR VNN MIN_OV_TUR = R VPP1 × I VPPSENSE (MIN_OV_TU RN_OFF) N_OFF = − ( R VNN1 × I VNNSENSE (MIN_OV_TU RN_OFF) ) N_OFF The other three trip points can be calculated using the same formula but inserting the appropriate IVPPSENSE (or IVNNSENSE) current value. As stated earlier, the usable supply range is the difference between the minimum overvoltage turn off and maximum under voltage turn-off for both the VPP and VNN supplies. VPP RANGE = VPP MIN_OV_TUR N_OFF - VPP MAX_UV_TUR N_OFF VNN RANGE = VNN MIN_OV_TUR N_OFF - VNN MAX_UV_TUR N_OFF VN10 Supply and Switch Mode Power Supply Controller VN10 is an additional supply voltage required by the TP2350B. VN10 must be 10 volts more positive than the nominal VNN. VN10 must track VNN. Generating the VN10 supply requires some care. The proper way to generate the voltage for VN10 is to use a 10V-postive supply voltage referenced to the VNN supply. The TP2350B has an internal switch mode power supply controller which generates the necessary floating power supply for the MOSFET driver stage in the TP2350B (nominally 11V with the external components shown in Application / Test Circuit). The SMPSO pin (pin 60) provides a switching output waveform to drive the gate of a P channel MOSFET. The source of the P channel MOSFET should be tied to power ground and the drain of the MOSFET should be tied to the VN10 through a 100uH inductor. The performance curves shown in this datasheet as well as the efficiency measurements were done using the internal VN10 generator. Tripath recommends using the internal VN10 generator to power the TP2350B. Figure 6 shows how the VN10 generator should be connected. 27 of 27 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TP2350B R SW FB 1k Ω 59 SW -FB VN10 Switchm ode Power Supply C SW FB 0.1uF 60 SMPSO VNN R PG 10 Ω L SW 100uH QP VN10 D SW B1100DICT C SW 0.1uF + C SW 100uF VNN Figure 6: VN10 Generator In some cases, though, a designer may wish to use an external VN10 generator. The specification for VN10 quiescent current (200mA typical, 250mA maximum) in the Electrical Characteristics section states the amount of current needed when an external floating supply is used. If the internal VN10 generator is not used, Tripath recommends shorting SMPSO(pin 60) to VNN(pin 42) and SW-FB(pin 59) to VNN(pin 42). One apparent method to generate the VN10 supply voltage is to use a negative IC regulator to drop PGND down to 10V (relative to VNN). This method will not work since negative regulators only sink current into the regulator output and will not be capable of sourcing the current required by VN10. Furthermore, problems can arise since VN10 will not track movements in VNN. The external VN10 supply must be able to source a maximum of 250mA into the VN10 pin. Thus, a positive supply must be used and must be referenced to the VNN rail. If the external VN10 supply does not track fluctuations in the VNN supply or is not able to source current into the VN10 pin, the TP2350B will not work and can also become permanently damaged. Figure 7 shows the correct way to power the TK2350: VPP V5 VPP 5V AGND PGND VN10 VNN 10V VNN F. BEAD Figure 7: Proper Power Supply Connection 28 of 28 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Output Transistor Selection The key parameters to consider when selecting what MOSFET to use with the TK2350 are drainsource breakdown voltage (BVdss), gate charge (Qg), and on-resistance (RDS(ON)). The BVdss rating of the MOSFET needs to be selected to accommodate the voltage swing between VSPOS and VSNEG as well as any voltage peaks caused by voltage ringing due to switching transients. With a ‘good’ circuit board layout, a BVdss that is 50% higher than the VPP and VNN voltage swing is a reasonable starting point. The BVdss rating should be verified by measuring the actual voltages experienced by the MOSFET in the final circuit. Ideally a low Qg (total gate charge) and low RDS(ON) are desired for the best amplifier performance. Unfortunately, these are conflicting requirements since RDS(ON) is inversely proportional to Qg for a typical MOSFET. The design trade-off is one of cost versus performance. A lower RDS(ON) means lower I2RDS(ON) losses but the associated higher Qg translates into higher switching losses (losses = Qg x 10 x 1.2MHz). A lower RDS(ON) also means a larger silicon die and higher cost. A higher RDS(ON) means lower cost and lower switching losses but higher I2RDSON losses. The following table lists BVdss, Qg and RDS(ON) for MOSFETs that Tripath has used with the TK2350: Manufacturer ST Microelectronics ST Microelectronics International Rectifier International Rectifier Fairchild Manufacturer’s Part Number STW34NB20 STP19NB20 IRFB41N15D IRFB31N20D FQA34N20 BVdss 200 200 150 200 200 Qg (nanoCoulombs) 60 29 67 70 60 RDS(ON) (Max) (Ohms) 0.075 0.18 0.045 0.082 0.075 Gate Resistor Selection The gate resistors, RG, are used to control MOSFET switching rise/fall times and thereby minimize voltage overshoots. They also dissipate a portion of the power resulting from moving the gate charge each time the MOSFET is switched. If RG is too small, excessive heat can be generated in the driver. Large gate resistors lead to slower MOSFET switching, which requires a larger breakbefore-make (BBM) delay. Break-Before-Make (BBM) Timing Control The half-bridge power MOSFETs require a deadtime between when one transistor is turned off and the other is turned on (break-before-make) in order to minimize shoot through currents. The TC2001 has BBM0 and BBM1 that are logic inputs (connected to logic high or pulled down to logic low) that control the break-before-make timing of the output transistors according to the following table. BBM1 0 0 1 1 BBM0 0 1 0 1 Delay 120 ns 80 ns 40 ns 0 ns Table 1: BBM Delay The tradeoff involved in making this setting is that as the delay is reduced, distortion levels improve but shoot-through and power dissipation increase. Both the 40nS and 0nS settings are NOT recommended due the high level of shoot-thru current that will result. Thus, BBM1 should be grounded in most applications. All typical curves and performance information was done with 29 of 29 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on using the 80ns or 120ns BBM setting. The actual amount of BBM required is dependent upon other component values and circuit board layout, the value selected should be verified in the actual application circuit/board. It should also be verified under maximum temperature and power conditions since shoot-through in the output MOSFETs can increase under these conditions, possibly requiring a higher BBM setting than at room temperature. Output Filter Design One advantage of Tripath amplifiers over PWM solutions is the ability to use higher-cutofffrequency filters. This means load-dependent peaking/droop in the 20kHz audio band potentially caused by the filter can be made negligible. This is especially important for applications where the user may select a 4-Ohm or 8-Ohm speaker. Furthermore, speakers are not purely resistive loads and the impedance they present changes over frequency and from speaker model to speaker model. Tripath recommends designing the filter as a 2nd order, 100kHz LC filter. Tripath has obtained good results with LF = 11uH and CF = 0.22uF. The core material of the output filter inductor has an effect on the distortion levels produced by a TK2350 amplifier. Tripath recommends low-mu type-2 iron powder cores because of their low loss and high linearity (available from Micrometals, www.micrometals.com). The specific core used on the RB-TK2350 was a T106-2 wound with 29 turns of 16AWG wire. Tripath also recommends that an RC damper be used after the LC low-pass filter. No-load operation of a TK2350 amplifier can create significant peaking in the LC filter, which produces strong resonant currents that can overheat the output MOSFETs and/or other components. The RC dampens the peaking and prevents problems. Tripath has obtained good results with RD = 20Ω and CD = 0.22uF. Bridging the TK2350 The TK2350 can be bridged by returning the signal from VP1 to the input resistor at INV2. OUT1 will then be a gained version of VP1, and OUT2 will be a gained and inverted version of OAOUT1 (see Figure 8). When the two amplifier outputs are bridged, the apparent load impedance seen by each output is halved, so the current capability of the output MOSFETs, as well their power dissipation capability, must be accounted for in the design. In addition, the higher peak currents caused by driving lower impedance loads will cause additional ringing on the outputs. Thus, the layout and supply decoupling for low impedance (below 8 ohms) bridged applications must be extremely good to minimize output ringing and to ensure proper amplifier performance. 30 of 30 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TC2001 O AO UT1 CI RI 22 V5 RF INV1 23 + INPUT1 + AGND BIASCAP V5 20k INV2 28 20k O AO UT2 27 + AGND Figure 8: Input Stage Setup for Bridging The switching outputs, OUT1 and OUT2, are not synchronized, so a common inductor may not be used with a bridged TK2350. For this same reason, individual zobel networks must be applied to each output to load each output and lower the Q of each common mode differential LC filter. Low-frequency Power Supply Pumping A potentially troublesome phenomenon in single-ended switching amplifiers is power supply pumping. This phenomenon is caused by current from the output filter inductor flowing into the power supply output filter capacitors in the opposite direction as a DC load would drain current from them. Under certain conditions (usually low-frequency input signals), this current can cause the supply voltage to “pump” (increase in magnitude) and eventually cause over-voltage/undervoltage shut down. Moreover, since over/under-voltage are not “latched” shutdowns, the effect would be an amplifier that oscillates between on and off states. If a DC offset on the order of 0.3V is allowed to develop on the output of the amplifier (see “DC Offset Adjust”), the supplies can be boosted to the point where the amplifier’s over-voltage protection triggers. One solution to the pumping issue it to use large power supply capacitors to absorb the pumped supply current without significant voltage boost. The low-frequency pole used at the input to the amplifier determines the value of the capacitor required. This works for AC signals only. A no-cost solution to the pumping problem uses the fact that music has low frequency information that is correlated in both channels (it is in phase). This information can be used to eliminate boost by putting the two channels of a TK2350 amplifier out of phase with each other. This works because each channel is pumping out of phase with the other, and the net effect is a cancellation of pumping currents in the power supply. The phase of the audio signals needs to be corrected by connecting one of the speakers in the opposite polarity as the other channel. Theoretical Efficiency Of A TK2350 Amplifier The efficiency, η, of an amplifier is: η = POUT/PIN 31 of 31 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on The power dissipation of a TK2350 amplifier is primarily determined by the on resistance, RON, of the output transistors used, and the switching losses of these transistors, PSW. For a TK2350 amplifier, PIN (per channel) is approximated by: PIN = PDRIVER + PSW + POUT ((RS + RON + RCOIL + RL)/RL)2 where: PDRIVER = Power dissipated in the TA3020 = 1.6W/channel PSW = 2 x (0.01) x Qg (Qg is the gate charge of M, in nano-coulombs) RCOIL = Resistance of the output filter inductor (typically around 50mΩ) For a 125W RMS per channel, 8Ω load amplifier using STW34NB20 MOSFETs, and an RS of 50mΩ, PIN = PDRIVER + PSW + POUT ((RS + RON + RCOIL + RL)/RL)2 = 1.6 + 2 x (0.01) x (95) + 125 x ((0.025 + 0.11 + 0.05 + 8)/8)2 = 1.6 + 1.9 + 130.8 = 134.3W In the above calculation the RDS (ON) of 0.065Ω was multiplied by a factor of 1.7 to obtain RON in order to account for some temperature rise of the MOSFETs. (RDS (ON) typically increases by a factor of 1.7 for a typical MOSFET as temperature increases from 25ºC to 170ºC.) So, η = POUT/PIN = 125/134.3 = 93% Performance Measurements of a TK2350 Amplifier Tripath amplifiers operate by modulating the input signal with a high-frequency switching pattern. This signal is sent through a low-pass filter (external to the TK2350) that demodulates it to recover an amplified version of the audio input. The frequency of the switching pattern is spread spectrum and typically varies between 200kHz and 1.5MHz, which is well above the 20Hz – 22kHz audio band. The pattern itself does not alter or distort the audio input signal but it does introduce some inaudible noise components. The measurements of certain performance parameters, particularly those that have anything to do with noise, like THD+N, are significantly affected by the design of the low-pass filter used on the output of the TK2350 and also the bandwidth setting of the measurement instrument used. Unless the filter has a very sharp roll-off just past the audio band or the bandwidth of the measurement instrument ends there, some of the inaudible noise components introduced by the Tripath amplifier switching pattern will get integrated into the measurement, degrading it. Tripath amplifiers do not require large multi-pole filters to achieve excellent performance in listening tests, usually a more critical factor than performance measurements. Though using a multi-pole filter may remove high-frequency noise and improve THD+N type measurements (when they are made with wide-bandwidth measuring equipment), these same filters can increase distortion due to inductor non-linearity. Multi-pole filters require relatively large inductors, and inductor non-linearity increases with inductor value. 32 of 32 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TC2001 Package Information 28-pin SOIC 33 of 33 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TP2350B Package Information 64-pin LQFP Please note that the heatslug on the bottom of the package is connected to VNN. 34 of 34 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TP2350B Package Information 64-pin LQFP 35 of 35 TK2350, Rev 1.5/09.03 Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on PRELIMINARY – This product is still in development. Tripath Technology Inc. reserves the right to make any changes without further notice to improve reliability, function or design. This data sheet contains the design specifications for a product in development. Specifications may change in any manner without notice. Tripath and Digital Power Processing are trademarks of Tripath Technology Inc. Other trademarks referenced in this document are owned by their respective companies. Tripath Technology Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Tripath does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. TRIPATH’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN CONSENT OF THE PRESIDENT OF TRIPATH TECHNOLOGY INC. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in this labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Contact Information TRIPATH TECHNOLOGY, INC 2560 Orchard Parkway, San Jose, CA 95131 408.750.3000 - P 408.750.3001 - F For more Sales Information, please visit us @ www.tripath.com/cont_s.htm For more Technical Information, please visit us @ www.tripath.com/data.htm 36 of 36 TK2350, Rev 1.5/09.03