TECHNICAL INFORMATION Ω) Class-T Digital Audio Amplifier Driver Stereo 300W (4Ω using Digital Power ProcessingTM Technology TA3020 PRELIMINARY – January 2001 General Description The TA3020 is a two-channel, 300W (4Ω) per channel Amplifier Driver IC that uses Tripath’s TM proprietary Digital Power Processing (DPP ) technology. Class-T amplifiers offer both the audio fidelity of Class-AB and the power efficiency of Class-D amplifiers. Applications Features !"Audio/Video Amplifiers & Receivers !"Pro-audio Amplifiers !"Automobile Power Amplifiers !"Subwoofer Amplifiers !"Class-T architecture !"Proprietary Digital Power Processing technology !"“Audiophile” Sound Quality !"0.02% THD+N @ 50W, 8Ω !"0.03% IHF-IM @ 30W, 8Ω !"High Efficiency !"95% @ 150W @ 8Ω !"90% @ 275W @ 4Ω !"Supports wide range of output power levels !"Up to 300W/channel (4Ω), single-ended outputs !"Up to 1000W (4Ω), bridged outputs !"Output over-current protection !"Over- and under-voltage protection !"48-pin DIP (dual-inline package) Benefits !"Reduced system cost with smaller/less expensive power supply and heat sink !"Signal fidelity equal to high quality Class-AB amplifiers !"High dynamic range compatible with digital media such as CD and DVD Typical Performance THD+N versus Output Power versus Supply Voltage RL = 4Ω 10 5 f = 1kHz BBM = 80nS BW = 22Hz - 22kHz 2 39V 45V 54V THD+N (%) 1 0.5 0.2 0.1 0.05 0.02 0.01 1 2 5 10 20 50 100 200 500 Output Power (W) TA3020, Rev 2.1, 01.01 1 TECHNICAL INFORMATION Absolute Maximum Ratings (Note 1) SYMBOL PARAMETER Value UNITS +/- 70 V 6 -0.3V to (V5+0.3V) VNN+13 V VPP, VNN Supply Voltage V5 VN10 Positive 5 V Bias Supply Voltage at Input Pins (pins 12-16, 18, 19-26, 29-33, 37) Voltage for FET drive TSTORE Storage Temperature Range -55º to 150º C TA Operating Free-air Temperature Range (Note 2) -40º to 85º C TJ Junction Temperature 150º C ESDHB ESD Susceptibility – Human Body Model (Note 3) All pins ESD Susceptibility – Machine Model (Note 4) All pins TBD V TBD V ESDMM V Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. See the table below for Operating Conditions. Note 2: This is a target specification. Characterization is still needed to validate this temperature range. Note 3: Human body model, 100pF discharged through a 1.5KΩ resistor. Note 4: Machine model, 220pF – 240pF discharged through all pins. Operating Conditions (Note 5) SYMBOL PARAMETER VPP, VNN Supply Voltage V5 Positive 5 V Bias Supply VN10 Voltage for FET drive (Volts above VNN) MIN. TYP. MAX. UNITS +/- 15 +/-45 +/- 65 V 4.5 5 5.5 V 9 10 12 V Note 5: Recommended Operating Conditions indicate conditions for which the device is functional. See Electrical Characteristics for guaranteed specific performance limits. 2 TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION Electrical Characteristics (Note 6) TA = 25 °C. See Application/Test Circuit on page 7. Unless otherwise noted, the supply voltage is VPP=|VNN|=45V. SYMBOL Iq PARAMETER Quiescent Current (No load, BBM0=1,BBM1=0, Mute = 0V) IMUTE Mute Supply Current (No load, Mute = 5V) CONDITIONS VPP = +45V VNN = -45V V5 = 5V VN10 = 10V VPP = +45V VNN = -45V V5 = 5V VN10 = 10V VIH High-level input voltage (MUTE) VIL Low-level input voltage (MUTE) VOH High-level output voltage (HMUTE) IOH = 3mA VOL Low-level output voltage (HMUTE) IOL = 3mA VOFFSET Output Offset Voltage IOC Over Current Sense Voltage Threshold VPPSENSE Threshold Currents No Load, MUTE = Logic low 0.1% RFBA, RFBB, RFBC resistors TBD IVPPSENSE VVPPSENSE Threshold Voltages with RVPPSENSE = XXKΩ IVNNSENSE VNNSENSE Threshold Currents VVNNSENSE Threshold Voltages with RVNNSENSE = XXKΩ MIN. TYP. 90 90 45 200 1 1 20 1 MAX. TBD TBD TBD 3.5 1.0 Over-voltage turn on (muted) Over-voltage turn off (mute off) Under-voltage turn off (mute off) Under-voltage turn on (muted) Over-voltage turn on (muted) Over-voltage turn off (mute off) Under-voltage turn off (mute off) Under-voltage turn on (muted) Over-voltage turn on (muted) Over-voltage turn off (mute off) Under-voltage turn off (mute off) Under-voltage turn on (muted) Over-voltage turn on (muted) Over-voltage turn off (mute off) Under-voltage turn off (mute off) Under-voltage turn on (muted) 4.0 TBD TBD TBD TBD TBD TBD TBD TBD mA mA mA mA mA mA mA mA V V V 0.5 V TBD mV 1.0 TBD V 162 154 79 72 TBD TBD TBD TBD TBD 174 169 86 77 TBD TBD TBD TBD TBD TBD µA µA µA µA V V V V µA µA µA µA V V V V -TBD TBD UNITS TBD TBD TBD TBD TBD Note 6: Minimum and maximum limits are guaranteed but may not be 100% tested. TA3020, Rev 2.1, 01.01 3 TECHNICAL INFORMATION Performance Characteristics – Single Ended TA = 25 °C. Unless otherwise noted, the supply voltage is VPP=|VNN|=45V, the input frequency is 1kHz and the measurement bandwidth is 20kHz. See Application/Test Circuit. SYMBOL PARAMETER POUT Output Power (continuous RMS/Channel) THD + N IHF-IM Total Harmonic Distortion Plus Noise IHF Intermodulation Distortion SNR Signal-to-Noise Ratio CONDITIONS THD+N = 0.1%, RL = 8Ω RL = 4Ω THD+N = 1%, RL = 8Ω RL = 4Ω POUT = 50W/Channel, RL = 8Ω CS Channel Separation 19kHz, 20kHz, 1:1 (IHF), RL = 8Ω POUT = 30W/Channel A Weighted, RL = 4Ω, POUT = 275W/Channel 0dBr = 30W, RL = 8Ω, f = 1kHz η Power Efficiency POUT = 150W/Channel, RL = 8Ω AV Amplifier Gain AVERROR Channel to Channel Gain Error eNOUT Output Noise Voltage POUT = 10W/Channel, RL = 4Ω See Application / Test Circuit POUT = 10W/Channel, RL = 4Ω See Application / Test Circuit A Weighted, no signal, input shorted, DC offset nulled to zero 4 MIN. TYP. MAX. UNITS 100 190 120 220 W W W W 0.02 % 0.03 % 102 dB 97 dB 95 % TBD V/V 0.5 260 dB µV TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION TA3020 Pinout 48-pin Dip (Top View) VN10 LO2 LO2COM HO2COM HO2 OCS2LN OCS2LP OCS2HP OCS2HN VBOOT2 NC OCR2 FBKOUT1 FBKGND1 HMUTE FBKOUT2 DCOMP FBKGND2 BIASCAP INV2 OAOUT2 BBM0 BBM1 MUTE TA3020, Rev 2.1, 01.01 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 LO1 LO1COM HO1COM HO1 OCS1HN OCS1HP OCS1LP OCS1LN VBOOT1 VNN NC OCR1 NC V5 AGND OCR1 REF1 OCR2 VNNSENSE VPPSENSE AGND V5 OAOUT1 INV1 5 TECHNICAL INFORMATION Pin Description Pin 1 Function VN10 2,48 3,47 4,46 5,45 6, 7 8, 9 10, 40 LO2, LO1 LO2COM, LO1COM HO2COM, HO1COM HO2, HO1 OCS2LN, OCS2LP OCS2HP, OCS2HN VBOOT2, VBOOT1 12, 31 13, 16 14, 18 15 OCR2 FBKOUT1, FBKOUT2 FBKGND1, FBKGND2 HMUTE 17 DCOMP 19 BIASCAP 20, 25 21, 26 22, 23 24 INV2, INV1 OAOUT2, OAOUT1 BBM0, BBM1 MUTE 27, 35 28,34 29 V5 AGND VPPSENSE 30 VNNSENSE 32 33, 37 39 41, 42 43, 44 11, 36, 38 REF OCR1 VNN OCS1LN, OCS1LP OCS1HP, OCS1HN NC 6 Description “Floating” supply input for the FET drive circuitry. This voltage must be stable and referenced to VNN. Low side gate drive output (Channel 2 & 1) Kelvin connection to source of low-side transistor (Channel 2 & 1) Kelvin connection to source of high-side transistor (Channel 2 & 1) High side gate drive output (Channel 2 & 1) Over Current Sense inputs, Channel 2 low-side Over Current Sense inputs, Channel 2 high-side Bootstrapped voltage to supply drive to gate of high-side FET (Channel 2 & 1) Over-current threshold adjustment (Channel 2) Switching feedback (Channels 1 & 2) Ground Kelvin feedback (Channels 1 & 2) Logic Output. A logic high indicates both amplifiers are muted, due to the mute pin state, or a “fault” such as an overcurrent, undervoltage, or overvoltage condition. Internal mode selection. This pin must be grounded for proper device operation. Bandgap reference times two (typically 2.5VDC). Used to set the common mode voltage for the input op amps. This pin is not capable of driving external circuitry. Inverting inputs of Input Stage op amps. (Channels 2 & 1) Outputs of Input Stage op amps. (Channels 2 & 1) Break-before-make timing control to prevent shoot-through in the output FETs. Logic input. A logic high puts the amplifier in mute mode. Ground pin if not used. Please refer to the section, Mute Control, in the Application Information. 5V power supply input. Analog ground. Positive supply voltage sense input. This pin is used for both over and under voltage sensing for the VPP supply. Negative supply voltage sense input. This pin is used for both over and under voltage sensing for the VNN supply. Used to set internal bias currents. The pin voltage is typically 1.1V. Over-current threshold adjustment (Channel 1) Negative supply voltage. Over Current Sense inputs, Channel 1 low-side Over Current Sense inputs, Channel 1 high-side Not connected (bonded) internally. To minimize coupling between pins, tie these pins to AGND (pin34). TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION Application/Test Circuit TA3020 43 OCS1HP RF 20KΩ INV1 25 RI 49.9KΩ V5 (Pin 27) ROFA 10KΩ Offset Trim Circuit 44 OCS1HN 40 VBOOT1 RG V5 5.6, 1W 45 HO1 46 HO1COM + ROFB 499KΩ AGND VN10 Processing & Modulation ROFB 499KΩ COF 0.1uF 48 LO1 47 LO1COM 42 OCS1LP AGND (Pin 28) CA 0.1uF BIASCAP 19 V5 (Pin 28) (Pin 28) INV2 20 RFBA 1KΩ RZ 20Ω, 2W CS 0.1uF RL 4Ω or 8Ω VNN CS 330uF RFBA 1KΩ *RFBB 1.07KΩ ROFB 499KΩ RG AGND 5.6, 1W 5 HO2 4 HO2COM ROFB 499KΩ *RFBB 1.07KΩ *RFBC 13.3KΩ BBM0 2 LO2 CS 0.1uF 28 35 CS 0.1uF *RVNN1 450KΩ, 1% VNN *RVPP1 450KΩ, 1% VPP 34 COCR 220pF V5 RFBA 1KΩ CO 0.22uF AGND RZ 20Ω, 2W CZ 0.22uF CS 0.1uF CS 330uF RL 4Ω or 8Ω VNN RFBA 1KΩ *RFBC 13.3KΩ CFB 270pF V5 VPP CBAUX 47uF + LO 10uH V5 (Pin 27) 16 FBKOUT2 18 FBKGND2 *RFBB 1.07KΩ *RFBB 1.07KΩ *RFBC 13.3KΩ AGND (Pin 28) VN10 1 29 VPPSENSE VNN 39 VN10 CSW 0.1uF,35V VNN VNN NC 38 *RVNN2 1.35MΩ, 1% V5 ROCR 20KΩ AGND (Pin 28) AGND 30 VNNSENSE CB 0.1uF CHBR 0.1uF CS 330uF RS 0.01Ω, 1W 8 OCS2LN 12 OCR2 31 OCR2 17 27 QO + 3 LO2COM 7 OCS2LP 22 BBM1 23 DCOMP CS 0.1uF DB MUR120 VN10 RB 250Ω RG QO 5.6, 1W VN10 Processing & Modulation AGND (Pin 28) RS 0.01Ω, 1W 8 OCS2HN 10 VBOOT2 V5 + COF 0.1uF 5V CO 0.22uF CZ 0.22uF V5 (Pin 27) 7 OCS2HP OAOUT2 21 RI 49.9KΩ ROFA 10KΩ Offset Trim Circuit CBAUX 47uF REF 32 RF 20KΩ V5 (Pin 27) VPP AGND (Pin 28) 15 HMUTE RREF 8.25KΩ, 1% CS 330uF *RFBC 13.3KΩ CFB 150pF MUTE 24 + LO 10uH 13 FBKOUT1 14 FBKGND1 5V CI 3.3uF + ROCR 20KΩ AGND (Pin 28) (Pin 28) CB 0.1uF CHBR 0.1uF + RS 0.01Ω, 1W COCR 220pF 200KΩ QO RG QO 5.6, 1W 41 OCS1LN 37 OCR1 33 OCR1 2.5V CS 0.1uF DB MUR120 VN10 RB 250Ω + CI 3.3uF + RS 0.01Ω, 1W + OAOUT1 26 11 NC NC 36 *RVPP1 450KΩ, 1% V5 F. BEAD Analog Ground Power Ground * The values of these components must be adjusted based on supply voltage range. See Application Information. TA3020, Rev 2.1, 01.01 7 TECHNICAL INFORMATION External Components Description (Refer to the Application/Test Circuit) Components RI RF CI RFBA RFBB RFBC CFB ROFA ROFB RREF CA DB CB CBAUX RB CSW CS 8 Description Inverting input resistance to provide AC gain in conjunction with RF. This input is biased at the BIASCAP voltage (approximately 2.5VDC). Feedback resistor to set AC gain in conjunction with RI. Please refer to the Amplifier Gain paragraph, in the Application Information section. AC input coupling capacitor which, in conjunction with RI, forms a highpass filter at fC = 1 ( 2πRICI ) . Feedback divider resistor connected to V5. This resistor is normally set at 1kΩ. Feedback divider resistor connected to AGND. This value of this resistor depends on the supply voltage setting and helps set the TA3020 gain in conjunction with RI, RF, RFBA, and RFBC. Please see the Modulator Feedback Design paragraphs in the Application Information Section. Feedback resistor connected from either the OUT1(OUT2) to FBKOUT1(FBKOUT2) or speaker ground to FBKGND1(FBKGND2). The value of this resistor depends on the supply voltage setting and helps set the TA3020 gain in conjunction with RI, RF, RFBA,, and RFBB. It should be noted that the resistor from OUT1(OUT2) to FBKOUT1(FBKOUT2) must have a power rating of greater than PDISS = VPP2 (2RFBC) . Please see the Modulator Feedback Design paragraphs in the Application Information Section. Feedback delay capacitor that both lowers the idle switching frequency and filters very high frequency noise from the feedback signal, which improves amplifier performance. The value of CFB should be offset between channel 1 and channel 2 so that the idle switching difference is greater than 40kHz. Please refer to the Application / Test Circuit. Potentiometer used to manually trim the DC offset on the output of the TA3020. Resistor that limits the manual DC offset trim range and allows for more precise adjustment. Bias resistor. Locate close to pin 32 and ground at pin 28. BIASCAP decoupling capacitor. Should be located close to pin 19 and grounded at pin 28. Bootstrap diode. This diode charges up the bootstrap capacitors when the output is low (at VNN) to drive the high side gate circuitry. A fast or ultra fast recovery diode is recommended for the bootstrap circuitry. In addition, the bootstrap diode must be able to sustain the entire VPP-VNN voltage. Thus, for most applications, a 150V (or greater) diode should be used. High frequency bootstrap capacitor, which filters the high side gate drive supply. This capacitor must be located as close to pin 40 (VBOOT1) or pin10 (VBOOT2) for reliable operation. The “negative” side of CB should be connected directly to the HO1COM (pin 46) or HO2COM (pin 4). Please refer to the Application / Test Circuit. Bulk bootstrap capacitor that supplements CB during “clipping” events, which result in a reduction in the average switching frequency. Bootstrap resistor that limits CBAUX charging current during TA3020 power up (bootstrap supply charging). VN10 generator filter capacitors. The high frequency capacitor (0.1uF) must be located close to pin 1 (VN10) to maximize device performance. Supply decoupling for the power supply pins. For optimum performance, these components should be located close to the TA3020 and returned to their respective TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION RVNN1 RVNN2 RVPP1 RVPP2 RS ROCR COCR CHBR RG CZ RZ LO ground as shown in the Application/Test Circuit. Main overvoltage and undervoltage sense resistor for the negative supply (VNN). Please refer to the Electrical Characteristics Section for the trip points as well as the hysteresis band. Also, please refer to the Over / Under-voltage Protection section in the Application Information for a detailed discussion of the internal circuit operation and external component selection. Secondary overvoltage and undervoltage sense resistor for the negative supply (VNN). This resistor accounts for the internal VNNSENSE bias of 1.25V. Nominal resistor value should be three times that of RVNN1. Please refer to the Over / Undervoltage Protection section in the Application Information for a detailed discussion of the internal circuit operation and external component selection. Main overvoltage and undervoltage sense resistor for the positive supply (VPP). Please refer to the Electrical Characteristics Section for the trip points as well as the hysteresis band. Also, please refer to the Over / Under-voltage Protection section in the Application Information for a detailed discussion of the internal circuit operation and external component selection. Secondary overvoltage and undervoltage sense resistor for the positive supply (VPP). This resistor accounts for the internal VPPSENSE bias of 2.5V. Nominal resistor value should be equal to that of RVPP1. Please refer to the Over / Undervoltage Protection section in the Application Information for a detailed discussion of the internal circuit operation and external component selection. Over-current sense resistor. Please refer to the section, Setting the Over-current Threshold, in the Application Information for a discussion of how to choose the value of RS to obtain a specific current limit trip point. Over-current “trim” resistor, which, in conjunction with RS, sets the current trip point. Please refer to the section, Setting the Over-current Threshold, in the Application Information for a discussion of how to calculate the value of ROCR. Over-current filter capacitor, which filters the overcurrent signal at the OCR pins to account for the half-wave rectified current sense circuit internal to the TA3020. A typical value for this component is 220pF. In addition, this component should be located near pin 31 or pin 33 as possible. Supply decoupling for the high current Half-bridge supply pins. These components must be located as close to the device as possible to minimize supply overshoot and maximize device reliability. These capacitors should have good high frequency performance including low ESR and low ESL. In addition, the capacitor rating must be twice the maximum VPP voltage. Gate resistor, which is used to control the MOSFET rise/ fall times. This resistor serves to dampen the parasitics at the MOSFET gates, which, in turn, minimizes ringing and output overshoots. The typical power rating is 1 watt. Zobel capacitor, which in conjunction with RZ, terminates the output filter at high frequencies. Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. Zobel resistor, which in conjunction with CZ, terminates the output filter at high frequencies. The combination of RZ and CZ minimizes peaking of the output filter under both no load conditions or with real world loads, including loudspeakers which usually exhibit a rising impedance with increasing frequency. Depending on the program material, the power rating of RZ may need to be adjusted. The typical power rating is 2 watts. Output inductor, which in conjunction with CO, demodulates (filters) the switching waveform into an audio signal. Forms a second order filter with a cutoff frequency TA3020, Rev 2.1, 01.01 9 TECHNICAL INFORMATION of f C = 1 ( 2 π L O C O ) and a quality factor of Q = R L C O CO LOCO . Output capacitor, which, in conjunction with LO, demodulates (filters) the switching waveform into an audio signal. Forms a second order low-pass filter with a cutoff frequency of f C = 1 ( 2 π L O C O ) and a quality factor of Q = R L C O L O C O . Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. 10 TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION Typical Performance 5 2 Efficiency versus Output Power THD+N versus Output Power 10 100 f = 1kHz BBM = 80nS Vs =+28V BW = 22Hz - 22kHz RL = 8Ω 70 Efficiency (%) RL = 4Ω THD+N (%) 0.5 0.2 60 50 40 0.1 30 0.05 20 0 2 5 10 20 50 100 200 0 Output Power (W) 19kHz, 20kHz, 1:1 Pout = 40W/Channel 0dBr = 12.65Vrms Vs = +28V BW = 22Hz - 22kHz -10 -20 -30 -50 FFT (dBr) -40 -50 -60 -70 -80 60 80 100 120 Intermodulation Performance RL = 8Ω 19kHz, 20kHz, 1:1 Pout = 20W/Channel 0dBr = 12.65Vrms Vs =+28V BW = 22Hz - 22kHz -60 -70 -80 -90 -90 -100 -100 -110 -110 -120 20 40 +0 -40 50 100 200 500 1k 2k 5k 10k -120 20 20k 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) Frequency (Hz) Noise Floor Channel Separation versus Frequency -70 -40 VS =+28V BBM = 80nS 16K FFT -80 Fs = 48kHz BW = 22Hz - 22kHz -45 Pout = 40W/Channel @ Ω 4 Pout = 20W/Channel @ Ω 8 VS = +28V -55 BW = 22Hz - 22kHz -75 -50 Noise FFT (dBV) -60 Channel Separation (dBr) FFT (dBr) -30 20 Output Power (W) Intermodulation Performance RL = 4Ω +0 -20 f = 1kHz BBM = 80nS Vs =+28V THD+N =<10% 10 0.02 -10 RL = 4Ω 80 1 0.01 RL = 8Ω 90 -65 -70 -75 -80 -85 -90 -95 -100 RL = 4Ω -90 -85 -105 -95 -100 -110 -105 RL = 8Ω -110 -115 -115 -120 20 50 100 200 500 1k 2k Frequency (Hz) TA3020, Rev 2.1, 01.01 5k 10k 20k -120 20 50 100 200 500 1k 2k 5k 10k Frequency (Hz) 11 20k TECHNICAL INFORMATION Typical Performance THD+N versus Frequency versus Break Before Make RL = 8Ω THD+N versus Frequency versus Break Before Make RL = 4Ω 10 10 5 Pout = 40W/Channel Vs =+28V BW = 22Hz - 22kHz 5 2 2 1 1 0.5 0.5 THD+N (%) THD+N (%) Pout = 20W/Channel Vs =+28V BW = 22Hz - 22kHz 0.2 0.2 BBM = 120nS BBM = 120nS 0.1 0.1 0.05 0.05 0.02 0.02 0.01 20 BBM = 80nS 50 100 200 500 1k 2k 5k BBM = 80nS 10k 20k 0.01 20 50 100 200 THD+N versus Frequency versus Bandwidth RL = 4Ω 2k 5k 10k 20k 5k 10k 20k THD+N versus Frequency versus Bandwidth RL = 8Ω 10 Pout = 40W/Channel Vs =+28V BBM = 80nS 5 2 2 1 1 0.5 0.5 THD+N (%) THD+N (%) 5 1k Frequency (Hz) Frequency (Hz) 10 500 0.2 0.1 Pout = 20W/Channel Vs =+28V BBM = 80nS 0.2 0.1 BW = 30kHz 0.05 0.05 0.02 BW = 30kHz 0.02 BW = 22kHz 0.01 20 50 100 200 500 1k 2k 5k 10k 20k 0.01 20 BW = 22kHz 50 100 200 Frequency (Hz) THD+N versus Output Power versus Supply Voltage RL = 4Ω 10 5 1k 2k 5 23V 28V THD+N versus Output Power versus Supply Voltage RL = 8Ω 10 f = 1kHz BBM = 80nS BW = 22Hz - 22kHz 2 f = 1kHz BBM = 80nS BW = 22Hz - 22kHz 2 35V 1 23V 28V 35V THD+N (%) THD+N (%) 1 0.5 0.5 0.2 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 1 500 Frequency (Hz) 2 5 10 20 Output Power (W) 12 50 100 200 0.01 2 5 10 20 50 100 Output Power (W) TA3020, Rev 2.1, 01.01 200 TECHNICAL INFORMATION Typical Performance Efficiency versus Output Power THD+N versus Output Power 100 10 5 RL = 8Ω f = 1kHz BBM = 80nS Vs =+45V BW = 22Hz - 22kHz RL = 4Ω 80 2 RL = 8Ω RL = 4Ω Efficiency (%) 1 THD+N (%) 0.5 0.2 60 40 0.1 0.05 f = 1kHz BBM = 80nS Vs = +45V THD+N <10% 20 0.02 0.01 0 2 5 10 20 50 100 200 0 500 50 100 Intermodulation Performance RL = 4Ω +0 19kHz, 20kHz, 1:1 Pout = 60W/Channel 0dBr = 15.5Vrms -20 Vs = +45V BW = 22Hz - 22kHz -10 -20 -30 -40 -40 -50 -50 FFT (dBr) FFT (dBr) -30 -60 -70 19kHz, 20kHz, 1:1 Pout = 30W/Channel 0dBr = 15.5Vrms Vs =+45V BW = 22Hz - 22kHz -70 -90 -100 -100 -110 -110 50 100 200 500 1k 2k 5k 10k -120 20 20k 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) Frequency (Hz) Channel Separation versus Frequency Noise Floor -40 -55 300 -60 -90 -50 250 -80 -80 -45 200 Intermodulation Performance RL = 8Ω +0 -10 -120 20 150 Output Power (W) Output Power (W) -70 Pout = 60W/Channel @ Ω 4 Pout = 30W/Channel @ Ω 8 VS = +45V BW = 22Hz - 22kHz VS = +/-45V BBM = 80nS 16kFFT FS = 48kHz BW = 22Hz-22kHz -75 -80 -65 -85 -70 Amplitude (dBV) Channel Separation (dBr) -60 -75 -80 -85 RL = 4Ω -90 -95 -90 -95 -100 -105 -100 RL = 8Ω -105 -110 -110 -115 -115 -120 20 50 100 200 500 1k 2k Frequency (Hz) TA3020, Rev 2.1, 01.01 5k 10k 20k -120 20 50 100 200 500 1k 2k 5k 10k Frequency (Hz) 13 20k TECHNICAL INFORMATION Typical Performance THD+N versus Frequency versus Break Before Make RL = 4Ω 10 5 THD+N versus Frequency versus Break Before Make RL = 8Ω 10 Pout = 60W/Channel Vs =+45V BW = 22Hz - 22kHz 5 2 1 1 THD+N (%) THD+N (%) 2 Pout = 30W/Channel Vs =+45V BW = 20Hz - 22kHz 0.5 0.5 0.2 0.2 BBM = 120nS BBM = 120nS 0.1 0.1 0.05 0.05 BBM = 80nS 0.02 0.02 BBM = 80nS 0.01 20 50 100 200 500 1k 2k 5k 10k 0.01 20 20k 50 100 200 500 THD+N versus Frequency versus Bandwidth RL = 4Ω Pout = 60W/Channel Vs =+45V BBM = 80nS 5 1 1 0.5 0.5 THD+N (%) THD+N (%) 10k 20k 5k 10k 20k Pout = 30W/Channel Vs =+45V BBM = 80nS 2 2 0.2 BW = 30kHz 0.1 0.2 BW = 30kHz 0.1 0.05 0.05 BW = 22kHz 0.02 0.01 20 50 100 200 500 1k 0.02 2k 5k 10k BW = 22kHz 0.01 20 20k 50 100 200 Frequency (Hz) 500 1k 2k Frequency (Hz) THD+N versus Output Power versus Supply Voltage RL = 4Ω 10 5 39V THD+N versus Output Power versus Supply Voltage RL = 8Ω 10 f = 1kHz BBM = 80nS BW = 22Hz - 22kHz 2 45V f = 1kHz BBM = 80nS BW = 22Hz - 22kHz 2 54V 39V 1 45V 54V THD+N (%) THD+N (%) 1 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 1 5k THD+N versus Frequency versus Bandwidth RL = 8Ω 10 10 5 2k Frequency (Hz) Frequency (Hz) 5 1k 2 5 10 20 Output Power (W) 14 50 100 200 500 0.01 2 5 10 20 50 100 200 Output Power (W) TA3020, Rev 2.1, 01.01 500 TECHNICAL INFORMATION Application Information Figure 1 is a simplified diagram of one channel (Channel 1) of a TA3020 amplifier to assist in understanding its operation. 22 BBM0 BBM1 23 OAOUT1 26 CI RF RI + INV1 25 V5 - 45 HO1 46 HO1COM AGND V5 COF Offset Trim Circuit CA VN10 Processing & Modulation ROFB 2.5V 48 LO1 47 LO1COM 42 OCS1LP OVER CURRENT DETECTION BIASCAP 19 VPP RG RG VNN *RVPP1 VPP 30 VPPSENSE 29 RFBA *RVNN2 OVER/ UNDER VOLTAGE DETECTION CBAUX OUTPUT FILTER 13 FBKOUT1 14 FBKGND1 CFB VNNSENSE + RL CS ROCR RREF *RVNN1 CB 0.1uF VNN COCR 32 VN10 RB QO V5 MUTE 24 REF DB RS 41 OCS1LN 5V QO CHBR 33,37 OCR1 V5 CS RS 44 OCS1HN 40 VBOOT1 + ROFB ROFA 43 OCS1HP OVER CURRENT DETECTION RFBA RFBC RFBC RFBB RFBB 15 HMUTE V5 *RVPP1 VN10 V5 5V CS V5 27,35 AGND 28,34 1 VN10 CSW VNN VNN 39 F. BEAD VNN Analog Ground Power Ground Figure 1: Simplified TA3020 Amplifier TA3020 Basic Amplifier Operation The audio input signal is fed to the processor internal to the TA3020, where a switching pattern is generated. The average idle (no input) switching frequency is approximately 700kHz. With an input signal, the pattern is spread spectrum and varies between approximately 200kHz and 1.5MHz depending on input signal level and frequency. Complementary copies of the switching pattern are level-shifted by the MOSFET drivers and output from the TA3020 where they drive the gates (HO1 and LO1) of external power MOSFETs that are connected as a half bridge. The output of the half bridge is a power-amplified version of the switching pattern that switches between VPP and VNN. This signal is then low-pass filtered to obtain an amplified reproduction of the audio input signal. The processor portion of the TA3020 is operated from a 5-volt supply. In the generation of the switching patterns for the output MOSFETs, the processor inserts a “break-before-make” dead time between the turn-off of one transistor and the turn-on of the other in order to minimize shoot-through currents in the MOSFETs. The dead time can be programmed by setting the break-before-make control bits, BBM1 and BBM0. Feedback information from the output of the half-bridge is supplied to TA3020, Rev 2.1, 01.01 15 TECHNICAL INFORMATION the processor via FBKOUT1. supplied via FBKGND1. Additional feedback information to account for ground bounce is The MOSFET drivers in the TA3020 are operated from voltages obtained from VN10 and LO1COM for the low-side driver, and VBOOT1 and HO1COM for the high-side driver. VN10 must be a regulated 10V above VNN. N-Channel MOSFETs are used for both the top and bottom of the half bridge. The gate resistors, RG, are used to control MOSFET slew rate and thereby minimize voltage overshoots. Circuit Board Layout The TA3020 is a power (high current) amplifier that operates at relatively high switching frequencies. The output of the amplifier switches between VPP and VNN at high speeds while driving large currents. This high-frequency digital signal is passed through an LC low-pass filter to recover the amplified audio signal. Since the amplifier must drive the inductive LC output filter and speaker loads, the amplifier outputs can be pulled above the supply voltage and below ground by the energy in the output inductance. To avoid subjecting the TA3020 to potentially damaging voltage stress, it is critical to have a good printed circuit board layout. It is recommended that Tripath’s layout and application circuit be used for all applications and only be deviated from after careful analysis of the effects of any changes. Please refer to the TA3020 evaluation board document, EB-TA3020, available on the Tripath website, at www.tripath.com. The following components are important to place near their associated TA3020 pins and are ranked in order of layout importance, either for proper device operation or performance considerations. - The capacitors CHBR provide high frequency bypassing of the amplifier power supplies and will serve to reduce spikes across the supply rails. Please note that both mosfet halfbridges must be decoupled separately. In addition, the voltage rating for CHBR should be at least 150V as this capacitor is exposed to the full supply range, VPP-VNN. - CFB removes very high frequency components from the amplifier feedback signals and lowers the output switching frequency by delaying the feedback signals. In addition, the value of CFB is different for channel 1 and channel 2 to keep the average switching frequency difference greater than 40kHz. This minimizes in-band audio noise. - To minimize noise pickup and minimize THD+N, RFBC should be located as close to the TA3020 as possible. Make sure that the routing of the high voltage feedback lines is kept far away from the input op amps or significant noise coupling may occur. It is best to shield the high voltage feedback lines by using a ground plane around these traces as well as the input section. - CB, CSW provides high frequency bypassing for the VN10 and bootstrap supplies. Very high currents are present on these supplies. In general, to enable placement as close to the TA3020, and minimize PCB parasitics, the capacitors listed above should be surface mount types, located on the “solder” side of the board. Some components are not sensitive to location but are very sensitive to layout and trace routing. 16 TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION - To maximize the damping factor and reduce distortion and noise, the modulator feedback connections should be routed directly to the pins of the output inductors. LO. Please refer to the EB-TA3020This was done on the EB-TA3020 for additional information. - The output filter capacitor, CO, and zobel capacitor, CZ, should be star connected with the load return. The output ground feedback signal should be taken from this star point. - The modulator feedback resistors, RFBA, RFBB, and RFBC, should all be grounded and attached to 5V together. These connections will serve to minimize common mode noise via the differential feedback. Please refer to the EB-TA3020 evaluation board for more information. TA3020 Grounding Proper grounding techniques are required to maximize TA3020 functionality and performance. Parametric parameters such as THD+N, Noise Floor and Crosstalk can be adversely affected if proper grounding techniques are not implemented on the PCB layout. The following discussion highlights some recommendations about grounding both with respect to the TA3020 as well as general “audio system” design rules. The TA3020 is divided into two sections: the input section, which spans pin 12 through pin 37, and the output (high voltage) section, which spans pin 1 through pin 10 and pin 39 through pin 48. On the TA3020 evaluation board, the ground is also divided into distinct sections, one for the input and one for the output. To minimize ground loops and keep the audio noise floor as low as possible, the input and output ground must be only connected at a single point. Depending on the system design, the single point connection may be in the form of a ferrite bead or a PCB trace. The analog grounds, pin 28 and pin 34 must be connected locally at the TA3020 for proper device functionality. The ground for the V5 power supply should connect directly to pin 28. Additionally, any external input circuitry such as preamps, or active filters, should be referenced to pin 28. For the power section, Tripath has traditionally used a “star” grounding scheme. Thus, the load ground returns and the power supply decoupling traces are routed separately back to the power supply. In addition, any type of shield or chassis connection would be connected directly to the ground star located at the power supply. These precautions will both minimize audible noise and enhance the crosstalk performance of the TA3020. The TA3020 incorporates a differential feedback system to minimize the effects of ground bounce and cancel out common mode ground noise. As such, the feedback from the output ground for each channel needs to be properly sensed. This can be accomplished by connecting the output ground “sensing” trace directly to the star formed by the output ground return, output capacitor, CO, and the zobel capacitor, CZ. Refer to the Application / Test Circuit for a schematic description. TA3020 Amplifier Gain The gain of the TA3020 is the product of the input stage gain and the modulator gain. Please refer to the sections, Input Stage Design, and Modulator Feedback Design, for a complete explanation of how to determine the external component values. TA3020, Rev 2.1, 01.01 17 TECHNICAL INFORMATION A VTA3020 = A VINPUTSTAG A VTA3020 ≈ − E * A V MODULATOR R F R FBC * (R FBA + R FBB ) + 1 RI R FBA * R FBB For example, using a TA3020 with the following external components, RI = 20kΩ RF = 20kΩ RFBA = 1kΩ RFBB = 1.13kΩ RFBC = 9.09kΩ A VTA3020 ≈ − 20k Ω 13.3k Ω * (1.0k Ω + 1.07k Ω ) V + 1 = - 10.71 49.9k Ω 1.0k Ω * 1.07k Ω V Input Stage Design The TA3020 input stage is configured as an inverting amplifier, allowing the system designer flexibility in setting the input stage gain and frequency response. Figure 2 shows a typical application where the input stage is a constant gain inverting amplifier. The input stage gain should be set so that the maximum input signal level will drive the input stage output to 4Vpp. TA3020 OAOUT1 V5 RI RF INV1 INPUT1 - CI + BIASCAP AGND V5 + INV2 CI RI RF INPUT2 OAOUT2 - AGND Figure 2: Input Stage The gain of the input stage, above the low frequency high pass filter point, is that of a simple inverting amplifier: A VINPUTSTAG 18 E =− RF RI TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION Input Capacitor Selection CIN can be calculated once a value for RIN has been determined. CIN and RIN determine the input low-frequency pole. Typically this pole is set at 10Hz. CIN is calculated according to: CIN = 1 / (2π x FP x RIN) where: RIN = Input resistor value in ohms FP = Input low frequency pole (typically 10Hz) Modulator Feedback Design The modulator converts the signal from the input stage to the high-voltage output signal. The optimum gain of the modulator is determined from the maximum allowable feedback level for the modulator and maximum supply voltages for the power stage. Depending on the maximum supply voltage, the feedback ratio will need to be adjusted to maximize performance. The values of RFBA, RFBB and RFBC (see explanation below) define the gain of the modulator. Once these values are chosen, based on the maximum supply voltage, the gain of the modulator will be fixed even with as the supply voltage fluctuates due to current draw. For the best signal-to-noise ratio and lowest distortion, the maximum modulator feedback voltage should be approximately 4Vpp. This will keep the gain of the modulator as low as possible and still allow headroom so that the feedback signal does not clip the modulator feedback stage. Figure 3 shows how the feedback from the output of the amplifier is returned to the input of the modulator. The input to the modulator (FBKOUT1/FBKGND1 for channel 1) can be viewed as inputs to an inverting differential amplifier. RFBA and RFBB bias the feedback signal to approximately 2.5V and RFBC scales the large OUT1/OUT2 signal to down to 4Vpp. 1/2 TA3020 V5 RFBA Processing & Modulation RFBA RFBC FBKOUT1 RFBC FBKGND1 RFBB OUT1 OUT 1 GROUND RFBB AGND Figure 3: Modulator Feedback TA3020, Rev 2.1, 01.01 19 TECHNICAL INFORMATION The modulator feedback resistors are: R FBA = User specified, typically 1K Ω R FBA * VPP R FBB = (VPP - 4) R FBA * VPP R FBC = 4 R FBC * (R FBA + R FBB ) A V - MODULATOR ≈ +1 R FBA * R FBB The above equations assume that VPP=|VNN|. For example, in a system with VPPMAX=52V and VNNMAX=-52V, RFBA = 1kΩ, 1% RFBB = 1.08kΩ, use 1.07kΩ, 1% RFBC = 13.0kΩ, use 13.3kΩ, 1% The resultant modulator gain is: AV - MODULATOR ≈ 13.3k Ω * (1.0k Ω + 1.07k Ω ) + 1 = 26.73V/V 1.0k Ω * 1.07k Ω Mute When a logic high signal is supplied to MUTE, both amplifier channels are muted (both high- and low-side transistors are turned off). When a logic level low is supplied to MUTE, both amplifiers are fully operational. There is a delay of approximately 200 milliseconds between the de-assertion of MUTE and the un-muting of the TA3020. Turn-on & Turn-off Noise If turn-on or turn-off noise is present in a TA3020 amplifier, the cause is frequently due to other circuitry external to the TA3020. While the TA3020 has circuitry to suppress turn-on and turn-off transients, the combination of the power supply and other audio circuitry with the TA3020 in a particular application may exhibit audible transients. One solution that will completely eliminate turnon and turn-off pops and clicks is to use a relay to connect/disconnect the amplifier from the speakers with the appropriate timing at power on/off. The relay can also be used to protect the speakers from a component failure (e.g. shorted output MOSFET), which is a protection mechanism that some amplifiers have. Circuitry external to the TA3020 would need to be implemented to detect these failures. DC Offset While the DC offset voltages that appear at the speaker terminals of a TA3020 amplifier are typically small, Tripath recommends that any offsets during operation be nulled out of the amplifier with a circuit like the one shown connected to IN1 and IN2 in the Test/Application Circuit. 20 TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION It should be noted that the DC voltage on the output of a TA3020 amplifier with no load in mute will not be zero. This offset does not need to be nulled. The output impedance of the amplifier in mute mode is approximately 10KΩ. This means that the DC voltage drops to essentially zero when a typical load is connected. HMUTE The HMUTE pin is a 5V logic output that indicates various fault conditions within the device. These conditions include: over-current, overvoltage and undervoltage. The HMUTE output is capable of directly driving an LED through a series 2kΩ resistor. Over-current Protection The TA3020 has over-current protection circuitry to protect itself and the output transistors from short-circuit conditions. The TA3020 uses the voltage across a resistor RS (measured via OCS1HP, OCS1HN, OCS1LP and OCS1LN) that is in series with each output MOSFET to detect an overcurrent condition. RS and ROCR are used to set the over-current threshold. The OCS pins must be Kelvin connected for proper operation. See “Circuit Board Layout” in Application Information for details. When the voltage across ROCR becomes greater than VTOC (approximately 1.0V) the TA3020 will shut off the output stages of its amplifiers. The occurrence of an over-current condition is latched in the TA3020 and can be cleared by toggling the MUTE input or cycling power. Setting Over-current Threshold RS and ROCR determine the value of the over-current threshold, ISC: ISC = 3580 x (VTOC – IBIAS * ROCR)/(R OCR * RS) ROCR = (3580 x VTOC)/(ISC * RS+3580 * IBIAS) where: RS and ROCR are in Ω VTOC = Over-current sense threshold voltage (See Electrical Characteristics Table) = 1.0V typically IBIAS = 20uA For example, to set an ISC of 30A, ROCR = 9.63KΩ and RS will be 10mΩ. As high-wattage resistors are usually only available in a few low-resistance values (10mΩ, 25mΩ and 50mΩ), ROCR can be used to adjust for a particular over-current threshold using one of these values for RS. Over- and Under-Voltage Protection The TA3020 senses the power rails through external resistor networks connected to VNNSENSE and VPPSENSE. The over- and under-voltage limits are determined by the values of the resistors in the networks, as described in the table “Test/Application Circuit Component Values”. If the supply voltage falls outside the upper and lower limits determined by the resistor networks, the TA3020 shuts off the output stages of the amplifiers. The removal of the over-voltage or under-voltage TA3020, Rev 2.1, 01.01 21 TECHNICAL INFORMATION condition returns the TA3020 to normal operation. Please note that trip points specified in the Electrical Characteristics table are at 25°C and may change over temperature. The TA3020 has built-in over and under voltage protection for both the VPP and VNN supply rails. The nominal operating voltage will typically be chosen as the supply “center point.” This allows the supply voltage to fluctuate, both above and below, the nominal supply voltage. VPPSENSE (pin 29) performs the over and undervoltage sensing for the positive supply, VPP. VNNSENSE (pin 30) performs the same function for the negative rail, VNN. When the current through RVPPSENSE (or RVNNSENSE) goes below or above the values shown in the Electrical Characteristics section (caused by changing the power supply voltage), the TA3020 will be muted. VPPSENSE is internally biased at 2.5V and VNNSENSE is biased at 1.25V. Once the supply comes back into the supply voltage operating range (as defined by the supply sense resistors), the TA3020 will automatically be unmuted and will begin to amplify. There is a hysteresis range on both the VPPSENSE and VNNSENSE pins. If the amplifier is powered up in the hysteresis band the TA3020 will be muted. Thus, the usable supply range is the difference between the over-voltage turn-off and under-voltage turn-off for both the VPP and VNN supplies. It should be noted that there is a timer of approximately 200mS with respect to the over and under voltage sensing circuit. Thus, the supply voltage must be outside of the user defined supply range for greater than 200mS for the TA3020 to be muted. Figure 4 shows the proper connection for the Over / Under voltage sense circuit for both the VPPSENSE and VNNSENSE pins. V5 VNN TA3020 RVNN2 RVNN1 30 V5 RVNN2 VNNSENSE VPP RVPP1 29 VPPSENSE Figure 4: Over / Under voltage sense circuit The equation for calculating RVPP1 is as follows: R VPP1 = VPP I VPPSENSE Set R VPP2 = R VPP1 . 22 TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION The equation for calculating RVNNSENSE is as follows: R VNN1 = VNN I VNNSENSE Set R VNN2 = 3 × R VNN1 . IVPPSENSE or IVNNSENSE can be any of the currents shown in the Electrical Characteristics table for VPPSENSE and VNNSENSE, respectively. The two resistors, RVPP2 and RVNN2 compensate for the internal bias points. Thus, RVPP1 and RVNN1 can be used for the direct calculation of the actual VPP and VNN trip voltages without considering the effect of RVPP2 and RVNN2. Using the resistor values from above, the actual minimum over voltage turn off points will be: VPP MIN_OV_TUR VNN MIN_OV_TUR N_OFF N_OFF = R VPP1 × I VPPSENSE (MIN_OV_TU RN_OFF) = − (R VNN1 × I VNNSENSE (MIN_OV_TU RN_OFF) ) The other three trip points can be calculated using the same formula but inserting the appropriate IVPPSENSE (or IVNNSENSE) current value. As stated earlier, the usable supply range is the difference between the minimum overvoltage turn off and maximum under voltage turn-off for both the VPP and VNN supplies. VPP RANGE = VPP MIN_OV_TUR N_OFF - VPP MAX_UV_TUR N_OFF VNN RANGE = VNN MIN_OV_TUR N_OFF - VNN MAX_UV_TUR N_OFF VN10 Supply VN10 is an additional supply voltage required by the TA3020. VN10 must be 10 volts more positive than the nominal VNN. VN10 must track VNN. Generating the VN10 supply requires some care. The proper way to generate the voltage for VN10 is to use a 10V-postive supply voltage referenced to the VNN supply. Figure 5 shows the correct way to power the TA3020: VPP V5 VPP 5V AGND PGND VN10 VNN 10V VNN F. BEAD Figure 5: Proper Power Supply Connection TA3020, Rev 2.1, 01.01 23 TECHNICAL INFORMATION One apparent method to generate the VN10 supply voltage is to use a negative IC regulator to drop PGND down to 10V (relative to VNN). This method will not work since negative regulators only sink current into the regulator output and will not be capable of sourcing the current required by VN10. Furthermore, problems can arise since VN10 will not track movements in VNN. Output Transistor Selection The key parameters to consider when selecting what MOSFET to use with the TA3020 are drainsource breakdown voltage (BVdss), gate charge (Qg), and on-resistance (RDS(ON)). The BVdss rating of the MOSFET needs to be selected to accommodate the voltage swing between VSPOS and VSNEG as well as any voltage peaks caused by voltage ringing due to switching transients. With a ‘good’ circuit board layout, a BVdss that is 50% higher than the VPP and VNN voltage swing is a reasonable starting point. The BVdss rating should be verified by measuring the actual voltages experienced by the MOSFET in the final circuit. Ideally a low Qg (total gate charge) and low RDS(ON) are desired for the best amplifier performance. Unfortunately, these are conflicting requirements since RDS(ON) is inversely proportional to Qg for a typical MOSFET. The design trade-off is one of cost versus performance. A lower RDS(ON) means 2 lower I RDS(ON) losses but the associated higher Qg translates into higher switching losses (losses = Qg x 10 x 1.2MHz). A lower RDS(ON) also means a larger silicon die and higher cost. A higher RDS(ON) 2 means lower cost and lower switching losses but higher I RDSON losses. The following table lists BVdss, Qg and RDS(ON) for MOSFETs that Tripath has used with the TA3020: Manufacturer ST Microelectronics ST Microelectronics International Rectifier International Rectifier Fairchild Manufacturer’s Part Number STW34NB20 STP19NB20 IRFB41N15D IRFB31N20D FQA34N20 BVdss 200 200 150 200 200 Qg (nanoCoulombs) 60 29 67 70 60 RDS(ON) (Max) (Ohms) 0.075 0.18 0.045 0.082 0.075 Gate Resistor Selection The gate resistors, RG, are used to control MOSFET switching rise/fall times and thereby minimize voltage overshoots. They also dissipate a portion of the power resulting from moving the gate charge each time the MOSFET is switched. If RG is too small, excessive heat can be generated in the driver. Large gate resistors lead to slower MOSFET switching, which requires a larger breakbefore-make (BBM) delay. Break-Before-Make (BBM) Timing Control The half-bridge power MOSFETs require a deadtime between when one transistor is turned off and the other is turned on (break-before-make) in order to minimize shoot through currents. BBM0 and BBM1 are logic inputs (connected to logic high or pulled down to logic low) that control the breakbefore-make timing of the output transistors according to the following table. 24 TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION BBM1 0 0 1 1 BBM0 0 1 0 1 Delay 120 ns 80 ns 40 ns 0 ns Table 1: BBM Delay The tradeoff involved in making this setting is that as the delay is reduced, distortion levels improve but shoot-through and power dissipation increase. Both the 40nS and 0nS settings are NOT recommended due the high level of shoot-thru current that will result. Thus, BBM1 should be grounded in most applications. All typical curves and performance information was done with using the 80ns or 120ns BBM setting. The actual amount of BBM required is dependent upon other component values and circuit board layout, the value selected should be verified in the actual application circuit/board. It should also be verified under maximum temperature and power conditions since shoot-through in the output MOSFETs can increase under these conditions, possibly requiring a higher BBM setting than at room temperature. Output Filter Design One advantage of Tripath amplifiers over PWM solutions is the ability to use higher-cutoff-frequency filters. This means load-dependent peaking/droop in the 20kHz audio band potentially caused by the filter can be made negligible. This is especially important for applications where the user may select a 4-Ohm or 8-Ohm speaker. Furthermore, speakers are not purely resistive loads and the impedance they present changes over frequency and from speaker model to speaker model. Tripath recommends designing the filter as a 2nd order, 100kHz LC filter. Tripath has obtained good results with LF = 11uH and CF = 0.22uF. The core material of the output filter inductor has an effect on the distortion levels produced by a TA3020 amplifier. Tripath recommends low-mu type-2 iron powder cores because of their low loss and high linearity (available from Micrometals, www.micrometals.com). The specific core used on the EB-TA3020 was a T106-2 wound with 29 turns of 16AWG wire. Tripath also recommends that an RC damper be used after the LC low-pass filter. No-load operation of a TA3020 amplifier can create significant peaking in the LC filter, which produces strong resonant currents that can overheat the output MOSFETs and/or other components. The RC dampens the peaking and prevents problems. Tripath has obtained good results with RD = 20Ω and CD = 0.22uF. Bridging the TA3020 The TA3020 can be bridged by returning the signal from OAOUT1 to the input resistor at INV2. OUT1 will then be a gained version of OAOUT1, and OUT2 will be a gained and inverted version of OAOUT1 (see Figure 6). When the two amplifier outputs are bridged, the apparent load impedance seen by each output is halved, so the minimum recommended impedance for bridged operation is 8 ohms. TA3020, Rev 2.1, 01.01 25 TECHNICAL INFORMATION TA3020 OAOUT1 V5 RI RF INV1 INPUT - CI + BIASCAP AGND V5 20k + INV2 20k OAOUT2 - AGND Figure 6: Input Stage Setup for Bridging The switching outputs, OUT1 and OUT2, are not synchronized, so a common inductor may not be used with a bridged TA3020. For this same reason, individual zobel networks must be applied to each output to load each output and lower the Q of each common mode differential LC filter. Low-frequency Power Supply Pumping A potentially troublesome phenomenon in single-ended switching amplifiers is power supply pumping. This phenomenon is caused by current from the output filter inductor flowing into the power supply output filter capacitors in the opposite direction as a DC load would drain current from them. Under certain conditions (usually low-frequency input signals), this current can cause the supply voltage to “pump” (increase in magnitude) and eventually cause over-voltage/under-voltage shut down. Moreover, since over/under-voltage are not “latched” shutdowns, the effect would be an amplifier that oscillates between on and off states. If a DC offset on the order of 0.3V is allowed to develop on the output of the amplifier (see “DC Offset Adjust”), the supplies can be boosted to the point where the amplifier’s over-voltage protection triggers. One solution to the pumping issue it to use large power supply capacitors to absorb the pumped supply current without significant voltage boost. The low-frequency pole used at the input to the amplifier determines the value of the capacitor required. This works for AC signals only. A no-cost solution to the pumping problem uses the fact that music has low frequency information that is correlated in both channels (it is in phase). This information can be used to eliminate boost by putting the two channels of a TA3020 amplifier out of phase with each other. This works because each channel is pumping out of phase with the other, and the net effect is a cancellation of pumping currents in the power supply. The phase of the audio signals needs to be corrected by connecting one of the speakers in the opposite polarity as the other channel. 26 TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION Theoretical Efficiency Of A TA3020 Amplifier The efficiency, η, of an amplifier is: η = POUT/PIN The power dissipation of a TA3020 amplifier is primarily determined by the on resistance, RON, of the output transistors used, and the switching losses of these transistors, PSW . For a TA3020 amplifier, PIN (per channel) is approximated by: PIN = PDRIVER + PSW + POUT ((RS + RON + RCOIL + RL)/RL) 2 where: PDRIVER = Power dissipated in the TA3020 = 1.6W/channel PSW = 2 x (0.01) x Qg (Qg is the gate charge of M, in nano-coulombs) RCOIL = Resistance of the output filter inductor (typically around 50mΩ) For a 125W RMS per channel, 8Ω load amplifier using STW34NB20 MOSFETs, and an RS of 50mΩ, 2 PIN = PDRIVER + PSW + POUT ((RS + RON + RCOIL + RL)/RL) 2 = 1.6 + 2 x (0.01) x (95) + 125 x ((0.025 + 0.11 + 0.05 + 8)/8) = 1.6 + 1.9 + 130.8 = 134.3W In the above calculation the RDS (ON) of 0.065Ω was multiplied by a factor of 1.7 to obtain RON in order to account for some temperature rise of the MOSFETs. (RDS (ON) typically increases by a factor of 1.7 for a typical MOSFET as temperature increases from 25ºC to 170ºC.) So, η = POUT/PIN = 125/134.3 = 93% Performance Measurements of a TA3020 Amplifier Tripath amplifiers operate by modulating the input signal with a high-frequency switching pattern. This signal is sent through a low-pass filter (external to the TA3020) that demodulates it to recover an amplified version of the audio input. The frequency of the switching pattern is spread spectrum and typically varies between 200kHz and 1.5MHz, which is well above the 20Hz – 22kHz audio band. The pattern itself does not alter or distort the audio input signal but it does introduce some inaudible noise components. The measurements of certain performance parameters, particularly those that have anything to do with noise, like THD+N, are significantly affected by the design of the low-pass filter used on the output of the TA3020 and also the bandwidth setting of the measurement instrument used. Unless the filter has a very sharp roll-off just past the audio band or the bandwidth of the measurement instrument ends there, some of the inaudible noise components introduced by the Tripath amplifier switching pattern will get integrated into the measurement, degrading it. Tripath amplifiers do not require large multi-pole filters to achieve excellent performance in listening tests, usually a more critical factor than performance measurements. Though using a multi-pole filter may remove high-frequency noise and improve THD+N type measurements (when they are made with wide-bandwidth measuring equipment), these same filters can increase distortion due to inductor non-linearity. Multi-pole filters require relatively large inductors, and inductor non-linearity increases with inductor value. TA3020, Rev 2.1, 01.01 27 TECHNICAL INFORMATION Package Information 48-pin DIP 28 TA3020, Rev 2.1, 01.01 TECHNICAL INFORMATION PRELIMINARY – This product is still in development. Tripath Technology Inc. reserves the right to make any changes without further notice to improve reliability, function or design. This data sheet contains the design specifications for a product in development. Specifications may change in any manner without notice. Tripath and Digital Power Processing are trademarks of Tripath Technology Inc. Other trademarks referenced in this document are owned by their respective companies. Tripath Technology Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Tripath does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. TRIPATH’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN CONSENT OF THE PRESIDENT OF TRIPATH TECHNOLOGY INC. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in this labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. For more information on Tripath products, visit our web site at: www.tripath.com World Wide Sales Offices Western United States: Jim Hauer Taiwan, HK, China: Jim Hauer Japan: Osamu Ito Europe: Steve Tomlinson [email protected] [email protected] [email protected] [email protected] 408-567-3089 408-567-3089 81-42-334-2433 44-1672-514620 B TRIPATH TECHNOLOGY, INC. 3900 Freedom Circle Santa Clara, California 95054 408-567-3000 TA3020, Rev 2.1, 01.01 29