e ADVANCED LINEAR DEVICES, INC. TM EPAD EN ® AB LE D ALD111933 DUAL N-CHANNEL ENHANCEMENT MODE EPAD® MATCHED PAIR MOSFET ARRAY VGS(th)= +3.3V GENERAL DESCRIPTION APPLICATIONS ALD111933 are monolithic dual N-Channel MOSFETs matched at the factory using ALD’s proven EPAD® CMOS technology. These devices are intended for low voltage, small signal applications. • Precision current mirrors • Precision current sources • Voltage choppers • Differential amplifier input stages • Discrete voltage comparators • Voltage bias circuits • Sample and Hold circuits • Analog inverters • Level shifters • Source followers and buffers • Current multipliers • Discrete analog multiplexers/matrices • Discrete analog switches • Low current voltage clamps • Voltage detectors • Capacitive probes • Sensor interfaces • Peak detectors • Level shifters • Multiple preset voltage hysteresis circuits (with other VGS(th) EPAD MOSFETS) • Energy harvesting circuits • Zero standby power voltage monitors ALD111933 MOSFETs are designed and built with exceptional device electrical characteristics matching. Since these devices are on the same monolithic chip, they also exhibit excellent tempco tracking characteristics. Each device is versatile as a circuit element and is a useful design component for a broad range of analog applications. They are basic building blocks for current sources, differential amplifier input stages, transmission gates, and multiplexer applications. For most applications, connect V- and N/C pins to the most negative voltage potential in the system. All other pins must have voltages within these voltage limits. The ALD111933 devices are built for minimum offset voltage and differential thermal response, and they are designed for switching and amplifying applications in +3.0V to +10V systems where low input bias current, low input capacitance and fast switching speed are desired. Since these are MOSFET devices, they feature very large (almost infinite) current gain in a low frequency, or near DC, operating environment. The ALD111933 are suitable for use in precision applications which require very high current gain, beta, such as current mirrors and current sources. The high input impedance and the high DC current gain of the Field Effect Transistors result in extremely low current loss through the control gate. The DC current gain is limited by the gate input leakage current, which is specified at 30pA at room temperature. For example, DC beta of the device at a drain current of 3mA and input leakage current of 30pA at 25°C is = 3mA/30pA = 100,000,000. PIN CONFIGURATION ALD111933 FEATURES V- • Enhancement-mode (normally off) • Standard Gate Threshold Voltages: +3.3V • Matched MOSFET to MOSFET characteristics • Tight lot to lot parametric control • Parallel connection of MOSFETs to increase drain currents • Low input capacitance • VGS(th) match to 20mV • High input impedance — 1012Ω typical • Positive, zero, and negative VGS(th) temperature coefficient • DC current gain >108 • Low input and output leakage currents N/C* 1 8 GN2 GN1 2 7 DN2 DN1 3 6 V- SN1 4 5 SN2 V- MA, PA, SA PACKAGES ORDERING INFORMATION (“L”suffix for lead free version) Operating Temperature Range* 0°C to +70°C 8-Pin Plastic Dip Package ALD111933PAL 8-Pin MSOP Package ALD111933MAL *N/C pin is internally connected. Connect to V- to reduce noise 8-Pin SOIC Package ALD111933SAL * Contact factory for industrial or military temp. ranges or user-specified threshold voltage values. © 2006 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com ABSOLUTE MAXIMUM RATINGS Drain-Source voltage, VDS Gate-Source voltage, VGS Power dissipation Operating temperature range PA, SA, MA package Storage temperature range Lead temperature, 10 seconds 10.6V 10.6V 500 mW 0°C to +70°C -65°C to +150°C +260°C OPERATING ELECTRICAL CHARACTERISTICS V- = GND TA = 25°C unless otherwise specified CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. ALD111933 Parameter Symbol Min 3.25 Typ Max Unit Test Conditions 3.3 3.35 V IDS =1µA VDS = 0.1V 20 mV IDS =1µA Gate Threshold Voltage VGS(th) Offset Voltage VGS(th)1-VGS(th)2 VOS 2 Offset VoltageTempco TC ∆VOS 5 µV/ °C VDS1 = VDS2 GateThreshold Voltage Tempco TC∆VGS(th) -1.7 0.0 +1.6 mV °C ID = 1µA ID = 20µA, VDS = 0.1V ID = 40µA On Drain Current IDS (ON) 6.9 3.0 mA VGS = +10.0V VGS = + 7.3V VDS = + 5V Forward Transconductance GFS 1.4 mmho VGS = +7.3V VDS = +10.4V Transconductance Mismatch ∆GFS 1.8 % Output Conductance GOS 68 µmho Drain Source On Resistance RDS (ON) 500 Ω VDS = 0.1V VGS = +5.9V Drain Source On Resistance Mismatch ∆RDS (ON) 0.5 % VDS = 0.1V VGS = +7.3V Drain Source Breakdown Voltage BVDSX V IDS = 1.0µA VGS =+2.3V Drain Source Leakage Current1 IDS (OFF) Gate Leakage Current1 10 VGS = + 7.3V VDS = +10.4V 10 100 4 pA nA VGS = +2.3V VDS =10V, TA = 125°C IGSS 3 30 1 pA nA VDS = 0V VGS = 10V TA =125°C Input Capacitance CISS 2.5 pF Transfer Reverse Capacitance CRSS 0.1 pF Turn-on Delay Time ton 10 ns V+ = 5V RL= 5KΩ Turn-off Delay Time toff 10 ns V+ = 5V RL= 5KΩ 60 dB f = 100KHz Crosstalk Notes: 1 Consists of junction leakage currents ALD111933 Advanced Linear Devices 2