AMI AMIS

AMIS-52000 Single-Chip Radio Transceiver
Data Sheet
1.0 Introduction
connected to separate antennas for antenna diversity
applications.
The AMIS-52000 is a low cost, ultra low power ASK/OOK
(Amplitude Shift Keying/On-Off Shift Keying) transceiver
intended for narrow band RF applications. The device is
targeted for applications at 433MHz but can operate from
260 to 700MHz. The adjustable RF output ranges from –26
to +6dBm into a matched 50ohm load. The receiver
contains two independent receive channels which can be
On chip trim registers eliminate manual trimming of
external components. Using the on chip trimming, transmit
and receive frequencies achieve 5ppm accuracy over the
entire voltage and temperature range.
2.0 Key Features
• Very low power single-chip transceiver
• Minimal external components
• Low power RC oscillator
• Unique Quick Start, low-noise oscillator (patent pending)
• Extreme low power RF Sniff Mode™, wake on RSSI
• Internal trim functions
• I2C control interface
• Serial TX/RX data port
• Clock generation for an external microprocessor
• Wake up on RSSI
• Unique antenna diversity dual receiver (patent pending)
• Internal VCO/PLL tuning varactor
3.0 Technical Features
• Sniff Mode Polling: 0.5ms to 16s (0.5ms or 64ms steps)
• PLL Lock Time: <50µs
• Selectable Data Filter: up to 19.2 Kbps
• Internal Trim Function:
• TX power
• Antenna for trim or tune (2 inputs are
independent)
• Xtal for frequency and quick start
• RC for frequency
• Sniff mode for data threshold
• Data slice
• I2C Interface: Control bus
• Serial Interface: Data input/output
• Low Frequency IF
• Internal IF Filtering
• Package: 20-lead, 209 m SSOP
• Operating Frequency: Range 260 to 700MHz
• TX Output Power: +6dBm
• RX Sensitivity:
• Sniff Mode: -93dBm minimum
• Receive: -103dBm minimum @ 1Kbps
• Data Rate: 1 to 19.2Kbps, user selectable
• Power Requirements:
• Receive: 7.5mA (continuous)
• Transmit: 25mA full power; 50% duty cycle
• Sniff Mode: 750µA at a 1ms sniff rate (10% duty
cycle)
• Standby: 500nA (RC oscillator running)
• Operating Voltage: 2.4 to 3.6V
• Modulation: ASK/OOK (Amplitude Shift Key/On-Off
Shift Key)
• Xtal Start Time: 15µs (Quick Start)
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AMIS-52000 Single-Chip Radio Transceiver
4.0 Operating and Maximum Specifications
Table 1: Operating Conditions
Sym
VDD
Vss
Temp
Parameter
Positive Supply
Ground
Temperature Range
Min
2.4
Typ
3.0
0.0
+25
0
Max
3.3
0.1
+70
50
Units
V
V
C
Table 2: Absolute Maximum Ratings
Sym
VDD
RFin
Vss
Vin
Tstrg
Parameter
Positive Supply
Maximum RF
Input RX1/RX2
Ground
Logic I/P Voltage
Storage Temp
Min
Max
+3.6
+10
Units
V
dBm
0.0
-0.3
-40
0.1
VDD+0.3
+120
V
V
C
Table 3: Electrical Characteristics
Supply Current
Idd (Supply Current)
Sleep
Receiving
Transmitting
Max
1µA
10mA
25mA
Typ
500nA
7.5mA
25mA
50% Duty Cycle
Table 4: Electrical Characteristics
Digital Inputs
Parameter
Vih
Vil
Iih
Iil
2
I C Internal Pullup
Min
0.7*VDD
Typ
Max
0.3*VDD
+1.0
-1.0
15
20
Units
Volts
Volts
µA
µA
KΩ
Table 5: Electrical Characteristics
Digital Outputs
Parameter
Min
Voh
0.8*VDD
Vol
Ioh
Iol
+1.0
2
I C Internal Pullup
Typ
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Max
0.4
–1.0
15
Units
Volts
Volts
mA
mA
20
KΩ
2
Data Sheet
AMIS-52000 Single-Chip Radio Transceiver
Table 6: Electrical Characteristics
Analog TX
Parameter
Frequency Range
Modulation
Min
260
Modulation Frequency
1.2
Max Output Power
5
Typ
Max
433.92
700
ASK/OOK
6
On/Off Ratio
VCO Gain, Kvco
PLL Phase Noise
Harmonics
Reference Frequency
Crystal Frequency Spurs
TR Delay
8.125
Units
MHz
Comments
Amplitude shift key
on/off shift key
19.2
KBaud
Approximate allowable
data rates
7
dBm
Over entire operating
temperature and
voltage range
60
75
-97
dB
MHz/V
dBc/Hz
-97
dBc/Hz
100kHz offset,
50kHz loop bandwidth
-35
dBc
With typical matching
circuits at 433.92MHz
MHz
dBc
ms
10 PPM Xtal
13.56
-50
22.5
1
10kHz offset,
200kHz loop bandwidth
200kHz PLL loop bandwidth
Transmit to receive delay
Table 7: Electrical Characteristics
Analog RX
Parameter
Frequency Range
Modulation
Min
260
Input Sensitivity
RF Detect Time
TR Delay
-103
100
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Typ
433.92
ASK/OOK
Max
700
Units
MHz
Comments
Amplitude shift key
on/off shift key
1
dBm
µs
ms
10-3 BER, 1.2kbps
Sniff Mode operation only
Receiver to transmit delay
3
Data Sheet
AMIS-52000 Single-Chip Radio Transceiver
5.0 Pin Definitions
This section describes the pins of the AMIS-52000 package.
Table 8: Pin List
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
RX1
RX2
VCO2
VCO1
LPFILT
RSSI/Bandgap Out
NC
CREF
GND
CLKOUT
X1
X2
IIC Data
NC
IIC Clock
TX/RX Data
VDD
RFPWR
RFOUT
RFGND
Type
RF
RF
Ana
Ana
Ana
Ana
Ana
Ana
Dig
Ana
Ana
Dig
Dig
Dig
Ana
Ana
RF
Ana
Comments
RF Receive Antenna Input 1
RF Receive Antenna Input 2
Voltage Controlled oscillator 2
Voltage Controlled oscillator 1
Loop Filter
Analog RSSI Output or Bandgap Output
No connection
Current Bias Precision Resistor
Analog/Digital Ground
RC or XTAL Output
Xtal Input
Xtal Output
IIC Interface Data I/O
No connection
IIC Interface Clock
Data Transmit or Data Receive
Positive Power Supply
Regulated Voltage Output for RF Transmitter Circuitry
RF Transmit Antenna Output
RF Ground
Type Codes … Ana – Analog Dig – Digital RF – Radio Frequency
6.0 Package Outline
Figure 1 – AMIS-52000 SSOP Package Dimensions
Table 9: Package Dimensions
Inches
Dm
A
A1
A2
b
D
E
E1
e
Min
0.068
0.002
0.065
0.009
0.271
0.291
0.197
0.026 BSC
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Millimeters
Max
0.078
0.20
0.073
0.015
0.295
0.323
0.221
Min
1.73
0.05
1.65
0.22
6.90
7.40
5.00
0.65 BSC
Max
2.00
1.85
0.38
7.50
0.820
0.560
4
Data Sheet
AMIS-52000 Single-Chip Radio Transceiver
Data Sheet
7.0 Pin Descriptions
RX1, RX2, RF Inputs
The receiver uses an RSSI (Receive Signal Strength Indication)
to recover the ASK/OOK (Amplitude Shift Keyed/On Off Shift
Keyed) modulated data.
RX1 and RX2 are RF antenna inputs to the AMIS-52000. The
internal design of these circuits is identical. Each internal
circuit can be trimmed to compensate for device process
tolerances and external component tolerances. The first
stage of the RF input is an LNA (Low Noise Amplifier). The
receiver uses a low IF frequency and internal filters. The
two inputs are “summed” before the data recovery circuit.
The receiver is controlled by writing to the internal registers
of the AMIS-52000:
Table 10: Pin Descriptions
Register
Bit
RX1 or RX2 Receiver Control (Registers 0x05, 0x0F and 0x17)
Bit Name
Bit State Comments
0
Register
0x05
1
3
Register
0x0F
Register
0x17
&
Register
0x05
53
Antenna
#1 Enable
Antenna
#2 Enable
RX Enable
Continuous
RX
Register
0x17
Bit 6 & 7
Data Rate
Cntl
Register
0x05
Bit 2
BIT Order
Bit 7 msb
Bit 2 lsb
0
1
0
1
0
1
0
1
000
001
010
011
100
101
110
111
Receive circuits (RX1) are off
Receive circuits (RX1) are controlled by Bit 3
Receive circuits (RX2) are off
Receive circuits (RX2) are controlled by Bit 3
Receiver is disabled (off)
Receiver is enabled (on)
Normal operation
RF receiver is turned on
Set Data filter to 1.1kHz
Set Data filter to 2.3kHz
Set Data filter to 5.2kHz
Set Data filter to 10.4kHz
Set Data filter to 1.18kHz
Set Data filter to 2.57kHz
Set Data filter to 7.0kHz
Set Data filter to 20.45kHz
TX/RX, Data Input/Output
The TX/RX pin (can be programmed to be the oscillator
output) is the RC oscillator frequency. An external test
system can use this signal in a feedback loop to trim the RC
oscillator frequency.
The TX/RX pin (in transmit operation) is the digital data
input to the AMIS-52000’s transmit circuits. The data is used
to turn the transmitter on or off. The AMIS-52000 does not
perform protocol conversion to the data. It simply transmits
when transmission is enabled. The state (low input or high
input) that causes the AMIS-52000 to transmit is
programmable.
The TX/RX pin (during the Sniff or signal capture period) is
an indicator (to a host controller) output that either the
AMIS-52000 receiver has detected RF energy when the
device is powered down with Sniff Mode enabled or the
internal housekeeping timer has expired. When TX/RX is
2
used in this mode the I C data line will be high when RF
energy is detected or low when the housekeeping timer
activates the device. Depending on the bit period time, this
acquisition could occur on the first bit of data and still
receive the bit or it may require a pre-amble. The following
timing chart shows the function of this pin in signal
acquisition and Sniff Modes.
The TX/RX pin (in receive) is the digital data output from
the AMIS-52000 receiver. The received data is formed into
high and low signals (ones and zeros) in a serial bit stream.
The data output state (pin TX/RX) produced by the AMIS52000 receiver due to the presence of RF energy at the RX
input can be programmed to be either a high level or a low
level. An external controller must recreate the actual
information.
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AMIS-52000 Single-Chip Radio Transceiver
Data Sheet
A data bit or Period
Figure 2: Receiver Data Acquisition Waveforms
Figure 3: Receiver Acquisition Bit Function Timing
Where: i is a delay allowing pins function to change to signal the HOST controller that a RF caused wakeup occurred.
It can be controlled by Reg 0x0E (IRQ Delay).
k (set by Reg 0x0B) is a delay allowing signal levels
to settle before sampling RSSI.
The TX/RX pin can be programmed to perform one of these
functions by writing to the AMIS-52000 internal registers.
Table 11: TX/RX Pin Definition Control (Registers 0x08, 0x0f and 0x17)
Register
0x08
Bit
7
0x0F
2
0x17
5
0x17
5
0x0E
All
TX/RX Pin Definition Control (Registers 0x08, 0x0f, and 0x17)
Bit Name
Bit State
Comments
Sniff Out
0
Do not output Sniff on TX/RX pin
1
Output Sniff comparator results on TX/RX
RC Osc.
0
TX/RX pin is normal operation (DATA)
Out
1
RC osc. clock is output on the TX/RX pin
TX/RX Inv
0
TX will output RF energy when TX/RX high
Transmit
1
TX will output RF energy when TX/RX low
TX/RX Inv
0
RX is a high level when RF energy is received
Receive
1
RX is a low level when RF energy is received
IRQ Delay
Delay from TX/RX line signals a wakeup event
to when the line returns to its normal function
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AMIS-52000 Single-Chip Radio Transceiver
Data Sheet
VDD, Supply Voltage
RFGND, RF Ground
The VDD pin is the supply voltage for the AMIS-52000
circuits other than the RF output. It is typically 3.0V DC.
Please refer to section “Operating and Maximum
Specifications” of this specification for operating conditions.
The RFGND pin is a ground connection for all the internal RF
circuitry.
X1, X2, Crystal Oscillator
X1 and X2 connect a parallel resonance oscillator crystal and
capacitors to the AMIS-52000. The AMIS-52000 is designed
with an internal trim function that is controlled by writing to
the AMIS-52000 registers.
GND, Analog/Digital Ground
The GND pin is a ground connection for all non-RF circuitry.
Table 12: Crystal Divider Control
Reg
0x03
Name
TX Crystal Trim
0x04
RX Crystal Trim
Register Function
Changing the value of
this changes the crystal frequency
Changing the value of
this changes the crystal frequency
NOTE:
The value of the external crystal load capacitors should be slightly
lower than for a typical crystal to allow for capacitor loading in the
trim function.
LPFILT, Loop Filter
Controlled Oscillator). The LC circuit tunes the VCO
frequency. The frequency of the VCO is twice the desired
TX or RX frequency and the range of the VCO is 520MHz to
1400MHz.
The LPFILT pin connects the AMIS-52000 internal PLL
comparator to the external loop filter. The filter is required
to allow the internal PLL to lock to the crystal frequency
while producing the desired RF frequency. A simple second
order RC loop filter is typically sufficient for this purpose.
CLKOUT, Internal Clock Output
The CLKOUT pin output is either the internal RC oscillator,
the crystal oscillator, or a divided version of the crystal
oscillator.
VCO1, VCO2, Voltage Controlled Oscillator Tune
The VCO1 and VCO2 pins connect a parallel capacitor
and inductor to the AMIS-52000 internal VCO (Voltage
Table 13: Crystal Divider Control TX/RX Pin Definition Control (Registers 0x05 and 0x08)
Register
Register
0x05
Register
0x08
BIT
7
Register
0x0F
0&1
Bit Name
CLKOUT
Enable
CLKOUT
Output
Select
4&5
CLKOUT
Frequency
Select
Bit State
0
1
00
01
10
11
00
01
10
11
Comments
CLKOUT is enabled
CLKOUT is disabled
Automatic control
RC oscillator is output
Xtal oscillator is output
CLKOUT output is off
Divide crystal by 4
Divide crystal by 3
Divide crystal by 2
Divide crystal by 1
CREF, Current Reference Bias
handshaking and protocol is implemented for a SLAVE
device. Because only a minimal configuration is supported,
clock stretching for slow peripherals, general call
addressing, and ten-bit extended addressing are not
implemented. The interface will support either normal (0 100 Kbits/second) or fast (0 - 400 Kbits/second) data
modes. The interface conforms to the Phillips specification
2
for the I C bus.
The CREF pin requires a resistor to ground to set the
bandgap BIAS CURRENT. IT IS CRITICAL THAT THE
RESISTOR BE 33.2K OHMS, 1% or better tolerance.
R(Bias) = 33.2 KΩ (1%)
2
2
2
I CDATA, I CCLK, I C Control Interface Bus
2
The AMIS-52000 implements an I C serial 8 bit bi-directional
2
2
2
interface with the pins I CDATA and I CCLK. The I C bus
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AMIS-52000 Single-Chip Radio Transceiver
Pin
2
I CDATA
2
I CCLK
Device
AMIS-52000
AMIS-52000
AMIS-52000
Function
Resistor
Units
Internal Pullup
Internal Pullup
15
15
K ohms
K ohms
Address
0110100X
01101000
01101001
Hex
68
69
Data Sheet
Function
Device address
Device write
Read device
2
The I2C pins are also used as part of the wake-up function of
the AMIS-52000. When the AMIS-52000 is in power down
2
or sleep mode, the I CCLK line can be driven to a low state
to wake the AMIS-52000. Then an external controller can
interrogate the state of the I CDATA line to determine
whether a Sniff function detected RF (data high) or a
HOUSEKEEPING timer timeout (data low).
RSSI/BG, Analog Output
The RSSI/BG pin (when programmed to be) outputs the
voltage of the internal Bandgap voltage reference.
The RSSI/BG pin outputs the analog RSSI signal. This signal
is filtered by an internal parallel connection of a resistor and
capacitor to ground.
Each of these functions for the RSSI/BG pin can be selected
by writing to the AMIS-52000 registers.
Table 14: RSSI/BG Analog Pin Definition Control (Registers 0x0F and 0x17)
Register
0x0F
Bit
3
Bit Name
RSSI or Bandgap
Output
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Bit State
0
1
Comments
RSSI signal output (Pre Data Filter)
Bandgap voltage is output
8
AMIS-52000 Single-Chip Radio Transceiver
Data Sheet
8.0 Functional Design Description
controlled by setting register TXPOWER (0x02) to some
value, setting a DC voltage level on the pin RFPWR (0x00 is
the lowest setting and 0xFF is the highest setting). The
receive section of the AMIS-52000 is configured to accept
the input signals from either or both of the two antennas.
The detected signals are summed inside the receiver,
providing the received digital signal output. The receiver
operates as a very low IF superheterodyne receiver with
internal filtering.
The AMIS-52000 is a dual receiver and a transmitter in a
single device. Data is transmitted at data rates up to
19.6Kbps. The AMIS-52000 can be used in half-duplex
mode, or simplex mode. Control is provided by an external
microprocessor. Power output adjust, frequency trim, filter
bandwidth selection, antenna or receiver diversity selection
and crystal divider values can be changed to compensate
for device tolerances. The transmit section of the AMIS52000 generates the output carrier signal when the TX/RX
pin is toggled to enable the RF carrier. RF output power is
AMIS-52000 Block Diagram
This section shows a typical design with external
components for 433.92MHz operation. The following
sections will describe each external circuit.
Figure 4 - AMIS-52000 Reference Block Diagram
RX1, RX2, RF Input Impedance
There are two identical RF input circuits (AMIS-52000 pins
RX1 and RX2). The LNA for these inputs requires a DC
voltage path to ground. The following circuit diagram
shows a suggested circuit for 433.92MHz.
Figure 5 - 433.92MHz Typical Match to 50 Ohms
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AMIS-52000 Single-Chip Radio Transceiver
Data Sheet
Table 15: RFIN Characteristics
Specification
Input Resistance
Input Capacitance
Input Resistance
Input Capacitance
Input Sensitivity
Input Noise Figure
Freq Range
RF Input
IP3
IP2
Settings
RX trim 0x00
RX trim 0x00
RX trim 0xff
RX trim 0xff
Conditions
Trim set minimum
Trim set minimum
Trim set maximum
Trim set maximum
Min
Typ
2K
3
2K
6
-103
3
433
3
260
Max RF signal input
Max
6
700
-10
+8
+66
Units
Ω
pF
Ω
pF
dBm
dB
MHz
dBm
dBm
dBm
RFOUT, RF Output Impedance
harmonics to acceptable levels. The following circuit is a
suggestion for matching the output to 50Ω at 433.92MHz.
The circuit includes a tuned parallel LC tank at the
433.92MHz (including internal capacitance) and an LC notch
filter at the third harmonic.
The RF transmitter output pin is RFOUT. This is an open
drain output. It requires a DC signal path to RFPWR, which is
the output of the internal power supply to the transmitter.
The transmitter output requires a tuned resonant circuit
externally to form the desired waveform. This resonant
circuit should be resonant at the desired output frequency.
The transmitter output also requires filtering to reduce the
Figure 6 – 433.92MHz Typical Match to 50Ω
Table 16: RFOUT Characteristics
Specification
Output Resistance
Output Capacitance
Output Resistance
Output Capacitance
Harmonics
Freq Range
Freq Range
Modulation
On/Off Ratio
Output Power
Output Power
Settings
TX PC 0x00
TX PC 0x00
TX PC 0xff
TX PC 0xff
TX PC 0xff
Transmit
Transmit
Fast start crystal circuit
TX PC 0x00
TX PC 0xff
With typical match circuit
With typical match circuit
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Conditions
Min
With typical match circuit
260
350
10
Typ
22
3
TBD
TBD
-35
433.92
433.92
ASK/OOK
60
-24
6
Max
700
480
Units
Ω
pF
Ω
pF
dBc
MHz
MHz
dB
dBm
dBm
AMIS-52000 Single-Chip Radio Transceiver
Data Sheet
VCO1, VCO2, VCO Tuning
supply voltage (Vloopfilter = (1/2) the VCC supply).
Different combinations of the L and C should be tried until
this secondary requirement is also met.
The AMIS-52000 has an internal Voltage Controlled
Oscillator (VCO). A parallel LC circuit (tuned to twice the
desired RF frequency) is connected between the VCO1 and
VCO2 pins to set the frequency of the VCO.
This circuit is sensitive to the PCB board layout. The
components should be located as close as possible to the
AMIS-52000 part.
There is a secondary requirement in the selection of the
components for this function. When the component values
meet the above resonant requirements, the loop
filter voltage should be about in the mid range of the
The parallel LC circuit tunes the internal VCO frequency.
The frequency is determined by the following:
Frequency = (2) * (Rxfreq) MHz
ctot = CAP + 2.25 pF
INDUCTOR = 1/((Ctot) * ((2πF)^2)))
More detailed information on this function is found in the
AMIS application note, “AMIS-52000 Extending the AMIS52000 Frequency Range Beyond the 433MHz Target.”
Figure 6 – Frequency Tuning Components for 433.92MHz
LPFFILT
The AMIS-52000 uses a Phase Locked Loop to set the
frequency stability of the oscillators. This circuit requires an
external LOOP FILTER connected to pin LPF. The following
second order loop filter is suggested. The components for
this filter should be located as close to the AMIS-52000 part
as possible in the PCB layout. More detailed information on
the design of this filter is found in the AMIS application
note, “AMIS-52000 Extending the AMIS-52000 Frequency
Range Beyond the 433MHz Target.”
Figure 7 – Typical Loop Filter Design
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AMIS-52000 Single-Chip Radio Transceiver
Data Sheet
Table 17: PLL Design Parameters
Items
Ref Freq.
ζ
Fn
Icp
Kvco
Description
433.93MHz external reference frequency
Damping factor
Natural frequency
Charge pump current
VCO sensitivity
Min
Typ
13.56
0.866
115
50
80
Max
Units
MHz
kHz
µA
MHz/V
CREF, Current Bias Resistor
handshaking and protocol is implemented for a SLAVE
device. The interface can connect directly to a host or
2
controller I C interface. There are internal pullup resistors
2
2
on both the I CDATA and I CCLK lines of the AMIS-52000.
2
The interface can handle data rates as defined in the I C
specification up to 400Kbps.
To insure proper operation of the AMIS-52000, this can only
be a precision resistor with a value of 33.2KΩ. Use a 1% or
better resistor tolerance.
2
2
I CDATA, I CCLK, Control Interface 2-wire Bus
2
The AMIS-52000 implements an I C serial 8 bit bi-directional
2
2
2
interface with the pins I CDATA and I CCLK. The I C bus
Pin
I2CDATA
I2CCLK
Function
Internal pullup
Internal pullup
Resistor
15
15
Device
AMIS-52000
AMIS-52000
AMIS-52000
Units
KΩ
KΩ
Address
0110100X
01101000
01101001
Figure 8 – I2C Waveforms Showing Message START and STOP Conditions
Figure 9 – I2C Waveforms Showing 8 BITs of Message and Acknowledge
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Hex
68
69
Function
Device address
Device write
Read device
AMIS-52000 Single-Chip Radio Transceiver
2
Figure 10 – I C Waveforms Showing Write Message Format
2
Figure 11 – I C Waveforms Showing Read Message Format
The protocol of the I2C bus is as follows:
Clock is always from the MASTER
Device Address is different for a WRITE (0x68) than for a
READ (0x69)
The SLAVE or MASTER when not outputting data leaves the
data line high
The SLAVE acknowledges each BYTE written to it
The MASTER has the option of acknowledging the last
READ BYTE of data
Each message begins with a START and ends with a STOP
Each message has DEVICE ADDRESS, REGISTER ADDRESS,
and then DATA
MASTER can write incrementing registers by just adding
DATA BYTES to message
When writing multi Data BYTES, add data to end of single
DEVICE, REGISTER ADDRESS
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Data Sheet
AMIS-52000 Single-Chip Radio Transceiver
Data Sheet
X1, X2, Crystal Oscillator
The AMIS-52000 requires a parallel resonant crystal. The
frequency of this crystal can be in the frequency range of
12.5MHz to 14.5MHz. The AMIS-52000 will form an RF
frequency for transmit and receive from this crystal
frequency. The transmit frequency is 32 times the crystal
frequency. The receive frequency is the same, but the AMIS52000 will pull the frequency to form an LO (local oscillator)
frequency about 50kHz different than the signal frequency.
A typical value for the 2 parallel load capacitors is 15pF. This
may be less than the suggested values for a crystal due to
the internal trim capacitance of the AMIS-52000.
Figure 12 – Typical Crystal Oscillator Circuit
function is explained in detail in AMIS application note,
“AMIS-52000 Quick Start Crystal Oscillator Circuit
Operation and Setup.”
The AMIS-52000 contains a QUICK START function. For the
frequencies that this circuit can operate (350 to 480MHz),
the circuit can be used to stabilize the crystal frequency
much faster than the normal crystal oscillator circuit. This
Power-On-Reset/Brownout Detection
The POR/Brownout Detection circuit ensures that the AMIS52000 will be in a reset state when VDD drops below
certain threshold voltage, and remains in this state until
VDD rises above another threshold voltage. The POR circuit
characteristics are illustrated in Figure 13.
Figure 13 – Power On Reset Characteristics
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14
AMIS-52000 Single-Chip Radio Transceiver
Data Sheet
Sniff Signal Acquisition
The AMIS-52000 is designed with a very low power mode.
This mode shuts down the RF sections and CLKOUT
circuitry. This mode has the RC oscillator and wake up
divider circuits still running.
To take full advantage of the low power state, the AMIS52000 has a Sniff Mode. In this mode, the AMIS-52000 will
periodically wake the receiver to look for incoming RF
energy. When the AMIS-52000 detects RF energy, it will
2
start the receive mode, while setting the I CDATA and
2
I CCLK lines to indicate to the host or controller that a wake
up was generated by received signal. The minimum power
use by the AMIS-52000 can be achieved by using the Sniff
Mode to detect an incoming signal, while using the QUICK
START function to start the crystal oscillator in a minimum
time.
Figure 14 - Sniff (Data Acquisition) Timing
where: a: Delay (0x0B) before checking RSSI
b: Time between Sniff functions (0x0A)
c: Receiver on and sampling input signal
Alternative Wake-Up
The AMIS-52000 will wake from a low power mode upon
the reception of RF energy. There is a second method for
the AMIS-52000 to wake from its very low power mode.
This low power mode is when the RF circuits and the
CLKOUT circuits are shut off and the RC oscillator and
wakeup divider chain are running. The AMIS-52000 can be
programmed to wake up from time to time for
housekeeping tasks. When the housekeeping timer occurs,
2
2
the AMIS-52000 will set the I CDATA and I CCLK lines to
indicate to the host or controller that a housekeeping cycle
is requested.
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© 2004 AMI Semiconductor, Inc.
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