AVAGO HSDL-3005

HSDL-3005
IrDA® Data Compliant Low Power
115.2 kbit/s with Remote Control
Infrared Transceiver
Data Sheet
Description
The HSDL-3005 is a small form factor enhanced
infrared (IR) transceiver available in Front View
and Top View modules. It provides the capability
of (1) interface between logic and IR signals for
through-air, serial, half-duplex IR data link, and
(2) IR remote control transmission for universal
remote control applications.
For IR data communication, the HSDL-3005
provides the flexibility of Low Power SIR
applications and Remote Control applications with
no external components needed for the selection
of the type of application. The transceiver is compliant to IrDA® Physical Layer Specifications
version 1.4 Low Power from 9.6 kbit/s to 115.2
kbit/s (SIR) and it is IEC 825-Class 1 Eye Safe.
The HSDL-3005 has very low idle current and can
be shutdown completely to achieve very low power
consumption. In the shutdown mode, the PIN
diode will be inactive and thus producing very
little photocurrent even under very bright ambient
light. Such features are ideal for battery operated
handheld products such as PDAs and mobile
phones.
Features
• Available in both the front view and top view options
• Guaranteed temperature performance, –25 to 85ºC
– Critical parameters are guaranteed over temperature &
supply voltage
• Low power consumption
• Small module size:
Front View Top View
– Height: 2.50 mm
2.80 mm
– Width: 8.00 mm
7.50 mm
– Depth: 3.00 mm
3.35 mm
• Minimum external components
– Integrated single-biased LED resistor
– Direct interoperability to MPU
– Programmable TxD features
– Integrated remote control FET
• VCC supply 2.4 to 3.6 volts
• Integrated EMI shield
• Designed to accommodate light loss with cosmetic
windows
• IEC 825-Class I eye safe
• Lead-free package
Remote Control Features
• Wide angle and high radiant intensity
• Spectrally suited to remote control transmission function
• Typical link distance up to 7 meters
IrDA® Data Features
• Fully compliant to IrDA® physical layer specification 1.4
low power from 9.6 kbit/s to 115.2 kbit/s (SIR)
– Excellent nose-to-nose operation
– Link distance up to 50 cm
• Complete shutdown for TxD_IrDA, RxD_IrDA, and PIN
diode
• Low power consumption
– Low idle current, <100 µA typically
– Low shutdown current, 10 nA typically
• LED stuck-high protection
Applications
• Mobile data communication and universal remote control
transmission
– Personal digital assistants (PDAs)
– Mobile phones
CAUTION: The BiCMOS inherent to the design of this component increases the component’s susceptibility to
damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and
assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Application Support
Information
associated with HSDL-3005
infrared transceiver module.
You can contact them through
your local sales representatives
for additional details.
The Application Engineering
Group is available to assist you
with the application design
Order Information
Part Number
Packaging Type
Package
Quantity
HSDL-3005-021
Tape and Reel
Front View
2500
HSDL-3005-028
Tape and Reel
Top View
2500
Marking Information
The unit is marked with a number
“3” and “YWWLL” on the shield
for Front option. For Top option,
the part is marked as “YWW.”
Y = year
WW = work week
LL = lot information
VCC
VCC (6)
CX2
GND
CX1
GND (8)
HSDL-3005 TRANSCEIVER MODULE
TRANSCEIVER IC
REGULATOR
VOLTAGE/
CURRENT
REFERENCE
BLOCK
PHOTODETECTOR
SHUTDOWN
VLED
SHIELD
SHUTDOWN
SD (5)
TxD_RC (7)
TxD_IrDA (3)
RC/IR
TRANSMITTER
SELECT
EYE
SAFETY
-RC
RC_BUFFER
LEDA (1)
EYE
SAFETY
-IR
IR_BUFFER
CX3
R1
DETECTOR
PRE AMP
OUTPUT
BUFFER
RECEIVER
RxD_IrDA (4)
TRANSMITTER
LED
Figure 1. Functional block diagram.
2
REAR VIEW
8
7
6
5
4
3
2
1
Figure 2. Pinout.
I/O Pins Configuration Table
Pin
Symbol
I/O
Description
Notes
1
LEDA
I
IR and Remote Control LED Anode
1
2
N.C.
–
No Connection
2
3
TxD_IrDA
I
IrDA Transmitter Data Input. Active High
3
4
RxD_IrDA
O
IrDA Receiver Data Output. Active Low
4
5
SD
I
Shutdown. Active High
5
6
VCC
I
Supply Voltage
6
7
TxD_RC
I
Remote Control Transmission Input.
Active High
7
8
GND
I
Connect to System Ground
8
–
Shield
–
EMI Shield
9
Notes:
1. Tied through external resistor, R1, to VLED from 2.4 to 4.5 Volts.
2. No Connection.
3. Logic high turns on the IrDA LED. If held HIGH longer than ~50 µs, the IrDA LED is turned off.
TxD_IrDA must be driven either HIGH or LOW. Do not leave the pin floating.
4. Output is at LOW pulse response when light pulse is seen.
5. Complete shutdown TxD_IrDA, RxD_IrDA, and PIN diode.
6. Regulated, 2.4 to 3.6 Volts.
7. Logic high turns on the RC LED. If held HIGH longer than ~50 µs, the RC LED is turned off.
TxD_RC must be driven either HIGH or LOW. Do not leave the pin floating.
8. Tie this pin to system ground.
9. Tie to system ground via a low inductance trace. For best performance, do not tie it to the
HSDL-3005 GND pin directly.
Recommended Application Circuit Components
Component
Recommended Value
R1
2.7 Ω ± 5%, 0.25 Watt @ Vled = 2.4 V
3.3 Ω ± 5%, 0.25 Watt @ Vled = 2.7 V
4.7 Ω ± 5%, 0.25 Watt @ Vled = 3.0 V
5.6 Ω ± 5%, 0.25 Watt for 3.0 < Vled < 3.6 V
6.8 Ω ± 5%, 0.25 Watt @ Vled = 3.6 V
10.0 Ω ± 5%, 0.25 Watt for 3.6 ≤ Vled ≤ 4.5 V
CX1[1]
0.47 µF ± 20%, X7R Ceramic
CX2[1],
CX3
6.8 µF ± 20%, Tantalum
Note:
1. CX1 and CX2 must be placed within 0.7 cm of HSDL-3005 to obtain optimum noise immunity.
3
Different Remote Control
Configuration for HSDL-3005
(A) Single-TxD
Programmable Mode
The HSDL-3005 can operate in
the single-TxD programmable
mode or the two-TxD direct
transmission mode.
In the single-TxD programmable
mode, only one input pin
(TxD_IrDA input pin) is used.
The transceiver is in default
mode (IrDA) when powered up.
tC
tTL
tA
tC
tB
SHUTDOWN
(ACTIVE HIGH)
TxD_IrDA
(ACTIVE HIGH)
• • •
SHUTDOWN
DRIVE
IrDA LED
• • •
RC
MODE
DRIVE
RC LED
• • •
RESET
DRIVE
IrDA LED
TxD_RC
(GND)
(B) Single-TxD Programmable Mode
SD
TXD_IrDA
TXD_RC
LED
Remarks
0
0
0
OFF
IR Rx enabled. Idle mode
0
0
1
ON
Remote control operation
0
1
0
ON
IrDA Tx operation
0
1
1
ON
Not recommended
1
0
0
OFF
Shutdown mode*
* The shutdown condition will set the transceiver to the default mode (IrDA).
4
User needs to apply the
following programming
sequence to both the TxD_IrDA
and SD inputs to enable the
transceiver to operate in either
the IrDA or remote control
mode.
Absolute Maximum Ratings at TA = 25°C
For implementations where case to ambient thermal resistance is ≤ 50°C/W.
Parameter
Symbol
Min.
Max.
Units
Storage Temperature
TS
–40
100
ºC
Operating Temperature
TA
–25
85
ºC
LED Supply Voltage
VLED
0
6
V
Supply Voltage
VCC
0
6
V
Output Voltage: RxD
VO
0
6
V
LED Current Pulse Amplitude
IVLED
300
mA
Conditions
≤ 90 µs Pulse Width
≤ 20% Duty Cycle
Recommended Operating Conditions
Parameter
Symbol
Min.
Max.
Units
Operating Temperature
TA
–25
85
ºC
Supply Voltage
VCC
2.4
3.6
V
LED Supply Voltage
VLED
2.4
4.5
V
Conditions
Logic Input Voltage
for TxD_IrDA, TxD_RC
Logic High
VIH
2/3 VCC
VCC
V
Logic Low
VIL
0
1/3 VCC
V
Receiver Input
Irradiance
Logic High
EIH
0.0081
500
mW/cm2
For in-band signals ≤ 115.2 kbit/s[3]
Logic Low
EIL
0.3
µW/cm2
For in-band signals[3]
115..2
kbit/s
Receiver Data Rate
9.6
Note:
3. An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is defined as 850 ≤ lp ≤ 900 nm, and the pulse characteristics are
compliant with the IrDA Serial Infrared Physical Layer Link Specification v1.4.
5
Electrical and Optical Specifications
Specifications (Min. & Max. values) hold over the recommended operating conditions unless otherwise noted. Unspecified test
conditions may be anywhere in their operating range. All typical values (Typ.) are at 25ºC, VCC set to 3.0 V.
Parameter
Symbol
Min.
Typ.
Max.
Units
Conditions
Viewing Angle
2q1/2
30
Peak Sensitivity Wavelength
lP
RxD_IrDA
Logic High
VOH
VCC – 0.2
VCC
V
Output Voltage
Logic Low
VOL
0
0.4
V
tRPW
1
2.3
7.5
µs
q1/2 ≤ 15º, CL = 9 pF
tr, tf
30
100
ns
CL= 9 pF
tL
25
50
µs
EI = 9.0 µW/cm2
tRW
75
200
µs
EI = 10 mW/cm2
20
35
mW/sr q1/2 ≤ 15º, TxD_IrDA ≥ VIH,
TA = 25 ºC
60
º
Receiver
RxD_IrDA Pulse Width
(SIR)[4]
RxD_IrDA Rise & Fall Times
Receiver Latency
Time[5]
Receiver Wake Up Time[6]
º
875
nm
IOH = –200 µA, EI ≤ 0.3 µW/cm2
Infrared (IR) Transmitter
IR Radiant Intensity
IEH
4
IR Viewing Angle
2q1/2
30
IR Peak Wavelength
lP
TxD_IrDA
Logic Levels
High
VIH
2/3 VCC
VCC
Low
VIL
0
1/3 VCC V
885
nm
V
TxD_IrDA
Input Current
High
IH
0.02
1
µA
VI ≥ VIH
Low
IL
–0.02
1
µA
0 ≤ VI ≤ VIL
LED Current
Shutdown
IVLED
0.02
1
µA
VI (SD) ≥ VIH,
Wake Up Time[7]
tTW
180
500
ns
Optical Pulse Width (SIR)
tPW(SIR)
1.6
µs
Maximum Optical Pulse Width[8]
tPW(Max)
120
µs
Data Setup Time
tA
25
ns
Data Pulsewidth
tB
25
ns
Programming Time
tC
25
ns
TxD Rise & Fall Times (Optical)
tr, tf
LED Anode On-State Voltage
VON (LEDA)
1.41
25
600
tPW(TXD) = 1.6 µs at 115.2 kbit/s
ns
ILEDA = 100 mA, VI(TxD) ≥ VIH
2.6
V
65
mW/sr q1/2 ≤ 15º, TxD_RC ≥ VIH,
TA = 25ºC
Remote Control (RC) Transmitter
RC Radiant Intensity
IEH
RC Viewing Angle
2q1/2
RC Peak Wavelength
lP
TxD_RC
Logic Levels
High
VIH
2/3 VCC
VCC
Low
VIL
0
1/3 VCC V
TxD_RC
Input Current
High
IH
0.02
1
µA
VI ≥ VIH
IL
–0.02
1
µA
0 ≤ VI ≤ VIL
VON (LEDA)
2.1
V
ILEDA = 200 mA, VI(TxD) ≥ VIH
Low
LED Anode On-State Voltage
6
30
60
885
º
nm
V
Electrical and Optical Specifications (Cont’d.)
Parameter
Symbol
Min.
Typ.
Max.
Units
Conditions
0.01
1
µA
VI ≥ VIH
–0.02
1
µA
0 ≤ VI ≤ VIL
0.01
1
µA
VSD ≥ VCC – 0.5, TA = 25ºC
Idle (Standby) ICC2
50
100
µA
VI(TxD) ≤ VIL, EI = 0
Active
300
µA
VI(TxD) ≥ VIL, EI = 10 mW/cm2
Transceiver
Input Current
Supply Current
High
IH
Low
IL
Shutdown
ICC1
ICC3
–1
Notes:
3. An in-band optical signal is a pulse/sequence where the peak wavelength, lP, is defined as 850 nm ≤ lP ≤ 900 nm, and the pulse characteristics are
compliant with the IrDA Serial Infrared Physical Layer Link Specification version 1.4.
4. For in-band signals 9.6 kbit/s to 115.2 kbit/s where 9 µW/cm2 ≤ EI ≤ 500 mW/cm2.
5. Latency is defined as the time from the last TxD_IrDA light output pulse until the receiver has recovered full sensitivity.
6. Receiver Wake Up Time is measured from VCC power ON to valid RxD_IrDA output.
7. Transmitter Wake Up Time is measured from VCC power ON to valid light output in response to a TxD_IrDA pulse.
8. The Optical PW is defined as the maximum time which the IR LED will turn on; this is to prevent the long Turn On time for the IR LED.
IR ILED vs. VLEDA
IR Light Output Power (LOP) vs. ILED
300
100
250
80
LOP (mW/Sr)
ILED (mA)
200
150
100
40
20
50
0
1.5
60
2.0
2.5
3.0
3.5
0
4.0
VLEDA (V)
0
50
100
150
200
250
300
ILED (mA)
Figure 3. VLEDA vs. ILEDA at room temperature
for IR mode.
Figure 4. ILEDA vs. LED radiant intensity at room
temperature for IR mode.
RC ILED vs. VLEDA
RC LIGHT OUTPUT POWER (LOP) vs. ILED
350
120
300
100
LOP (mW/Sr)
ILED (mA)
250
200
150
100
1.75
2.00
2.25
VLEDA (V)
Figure 5. VLEDA vs. ILEDA at room temperature
for RC mode.
7
60
40
20
50
0
1.50
80
0
100 125 150 175 200 225 250 275 300 325
ILED (mA)
Figure 6. ILEDA vs. LED radiant intensity at room
temperature for RC mode.
HSDL-3005-021 (Front) Package Dimensions
SOLDERING PATTERN
1.35
MOUNTING
CENTER
MOUNTING
CENTER
EXTERNAL
GROUND
CL
4.0
1.25
1.425
1.025
0.775
1.75
0.60
CL
2.05
RECEIVER
EMITTER
0.475
1.425
2.375
2.5
1.175
2.85
3.325
0.35
0.65
0.80
2.55
4.0
CL
8.0
8
7
6
5
0.6
4
3
2
1
3.325
6.65
3.0
2.9
1.85
NOTES:
1. ALL DIMENSIONS IN MILLIMETERS (mm).
2. DIMENSION TOLERANCE IS 0.2 mm UNLESS OTHERWISE SPECIFIED.
3. COPLANAITY: 0.05 TO -0.150 mm.
8
1 VLEDA
5 SD
2 N.C.
6 VCC
3 TxD_IrDA
7 TxD_RC
4 RxD
8 GND
HSDL-3005-021(Front) Tape and Reel Dimensions
4.0 ± 0.1
UNIT: mm
1.75 ± 0.1
+ 0.1
∅ 1.5 0
1.5 ± 0.1
POLARITY
PIN 8: VLED
7.5 ± 0.1
8.4 ± 0.1
16.0 ± 0.2
PIN 1: GND
0.4 ± 0.05
3.4 ± 0.1
8.0 ± 0.1
2.8 ± 0.1
EMPTY
PROGRESSIVE DIRECTION
PARTS MOUNTED
LEADER
(400 mm MIN.)
(40 mm MIN.)
EMPTY
(40 mm MIN.)
OPTION #
"B"
"C"
001
178
60
QUANTITY
500
021
330
80
2500
UNIT: mm
DETAIL A
2.0 ± 0.5
B
C
∅ 13.0 ± 0.5
R 1.0
LABEL
21 ± 0.8
DETAIL A
16.4 +02
2.0 ± 0.5
9
HSDL-3005-028 (Top) Package Dimensions
SOLDERING PATTERN
CL
2.20
1.45
0.90
1.275
MOUNTING CENTER
0.575
1.60
2.8
3.6
2
1.55
1.55
2
+0.05
-0.2
1.8
0.60
+0.05
-0.2
0.475
CL
1.425
2.375
3.325
2.8
3.35
2.35
5.1
0.7 ± 0.1
THE HEIGHT BETWEEN
THE 2 GND PADS IS
<=0.1 mm UNDER THE
COPLANARITY SPECS.
XXX
0.05 (MAX.)
CL
7.5
DATECODE MARKING
0.4 ± 0.15
8
7
6
5
4
3
2
1
0.3
0.95 ± 0.1
0.6 ± 0.15
3.325
0.95 x 7 = 6.65 ± 0.15
NOTES:
1. ALL DIMENSIONS IN MILLIMETERS (mm).
2. DIMENSION TOLERANCE IS 0.2 mm UNLESS OTHERWISE SPECIFIED.
10
1 VLED
5 SD
2 N.C.
6 VCC
3 TxD_IrDA
7 TxD_RC
4 RxD
8 GND
HSDL-3005-028 (Top) Tape and Reel Dimensions
60°TYP.
∅ 99.5 ± 1
120°
3
+0.5
∅ 13.1 -0
∅ 264
DETAIL A
(5/1)
PS
∅ 330 ± 1
1
2
Po
D1
P2
Do
+0.5
16.0 -0
B
T
E
2.6
F
W
A
Bo
A
P1
1.5
B
Ao
Ko
5°(MAX.)
5°
3.1 ± 0.1
A-A SECTION
UNIT: mm
SYMBOL
SPEC
SYMBOL
SPEC
Ao
Bo
Ko
Po
P1
P2
T
3.65 ± 0.10
7.90 ± 0.10
+0.05
2.75 - 0.10
4.00 ± 0.10
8.00 ± 0.10
2.00 ± 0.10
0.40 ± 0.10
E
F
Do
D1
W
10Po
1.75 ± 0.10
7.50 ± 0.10
1.55 ± 0.05
1.50 (MIN.)
16.00 ± 0.30
40.00 ± 0.20
NOTES:
1. 10 SPROKET HOLE PITCH CUMULATIVE TOLERANCE IS ± 0.2 mm.
2. CARRIER CAMBER SHALL NOT BE MORE THAN 1 mm PER 100 mm THROUGH A LENGTH OF 250 mm.
3. Ao AND Bo MEASURED ON A PLACE 0.3 mm ABOVE THE BOTTOM OF THE PACKET.
4. Ko MEASURED FROM A PLACE ON THE INSIDE BOTTOM OF THE POCKET TO TOP SURFACE OF CARRIER.
5. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE.
11
5°
B-B SECTION
5°(MAX.)
Baking Conditions
HSDL-3005 Moisture Proof
Packaging
If the parts are not stored in dry
conditions, they must be baked
before reflow to prevent damage
to the parts.
All HSDL-3005 options are
shipped in moisture proof
package. Once opened, moisture
absorption begins.
This part is compliant to JEDEC
Level 4.
UNITS IN A SEALED
MOISTURE-PROOF
PACKAGE
Package
Temp.
Time
In reels
60ºC
≥ 48 hours
In bulk
100ºC
≥ 4 hours
125ºC
≥ 2 hours
150ºC
≥ 1 hour
Baking should only be done once.
Recommended Storage
Conditions
PACKAGE IS
OPENED (UNSEALED)
Storage Temperature 10ºC to 30ºC
Relative Humidity
Time from Unsealing to
Soldering
ENVIRONMENT
LESS THAN 25°C,
AND LESS THAN
60% RH
After removal from the bag, the
parts should be soldered within
three days if stored at the recommended storage conditions.
YES
NO BAKING
IS NECESSARY
YES
PACKAGE IS
OPENED LESS
THAN 72 HOURS
NO
PERFORM RECOMMENDED
BAKING CONDITIONS
Figure 7. Baking conditions chart.
12
below 60% RH
NO
Recommended Reflow Profile
MAX. 260°C
T – TEMPERATURE – (°C)
255
R3
230
220
200
180
R4
R2
60 sec.
MAX.
ABOVE
220°C
160
R1
120
R5
80
25
0
50
100
150
200
250
300
t-TIME (SECONDS)
P1
HEAT
UP
P2
SOLDER PASTE DRY
P3
SOLDER
REFLOW
P4
COOL
DOWN
Process Zone
Symbol
DT
Maximum DT/Dtime
Heat Up
P1, R1
25°C to 160°C
4°C/s
Solder Paste Dry
P2, R2
160°C to 200°C
0.5°C/s
Solder Reflow
P3, R3
P3, R4
200°C to 255°C (260°C at 10 seconds max.)
255°C to 200°C
4°C/s
–6°C/s
Cool Down
P4, R5
200°C to 25°C
–6°C/s
The reflow profile is a straightline representation of a nominal
temperature profile for a convective reflow solder process.
The temperature profile is
divided into four process zones,
each with different DT/Dtime
temperature change rates. The
DT/Dtime rates are detailed in
the above table. The tempera–
tures are measured at the
component to printed circuit
board connections.
In process zone P1, the PC
board and HSDL-3005
castellation pins are heated to a
temperature of 160° C to activate
the flux in the solder paste. The
temperature ramp up rate, R1, is
limited to 4° C per second to
allow for even heating of both
the PC board and HSDL-3005
castellations.
13
Process zone P2 should be of
sufficient time duration (60 to
120 seconds) to dry the solder
paste. The temperature is raised
to a level just below the liquidus
point of the solder, usually
200° C (392° F).
Process zone P3 is the solder
reflow zone. In zone P3, the
temperature is quickly raised
above the liquidus point of
solder to 255° C (491° F) for
optimum results. The dwell time
above the liquidus point of
solder should be between 20 and
60 seconds. It usually takes
about 20 seconds to assure
proper coalescing of the solder
balls into liquid solder and the
formation of good solder
connections. Beyond a dwell
time of 60 seconds, the
intermetallic growth within the
solder connections becomes
excessive, resulting in the
formation of weak and
unreliable connections. The
temperature is then rapidly
reduced to a point below the
solidus temperature of the
solder, usually 200° C (392° F), to
allow the solder within the
connections to freeze solid.
Process zone P4 is the cool
down after solder freeze. The
cool down rate, R5, from the
liquidus point of the solder to
25° C (77° F) should not exceed
6° C per second maximum. This
limitation is necessary to allow
the PC board and HSDL-3005
castellations to change
dimensions evenly, putting
minimal stresses on the HSDL3005 transceiver.
Appendix A:
SMT Assembly Application Note
1.0 Solder Pad, Mask and Metal Stencil
METAL STENCIL
FOR SOLDER PASTE
PRINTING
STENCIL
APERTURE
LAND
PATTERN
SOLDER
MASK
PCBA
Figure 8. Stencil and PCBA.
1.1 Recommended Land Pattern
1.35
MOUNTING
CENTER
SHIELD SOLDER PAD
CL
1.25
2.05
0.10
0.775
1.75
FIDUCIAL
0.60
0.475
1.425
2.375
3.325
Figure 9. Land pattern.
14
1.2 Recommended Metal
Solder Stencil Aperture
It is recommended that only a
0.152 mm (0.006 inch) or a 0.127
mm (0.005 inch) thick stencil be
used for solder paste printing.
This is to ensure adequate
printed solder paste volume and
no shorting. See the table below
the drawing for combinations of
metal stencil aperture and metal
stencil thickness that should be
used.
Aperture opening for shield pad
is 3.05 mm x 1.1 mm as per land
pattern.
APERTURES AS PER
LAND DIMENSIONS
t
w
l
Figure 10. Solder stencil aperture.
Aperture size(mm)
Stencil thickness, t (mm)
length, l
width, w
0.152 mm
2.60 ± 0.05
0.55 ± 0.05
0.127 mm
3.00 ± 0.05
0.55 ± 0.05
1.3 Adjacent Land Keepout and
Solder Mask Areas
Adjacent land keepout is the
maximum space occupied by the
unit relative to the land pattern.
There should be no other SMD
components within this area.
10.1
0.2
3.85
The minimum solder resist strip
width required to avoid solder
bridging adjacent pads is 0.2 mm.
3.0
SOLDER MASK
It is recommended that two
fiducial crosses be placed at
mid-length of the pads for unit
alignment.
UNITS: mm
Figure 11. Adjacent land keepout and solder mask areas.
Note: Wet/Liquid PhotoImageable solder resist/mask is
recommended.
15
Appendix B:
PCB Layout Suggestion
The following PCB layout
guidelines should be followed to
obtain a good PSRR and EM
immunity resulting in good
electrical performance. Things to
note:
1. The ground plane should be
continuous under the part,
but should not extend under
the shield trace.
2. The shield trace is a wide, low
inductance trace back to the
system ground.
3. VLED can be connected to
either unfiltered or
unregulated power supply. If
VLED and Vcc share the same
power supply, CX3 need not
be used and the connections
for CX1 and CX2 should be
before the current limiting
resistor R1. In a noisy
environment, including
capacitor CX2 can enhance
supply rejection. CX1 is
generally a ceramic capacitor
of low inductance providing a
wide frequency response
while CX2 and CX3 are
tantalum capacitors of big
TOP LAYER
CONNECT THE METAL SHIELD AND MODULE
GROUND PIN TO BOTTOM GROUND LAYER.
LAYER 2
CRITICAL GROUND PLANE ZONE. DO NOT
CONNECT DIRECTLY TO THE MODULE
GROUND PIN.
LAYER 3
KEEP DATA BUS AWAY FROM CRITICAL
GROUND PLANE ZONE.
BOTTOM LAYER (GND)
The area underneath the module
at the second layer, and 3 cm in
all directions around the
module, is defined as the critical
ground plane zone. The ground
plane should be maximized in
this zone. Refer to application
note AN1114 or the Avago IrDA
Data Link Design Guide for
details. The layout below is
based on a two-layer PCB.
Top View
Bottom View
16
volume and fast frequency
response. The use of a
tantalum capacitor is more
critical on the VLED line,
which carries a high current.
4. Preferably a multi-layered
board should be used to
provide sufficient ground
plane. Use the layer
underneath and near the
transceiver module as Vcc,
and sandwich that layer
between ground connected
board layers. Refer to the
diagram below for an example
of a four-layer board.
from 9.6 kb/s to 115.2 kb/s, and
supports most remote control
codes. The design of the HSDL3005 also includes the following
unique features:
• Spectrally suited to universal
remote control transmission
function.
• Low passive component
count.
• Shutdown mode for low
power consumption
requirement.
Appendix C:
General Application Guide for
the HSDL-3005 Infrared IrDA®
Compliant 115.2 Kb/s
Transceiver
Description
The HSDL-3005, a wide-voltage
operating range infrared
transceiver is a low-cost and
small form factor device that is
designed to address the mobile
computing market such as PDAs,
as well as small embedded
mobile products such as digital
cameras and cellular phones. It
is spectrally suited to universal
remote control transmission
function. It is fully compliant to
IrDA 1.4 low power specification
Selection of Resistor R1
Resistor R1 should be selected
to provide the appropriate peak
pulse LED current over different
ranges of Vcc as shown on page
3 under "Recommended
Application Circuit
Components".
Interface to Recommended
I/O Chips
The HSDL-3005’s TXD data
input is buffered to allow for
CMOS drive levels. No peaking
circuit or capacitor is required.
Data rate from 9.6 kb/s up to
115.2 kb/s is available at the
RXD pin. The TXD_RC, (pin 7),
or the TXD_IrDA, (pin 3), can be
used to send remote control
codes.
The block diagrams below show
how the IrDA port fits into a
mobile phone and PDA platform.
SPEAKER
AUDIO INTERFACE
DSP CORE
MICROPHONE
ASIC
CONTROLLER
RF INTERFACE
TRANSCEIVER
MOD/
DE-MODULATOR
IR
RC
MICROCONTROLLER
USER INTERFACE
HSDL-3005
MOBILE PHONE PLATFORM
Figure 12. IR layout in mobile phone platform.
17
LCD
PANEL
RC
RAM
IR
HSDL-3005
CPU
FOR EMBEDDED
APPLICATION
ROM
PCMCIA
CONTROLLER
TOUCH
PANEL
COM
PORT
RS232C
DRIVER
PDA PLATFORM
Figure 13. IR layout in PDA platform.
The link distance testing was
done using typical HSDL-3005
units with SMC’s FDC37C669
and FDC37N769 Super I/O
controllers. An IrDA link
distance of up to 70 cm was
demonstrated.
Remote Control Operation
The HSDL-3005 is spectrally
suited to universal remote
control transmission function.
Remote control applications are
not governed by any standards,
owing to which there are
numerous remote control codes
in the market. Each of these
18
standards results in receiver
modules with different
sensitivities, depending on the
carrier frequencies and
responsivity to the incident light
wavelength.
Based on a survey of some
commonly used remote control
receiver modules, the irradiance
is found to be in the range of
0.05 ~ 0.07 mW/cm2. Based on a
typical irradiance of 0.05 mW/
cm2 and 0.075 mW/cm2 and
turning on the RC LED, a typical
link distance of 8 m and 7 m is
achieved typically.
Appendix D:
Window Designs for
HSDL-3005
Minimum and Maximum Window Sizes
Dimensions are in mm.
To ensure IrDA compliance,
some constraints on the height
and width of the window exist.
The minimum dimensions
ensure that the IrDA cone angles
are met without vignetting. The
maximum dimensions minimize
the effects of stray light. The
minimum size corresponds to a
cone angle of 30 degrees, the
maximum to a cone angle of 60
degrees.
Depth (Z)
0
1
2
3
4
5
6
7
8
9
10
Y min.
1.70
2.23
2.77
3.31
3.84
4.38
4.91
5.45
5.99
6.52
7.06
X min.
6.80
7.33
7.87
8.41
8.94
9.48
10.01
10.55
11.09
11.62
12.16
Y max.
3.66
4.82
5.97
7.12
8.28
9.43
10.59
11.74
12.90
14.05
15.21
Window Height Y vs. Module Depth Z
Z
16
60° CONE
14
X
X is the width of the window, Y
is the height of the window, and
Z is the distance from the HSDL3005 to the back of the window.
The distance from the center of
the LED lens to the center of the
photodiode lens is 5.1 mm. The
equations for the size of the
window are as follows:
WINDOW HEIGHT Y – mm
Y
10
ACCEPTABLE
RANGE
8
4
0
0
2
4
6
8
10
MODULE DEPTH Z – mm
Window Width X vs. Module Depth Z
22
60° CONE
WINDOW WIDTH X – mm
20
18
16
14
ACCEPTABLE
RANGE
12
30° CONE
10
8
6
0
2
4
6
MODULE DEPTH Z – mm
19
30° CONE
6
2
X = 5.1 +2(Z + D) tan θ
Y = 2(Z + D) tan θ
Where θ is the required half
angle for viewing. For the IrDA
minimum, it is 15 degrees, for
the IrDA maximum it is 30
degrees. (D is the depth of the
LED image inside the part, 3.17
mm). These equations result in
the following tables and graphs:
12
8
10
X max.
8.76
9.92
11.07
12.22
13.38
14.53
15.69
16.84
18.00
19.15
20.31
Window Material
Almost any plastic material will
work as a window material.
Polycarbonate is recommended.
The surface finish of the plastic
should be smooth, without any
texture. An IR filter dye may be
used in the window to make it
look black to the eye, but the
total optical loss of the window
should be 10% or less for best
optical performance. Light loss
should be measured at 875 nm.
The recommended plastic
materials for use as a cosmetic
window are available from
General Electric Plastics.
Recommended Plastic Materials
Material #
Lexan 141
Lexan 920A
Lexan 940A
Light Transmission
88%
85%
85%
Haze
1%
1%
1%
Note: 920A and 940A are more flame retardant than 141.
Recommended Dye: Violet #21051 (IR transmissant above 625 nm)
20
Refractive Index
1.586
1.586
1.586
Shape of the Window
From an optics standpoint, the
window should be flat. This
ensures that the window will not
alter either the radiation pattern
of the LED, or the receive
pattern of the photodiode.
If the window must be curved
for mechanical or industrial
design reasons, place the same
curve on the back side of the
window that has an identical
radius as the front side. While
this will not completely
eliminate the lens effect of the
front curved surface, it will
significantly reduce the effects.
The amount of change in the
radiation pattern is dependent
upon the material chosen for the
window, the radius of the front
and back curves, and the
distance from the back surface
to the transceiver. Once these
items are known, a lens design
can be made which will
eliminate the effect of the front
surface curve.
The following drawings show the
effects of a curved window on
the radiation pattern. In all
cases, the center thickness of the
window is 1.5 mm, the window
is made of polycarbonate plastic,
and the distance from the
transceiver to the back surface
of the window is 3 mm.
Flat Window
Curved Front and Back
Curved Front, Flat Back
(First choice)
(Second choice)
(Do not use)
21
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved. Obsoletes 5989-0729EN
5989-4166EN June 26, 2006