IrDAW Data 1.2 Low Power Compliant 115.2 kb/s Infrared Transceiver Technical Data Features • Ultra Small Surface Mount Package • Minimal Height: 2.5 mm • Vcc from 2.7 to 3.6 Volts • Withstands > 250 mVp-p Power Supply Ripple • LED Supply Voltage can Range from 2.7 to 6.0 Volts • Low Shutdown Current – 20 nA Typical HSDL-3201 • Complete Shutdown – TxD, RxD, PIN Diode • One Optional External Component • Temperature Range: -25 °C to 85°C • 32 mA LED Drive Current • Integrated EMI Shield • IEC825-1 Class 1 Eye Safe • Edge Detection Input – Prevents the LED from Long Turn on Time NE CELL PHONES PAGERS PDAs CAMERAS ° 30 CO TI NA MI ON U ILL .2 IrDA 1 R OWE LOW P .0/1.2 IrDA 1 D OR AR STAND WER O LOW P CELL PHONES PAGERS PRINTERS 20 CM TO LOW POWER DEVICES 30 CM TO STANDARD DEVICES PCs PDAs CAMERAS Powered by ICminer.com Electronic-Library Service CopyRight 2003 2 Applications Application Circuit VLED TXD RXD SHUT DOWN 8 VLED 7 TXD LED CURRENT SOURCE 6 RXD 5 SD SHIELD • Mobile Telecom – Cellular Phones – Pagers – Smart Phones • Data Communication – PDAs – Portable Printers • Digital Imaging – Digital Cameras – Photo-Imaging Printers 4 AGND VCC C1 1.0 µF 3 2 VCC NC RX PULSE SHAPER 1 GND Description The HSDL-3201 is one of a new generation of low-cost Infrared (IR) transceiver modules from Agilent Technologies. It features the smallest footprint in the industry at 2.5 H x 8.0 W x 3.0 D mm. Although the supply voltage can range from 2.7 V to 3.6 V, the LED drive current is internally compensated to a constant 32 mA to assure that link distances meet the IrDA Data 1.2 (low power) physical layer specifications. I/O Pins Configuration Table Pin 1 2 Symbol GND NC Description Ground No Connection 3 4 VCC AGND Supply Voltage Analog Ground 5 SD 6 RXD Receiver Data Output. Active Low. 7 TXD Transmitter Data Input. Active High. 8 VLED LED Voltage - SHIELD The HSDL-3201 meets the 20 cm link distance to other IrDA 1.2 low power devices, and a 30 cm link distance to IrDA 1.2 standard devices. Pinout, Rear View 8 7 6 5 4 3 2 Shut Down Active High 1 Powered by ICminer.com Electronic-Library Service CopyRight 2003 EMI Shield Notes Connect to system ground. This pin must be left unconnected. Regulated: 2.7 to 3.6 Volts Connect to a “quiet” ground. This pin must be driven either high or low. Do NOT float the pin. Output is a low pulse for 2.4 µs when a light pulse is seen. Logic high turns the LED on. If held high longer than ~ 20 µs, the LED is turned off. TXD must be driven high or low. Do NOT float the pin. May be unregulated: 2.7 to 6.0 volts. Connect to system ground via a low inductance trace. For best performance, do not directly connect to GND or AGND at the part. 3 Recommended Application Circuit Components Component C1 Recommended Value 1.0 µF Shutdown Mode Notes Note 1 Absolute Maximum Ratings For implementations where case to ambient thermal resistance is ≤ 50°C/W. Parameter Storage Temperature Operating Temperature LED Supply Voltage Supply Voltage Input Voltage: TXD, SD Output Voltage: RXD Solder Reflow Temperature Profile Symbol TS TA VVLED VCC VI VO Min. -40 -25 -0.5 -0.5 0 -0.5 Max. 100 85 7 7 VCC + 0.5 VCC + 0.5 Units °C °C V V V V The LED and RXD outputs are controlled by the combination of the TXD and SD pins and light falling on the receiver. As shown in the table below, the transmitter is non-inverting; the LED is on when the TXD pin is high and off when TXD is low. The receiver is RXD Pin: This pin is NOT Tristate. During shutdown the equivalent circuit is a weak pullup (~300 kΩ) to Vcc. The ESD protection diodes to Vcc and Ground are also present. TXD Pin: Input protection diodes are present. VLED Pin: Possible leakage current of 1.5 nA. See Reflow Profile, page 13 Transceiver I/O Truth Table When the HSDL-3201 is in Shutdown Mode (SD pin high), the part presents different impedances to the rest of the circuit than when it is in normal mode. inverting; the RXD pin is low during IrDA signal pulses and high when the receiver does not see any light. When shutdown (SD pin high), the LED is off (the state of the TXD pin does not matter), and the RXD pin is pulled high with a weak internal pullup. SD Pin: Will draw approximately 16 nA when driven high. Marking Information The unit is marked with the letters “HPL” and the datecode “YWW” on the shield. Y is the last digit of the year, and WW is the workweek. Ordering Information SD Low High TXD High LED On Low Off Don’t care Off Receiver Don’t care IrDA Signal No Signal Don’t care RXD Not Valid Low High High Notes 2, 3 4, 5 6 Specify the part number followed by an option number. HSDL-3201#XXX There are three options available: 011 001 021 Taped in a short strip (no reel), 10 per strip Taped and 7” Reel Packaging, 500 per reel Taped and 13” Reel Packaging, 2500 per reel Caution: The BiCMOS inherent to this design of this component increases the component’s susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. Powered by ICminer.com Electronic-Library Service CopyRight 2003 4 Recommended Operating Conditions Parameter Operating Temperature Supply Voltage LED Supply Voltage TXD, SD Input Logic High Voltage Logic Low Receiver Input Logic High Irradiance Logic Low Receiver Data Rate Ambient Light Symbol TA VCC VLED VIH VIL EIH EIL Min. -25 2.7 2.7 2/3 VCC 0 0.0081 Max. Units Conditions ° 85 C 3.6 V 6.0 V VCC V 1/3 VCC V 500 mW/cm2 For in-band signals. 2 0.3 µW/cm For in-band signals. 2.4 115.2 kb/s See Test Methods on page 16 for details RXD Output Waveform SD 90% RX LIGHT 50% VOL 7 7 Receiver Wakeup Time Definition tpw VOH Notes 10% RXD tf tr tRW LED Optical Waveform Transmitter Wakeup Time Definition tpw LED ON 90% SD 50% TXD 10% LED OFF tr tf TX LIGHT tTW TXD “Stuck ON” Protection TXD LED tpw (MAX.) Powered by ICminer.com Electronic-Library Service CopyRight 2003 5 Electrical & Optical Specifications Specifications hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions may be anywhere in their operating range. All typical values are at 25°C and 3.0 V unless otherwise noted. Parameter Symbol Min. 2φ 1/2 30 Typ. Max. Units Conditions Note Receiver Viewing Angle Peak Sensitivity Wavelength RXD Output Voltage λp ° 880 nm Logic High VOH V CC -0.2 VCC V IOH =-200 µA, EI ≤ 0.3 µW/cm2 Logic Low VOL 0 0.4 V IOL=200 µA tPW 2.0 8 2.45 3.0 µs RXD Rise Time tR 11 20 ns tPW (EI)=1.6 µs, CL =10 pF RXD Fall Time tF 16 25 ns tPW (EI)=1.6 µs, CL =10 pF Receiver Latency Time tL 25 50 µs 9 Receiver Wake Up Time tRW 28 40 µs 10 9 28.8 RXD Pulse Width 8 Transmitter Radiant Intensity Viewing Angle Peak Wavelength EIH 4 2θ 1/2 30 λp Spectral Line Half Width ∆λ1/2 Optical Pulse Width tOPW 60 875 mW/Sr TA=25°C, θ 1/2 ≤ 15°, TXD ≥ 2/3 VCC ° nm 35 nm 1.6 2.23 µs tPW (TXD)=1.6 µs tOPWM 20 30 µs TXD pin stuck high Optical Rise Time tOR 180 600 ns tPW (TXD)=1.6 µs Optical Fall Time t OF 180 600 ns tPW (TXD)=1.6 µs VCC V Max. Optical Pulse Width 1.41 TXD Logic Levels High VIH 2/3 V CC Low VIL 0 TXD Input Current High IH 25 nA Low IL -15 nA V I ≥ 2/3 VCC 0 ≤ VI ≤ 1/3 VCC LED Current 1/3 V CC V On IVLED 32 mA VVLED=VCC=3.6 V, V I(TXD) ≥ 2/3 VCC Off IVLED 1.5 nA Shutdown IVLED 1.5 nA VVLED=VCC=3.6 V, V I(TXD) ≤ 1/3 VCC V I(SD) ≥ 2/3 VCC tTW 12 Transmitter Wake Up Time 20 µs VCC V 11 Transceiver SD Logic Levels High VIH 2/3 V CC Low VIL 0 SD Input Current High IH 16 nA Low IL -150 nA V I ≥ 2/3 VCC 0 ≤ VI ≤ 1/3 VCC DC Supply Current Shutdown ICC1 20 nA VCC =3.6 V,VSD ≥ VCC - 0.5, T A=25°C Idle ICC2 100 µA AC Supply Current Active, receive ICC3 0.8 mA VCC =3.6 V, VI(TXD) ≤ 1/3 VCC, EI=0 V CC=3.6 V, VI(TXD) ≤ 1/3 VCC Active, transmit ICC4 9.0 mA V CC=3.6 V, VI(TXD) ≥ 2/3 VCC Notes at top of next page. Powered by ICminer.com Electronic-Library Service CopyRight 2003 1/3 V CC 200 3.0 V 12,13 14 6 Notes: 1. C1, which is optional, must be placed within 0.7 cm of the HSDL-3201 to obtain optimum noise immunity. 2. If TXD is stuck in the high state, the LED will turn off after about 20 µs. 3. RXD will echo the TXD signal while TXD is transmitting data. 4. In-Band IrDA signals and data rates ≤ 115.2 Kb/s. 5. RXD Logic Low is a pulsed response. The pulse width is 2.4 µs, independent of data rate. 6. RXD Logic High during shutdown is a weak pullup resistor (300 kΩ). 7. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 nm ≤ λp ≤ 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification. 8. For in band signals ≤ 115.2 Kb/s where 8.1 µW/cm2 ≤ EI ≤ 500 mW/cm2 . 9. Latency is defined as the time from the last TXD light output pulse until the receiver has recovered full sensitivity. 10. Receiver wake up time is measured from the SD pin high to low transition or Vcc power on, to a valid RXD output. 11. Transmitter wake up time is measured from the SD pin high to low transition or Vcc power on, to a valid light output in response to a TXD pulse. 12. Typical values are at EI = 10 mW/cm2 13. Maximum value is at EI = 500 mW/cm 2. 14. Current is due to internal stages of the LED current mirror. This current is in addition to the ILED current. 34.0 Type of Transceiver Typical HSDL-3201 Max. Brightness HSDL-3201 Typical SIR Typical FIR The DC component is measured in two states, normal (idle mode) and shutdown. This current is present whenever power is applied to the part. The AC component is either the extra current drawn from the Vcc pin by the photodiode when it sees light, or the current needed by the LED current circuit. The values in the table are peak values. Since IrDA data is transmitted with a 3/16 duty cycle, the average value is 3/16 of the peak. The AC current is not drawn when no light is present. Distance (cm) 1.0 1.7 33.5 33.0 ILED – mA The supply current for the HSDL-3201 has two different components, DC and AC. Distances between Units to See a 10 mW/cm2 Light Level 32.5 VCC = 3.6 VOLTS VCC = 3.3 VOLTS VCC = 3.0 VOLTS 32.0 2.0 3.2 31.5 VCC = 2.7 VOLTS 31.0 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 The 500 mW/cm 2 light level is for the maximum brightness IrDA unit at 1 cm. VLED – VOLTS Figure 2. LED Current vs. VLED. 34.0 VLED = 3.6 VOLTS 33.5 VCC RIPPLE VOLTAGE – V Notes on Supply Current ILED – mA 33.0 32.5 32.0 31.5 31.0 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 VCC – VOLTS Figure 1. LED Current vs. Vcc . Powered by ICminer.com Electronic-Library Service CopyRight 2003 1.0 0.8 0.6 0.4 0.2 0 10 e+3 100 e+3 1 e+6 RIPPLE FREQUENCY – Hz Figure 3. Power Supply Ripple Rejection. (No C1). 10 e+6 7 Package Dimensions MOUNTING CENTER 4.0 1.025 CL 2.05 RECEIVER EMITTER 2.2 2.5 1.175 0.35 0.65 0.80 1.05 1.25 2.85 2.55 4.0 8.0 3.0 2.9 1.85 CL UNIT: mm TOLERANCE: ± 0.2 mm COPLANARITY = 0.1 mm MAX. PIN 1 0.6 3.325 6.65 Powered by ICminer.com Electronic-Library Service CopyRight 2003 8 Tape and Reel Dimensions UNIT: mm 4.0 ± 0.1 1.75 ± 0.1 + 0.1 ∅ 1.5 0 1.5 ± 0.1 POLARITY PIN 8: VLED 7.5 ± 0.1 16.0 ± 0.2 8.4 ± 0.1 PIN 1: GND 3.4 ± 0.1 0.4 ± 0.05 8.0 ± 0.1 2.8 ± 0.1 PROGRESSIVE DIRECTION EMPTY PARTS MOUNTED LEADER (400 mm MIN.) (40 mm MIN.) EMPTY (40 mm MIN.) OPTION # "B" "C" QUANTITY 001 178 60 500 021 330 80 2500 UNIT: mm DETAIL A 2.0 ± 0.5 B C ∅ 13.0 ± 0.5 R 1.0 LABEL 21 ± 0.8 DETAIL A 2 16.4 + 0 2.0 ± 0.5 Powered by ICminer.com Electronic-Library Service CopyRight 2003 9 Moisture Proof Packaging Solder Pad, Mask and Metal Stencil The HDSL-3201 is shipped in moisture proof packaging. Once opened, moisture absorption begins. STENCIL APERTURE METAL STENCIL FOR SOLDER PASTE PRINTING Recommended Storage Conditions Storage Temperature Relative Humidity 10°C to 30°C LAND PATTERN below 60% RH SOLDER MASK PCB Time from Unsealing to Soldering After removal from the bag, the parts should be soldered within two days if stored at the recommended storage conditions. If times longer than two days are needed, the parts must be stored in a dry box. Recommended Land Pattern CL Baking If the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. Package In reels In bulk Temp. 1.25 ≥ 48 hours 100°C ≥ 4 hours 125°C ≥ 2 hours 150°C ≥ 1 hour 2.05 0.10 Time 60°C SHIELD SOLDER PAD 1.35 MOUNTING CENTER 0.775 1.75 FIDUCIAL Baking should only be done once. 0.60 0.475 1.425 UNIT: mm 2.375 3.325 Powered by ICminer.com Electronic-Library Service CopyRight 2003 10 Recommended Metal Solder Stencil Aperture It is recommended that only a 0.152 mm (0.006 inches) or a 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. See the table below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. APERTURES AS PER LAND DIMENSIONS t w l Stencil Thickness, t (mm) Aperture opening for shield pad is 2.7 mm x 1.25 mm as per land pattern. 0.152 mm 0.127 mm Adjacent Land Keep-out and Solder Mask Areas Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. The minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2 mm. It is recommended that two fiducial crosses be place at midlength of the pads for unit alignment. Note: Wet/Liquid PhotoImageable solder resist/mask is recommended. Powered by ICminer.com Electronic-Library Service CopyRight 2003 Aperture Size(mm) length, l width, w 2.60 ± 0.05 0.55 ± 0.05 3.00 ± 0.05 0.55 ± 0.05 8.2 0.2 2.6 3.0 SOLDER MASK UNITS: mm 11 PCB Layout Suggestion Component Side The following PCB layout shows a recommended layout that should result in good electrical and EMI performance. Things to note: 1. The ground plane should be continuous under the part, but should not extend under the shield trace. 2. The shield trace is a wide, low inductance trace back to the system ground. 4. C1 is an optional Vcc filter capacitor; it may be left out if the Vcc is clean. 5. VLED can be connected to either unfiltered or unregulated power. If C1 is used, and if VLED is connected to Vcc, the connection should be before the C1 cap. Circuit Side Powered by ICminer.com Electronic-Library Service CopyRight 2003 SHIELD GROUND VCC SHUTDOWN RXD VLED 3. The AGND pin is connected to the ground plane and not to the shield tab. TXD C1 12 Recommended Solder Paste/Cream Volume for Castellation Joints Based on calculation and experiment, the printed solder paste volume required per castellation pad is 0.22 cubic mm (based on either no-clean or aqueous solder cream types with typically 60% to 65% solid content by volume). Using the recommended stencil results in this volume of solder paste. Pick and Place Misalignment Tolerance and Self-Alignment after Solder Reflow If the printed solder paste volume is adequate, the HSDL-3201 will self align after solder reflow. Units should be properly reflowed in IR/Hot Air convection oven using the recommended reflow profile. The direction of board travel does not matter. Tolerance for X- axis Alignment of Castellation Y- axis Misalignment of Castellation Misalignment of castellation to the land pad should not exceed 0.2 mm or about one half the width of the castellation during placement of the unit. The castellations will self-align to the pads during solder reflow. In the Y direction, the HSDL-3201 does not self align after solder reflow. Agilent recommends that the part be placed in line with the fiducial mark (mid-length of land pad.) This will enable sufficient land length (minimum of one half of the land pad) to form a good joint. See the drawing below. Tolerance for Rotational (θ) Misalignment Mounted units should not be rotated more than ± 3 degrees with reference to center X-Y as shown in the direction definition. Units that are rotated more than ± 3 degrees will not self align after solder reflow. Units with less than a ± 3 degree misalignment will self-align after solder reflow. EDGE Direction Definition Y X θ MINIMUM 1/2 THE LENGTH OF THE LAND PAD FIDUCIAL Allowable Misalignment Direction X Y θ Tolerance ≤ 0.2 mm See text ≤ ± 3 degrees Powered by ICminer.com Electronic-Library Service CopyRight 2003 13 Reflow Profile MAX. 245°C T – TEMPERATURE – (°C) 230 R3 200 183 170 150 R2 90 sec. MAX. ABOVE 183°C 125 R1 100 R4 R5 50 25 0 50 100 150 200 250 300 t-TIME (SECONDS) P2 SOLDER PASTE DRY P1 HEAT UP Process Zone Heat Up Solder Paste Dry Solder Reflow Cool Down In process zone P1, the PC board and HSDL-3201 castellation pins are heated to a temperature of 125°C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 4°C per second to allow for even heating of both the PC board and HSDL-3201 castellations. P4 COOL DOWN ∆T 25°C to 125°C 125°C to 170°C 170°C to 230°C (245°C max.) 230°C to 170°C 170°C to 25°C Symbol P1, R1 P2, R2 P3, R3 P3, R4 P4, R5 The reflow profile is a straight line representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different ∆T/∆time temperature change rates. The ∆T/∆time rates are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. P3 SOLDER REFLOW Process zone P2 should be of sufficient time duration (greater than 60 seconds), to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder, usually 170°C (338°F). Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 230°C (446°F) for optimum results. The dwell time above the liquidus point of solder should be between 15 and 90 seconds. It usually takes about 15 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 90 seconds, the intermetallic growth within the solder connections becomes excessive, Powered by ICminer.com Electronic-Library Service CopyRight 2003 Maximum ∆T/∆time 4°C/s 0.5°C/s 4°C/s -4°C/s -3°C/s resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 170°C (338°F), to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25°C (77°F) should not exceed 3°C per second maximum. This limitation is necessary to allow the PC board and HSDL-3201 castellations to change dimensions evenly, putting minimal stresses on the HSDL-3201 transceiver. 14 Window Design Minimum and Maximum Window Sizes To insure IrDA compliance, some constraints on the height and width of the window exist. The minimum dimensions ensure that the IrDA cone angles are met without vignetting. The maximum dimensions minimize the effects of stray light. The minimum size corresponds to a cone angle of 30 degrees, the maximum, to a cone angle of 60 degrees. Dimensions are in mm. Z Depth (Z) 0 1 2 3 4 5 6 7 8 9 10 Y min. 1.70 2.23 2.77 3.31 3.84 4.38 4.91 5.45 5.99 6.52 7.06 X min. 6.80 7.33 7.87 8.41 8.94 9.48 10.01 10.55 11.09 11.62 12.16 Y max. 3.66 4.82 5.97 7.12 8.28 9.43 10.59 11.74 12.90 14.05 15.21 X max. 8.76 9.92 11.07 12.22 13.38 14.53 15.69 16.84 18.00 19.15 20.31 Window Height Y vs. Module Depth Z 16 Y 60° CONE X is the width of the window, Y is the height of the window, and Z is the distance from the HSDL-3201 to the back of the window. The distance from the center of the LED lens to the center of the photodiode lens is 5.1 mm. The equations for the size of the window are as follows: X = 5.1 +2(Z + D) tan θ Y = 2(Z + D) tan θ Where θ is the required half angle for viewing. For the IrDA minimum, it is 15 degrees, for the IrDA maximum it is 30 degrees. (D is the depth of the LED image inside the part, 3.17 mm). These equations result in the following tables and graphs: 12 10 ACCEPTABLE RANGE 8 4 0 0 2 4 6 8 10 MODULE DEPTH Z – mm Window Width X vs. Module Depth Z 22 60° CONE 20 18 16 14 ACCEPTABLE RANGE 12 30° CONE 10 8 6 0 2 4 6 8 MODULE DEPTH Z – mm Powered by ICminer.com Electronic-Library Service CopyRight 2003 30° CONE 6 2 WINDOW WIDTH X – mm X WINDOW HEIGHT Y – mm 14 10 15 Shape of the Window From an optics standpoint, the window should be flat. This ensures that the window will not alter either the radiation pattern of the LED, or the receive pattern of the photodiode. Flat Window (First choice) If the window must be curved for mechanical design reasons, place a curve on the back side of the window that has the same radius as the front side. While this will not completely eliminate the lens effect of the front curved surface, it will reduce the effects. The amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. Once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. The following drawings show the effects of a curved window on the radiation pattern. In all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm. Curved Front, Flat Back (Do not use) Powered by ICminer.com Electronic-Library Service CopyRight 2003 Curved Front and Back (Second choice) Test Methods Background Light and Electromagnetic Field There are four ambient interference conditions in which the receiver is to operate correctly. The conditions are to be applied separately: 1. Electromagnetic field: 3 V/m maximum (please refer to IEC 801-3, severity level 3 for details). 2. Sunlight: 10 kilolux maximum at the optical port. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased to provide 490 µW/cm2 (with no modulation) at the optical port. The light source faces the optical port. 4. Fluorescent Lighting: 1000 lux maximum. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased and modulated to provide an optical square wave signal (0 µW/cm2 minimum and 0.3 µW/cm2 peak amplitude with 10% to 90% rise and fall times less than or equal to 100 ns) over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The frequency of the optical signal is swept over the frequency range from 20 kHz to 200 kHz. Due to the variety of fluorescent lamps and the range of IR emissions, this condition is not expected to cover all circumstances. It will provide a common floor for IrDA operation. This simulates sunlight within the IrDA spectral range. The effect of longer wavelength radiation is covered by the incandescent condition. 3. Incandescent Lighting: 1000 lux maximum. This is produced with general service, tungsten-filament, gas-filled, inside frosted lamps in the 60 Watt to 100 Watt range to generate 1000 lux over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The source is expected to have a filament temperature in the 2700 to 3050 Kelvin range and a spectral peak in the 850 to 1050 nm range. www.semiconductor.agilent.com Data subject to change. Copyright © 2000 Agilent Technologies Inc. Obsoletes 5968-2033E 5980-1768E (6/00) Powered by ICminer.com Electronic-Library Service CopyRight 2003