AGILENT HSDL-3210-021

Agilent HSDL-3210
IrDA® Compliant Low Power
1.15 Mbit/s Infrared
Transceiver
Data Sheet
Description
The HSDL-3210 is one of a new
generation of low-cost Infrared (IR)
transceiver modules from Agilent
Technologies. It features one of the
smallest footprint in the industry at
2.5 H x 8.0 W x 3.0 D mm.
Although the supply voltage can
range from 2.7 V to 3.6 V, the LED
is driven by an internal constant
current source of 60 mA at SIR data
rates and 150 mA at MIR data rates.
The HSDL-3210 incorporates the
capability for adjustable optical
power. The optical power can be
adjusted lower when the nominal
desired link distance is very short.
At 5 cm link distance, only 6% of
the full power is required.
The HSDL-3210 supports the
Serial Interface for Transceiver
Control Specification that
provides a common interface
between the transceiver and
controller. It is also designed to
interface to input/output logic
circuits as low as 1.5 V.
Features
• Fully Compliant to IrDA 1.4 low
power specification from 9.6 kbit/s
to 1.15 Mbit/s
• Ultra small surface mount
package
• Minimal height: 2.5 mm
• VCC from 2.7 to 3.6 volts
• Interface to 1.5 volts input/output
logic circuits
• Withstands 100 mVp-p power
supply ripple typically
• Adjustable optical power for link
distance from 5 to 20 cm
• Low shutdown current – 10 nA
typical
• Complete shutdown – TxD, RxD,
PIN diode
• Three optional external
components
• Temperature performance
guaranteed, -25°C to 85°C
• Integrated EMI shield
• IEC60825-1 class 1 eye safe
• Edge detection input – Prevents
the LED from long turn on time
Applications
• Mobile telecom
– Cellular phones
– Pagers
– Smart phones
• Data communication
– PDAs
– Portable printers
• Digital imaging
– Digital cameras
– Photo-imaging printers
Application Support Information
The Application Engineering
group in Agilent Technologies is
available to assist you with the
Technical understanding
associated with HSDL-3210
infrared transceiver module. You
can contact them through your
local Agilent sales representatives
for additional details.
Ordering Information
Part Number
Packaging Type
Package
Quantity
HSDL-3210-021
Tape and Reel
Front View
2500
Application Circuit
VLED 8
8
C1
6.8 µF
TXD/SWDAT 7
6
5
4
3
2
1
REAR VIEW
RXD/SRDAT 6
Figure 2. Rear view diagram with pin-out.
SHIELD
SD 5
SCLK 4
7
ADJUSTABLE
OPTICAL
POWER
SERIAL
TRANSCEIVER
CONTROL
VCC 3
I/O VCC 2
C2
1.0 µF
C3
0.47 µF
GND 1
Figure 1. Functional block diagram of HSDL-3210.
I/O Pin Configuration Table
Pin
Symbol
Description
Notes
1
GND
Ground
Connect to system ground.
2
IOVCC
Input/Output VCC
Connect to ASIC logic controller VCC voltage.
3
VCC
Supply Voltage
Regulated, 2.7 to 3.6 Volts
4
SCLK
Serial Clock
Use as clock input pin for programming mode. See Table 1 for details.
5
SD
Shut Down Active High
This pin must be driven either high or low, do NOT float the pin.
6
RXD/SRDAT
Receiver Data Output.
Active Low
Output is a low pulse when a light pulse is received. SRDAT is the read
data for the Serial Transceiver Control (STC). Do NOT float this pin.
7
TXD/SWDAT Transmitter Data Input/
Serial Write Data
Logic High turns on the LED. If held high longer than ~20 µs, the LED
is turned off. SWDAT is the write data for the Serial Transceiver
Control (STC). Do NOT float this pin.
8
VLED
LED Supply Voltage
May be unregulated, 2.7 to 5.5 volts.
-
SHIELD
EMI Shield
Connect to system ground via a low inductance trace. For best
performance, do not connect to GND directly at the part.
2
Recommended Application Circuit Components
Component
Recommended Value
Notes
C1
6.8 µF, ± 20%, Tantalum
1
C2
1.0 µF, ± 20%, Tantalum
C3
0.47 µF, ± 20%, Ceramic
Note:
1. C1, which is optional, must be placed within 0.7 cm of the HSDL-3210 to obtain optimum noise immunity.
Serial Interface for Transceiver
Control
The Serial Interface for
Transceiver Control (STC) is used
to control and program the
features of the transceiver. These
features include input/output
(I/O) control, optical power
adjustment and shut down.
ADDRESS [2-0]
INDEX [3-0]
The STC requires three signals: a
serial clock (SCLK) that is used
for timing, and two unidirectional
lines multiplexed with the
transmitter (write) TXD/SWDAT
and receiver (read) RXD/SRDAT
infrared signal lines.
The HSDL-3210 supports the
write function to disable/enable
the TXD line, disable/enable the
C
RXD line and 4-level optical
power adjustment.
A set of commands is provided to
handle the programming control
features. The general command
format is shown in Figure 3. The
HSDL-3210 STC Write Data
Commands are shown in Table 1.
DATA
Figure 3. General command format.
Table 1. Serial Interface for Transceiver Control – Write Data Format
Address [2-0]
Index [3-0]
C
Data
SIR (2.4 to 115.2 Kbps)
000
0001
1
00000000
MIR (0.576, 1.152 Mbps)
000
0001
1
00000001
SD Normal Mode
000
0000
1
XXXXXXX1
SD Sleep Mode
000
0000
1
XXXXXXX0
RXD disable
000
0000
1
XXXXXX0X
RXD enable
000
0000
1
XXXXXX1X
TXD disable
000
0000
1
XXXXX0XX
TXD enable
000
0000
1
XXXXX1XX
10% link distance
000
0010
1
00XXXXXX
25% link distance
000
0010
1
01XXXXXX
50% link distance
000
0010
1
10XXXXXX
100% link distance
000
0010
1
11XXXXXX
IrDA Data –data rates
I/O Control
Optical Power Adjustment
3
Table 2. Serial Interface for Transceiver Control – Read Data Format
Address [2-0]
Index [3-0]
C
Data
SIR (2.4 to 115.2 Kbps)
000
0001
0
00000000
MIR (0.576, 1.152 Mbps)
000
0001
0
00000001
SD Normal Mode
000
0000
0
XXXXXXX0
SD Sleep Mode
000
0000
0
XXXXXXX1
RXD disable
000
0000
0
XXXXXX0X
RXD enable
000
0000
0
XXXXXX1X
TXD disable
000
0000
0
XXXXX0XX
TXD enable
000
0000
0
XXXXX1XX
10% link distance
000
0010
0
00XXXXXX
25% link distance
000
0010
0
01XXXXXX
50% link distance
000
0010
0
10XXXXXX
100% link distance
000
0010
0
11XXXXXX
Manufacturer
000
1111
0
00000001
Product
000
1111
0
01000001
IrDA Data –data rates
I/O Control
Optical Power Adjustment
ID
.
Transceiver I/O Truth Table
STC SD Mode
SCLK
SD
TXD
LED
Receiver
RXD
Notes
Normal Mode
Low
Low
High
On
Don’t care
Not Valid
2,3
Low
Off
IrDA Signal
Low
4,5
No Signal
High
Sleep Mode
Don’t care
Don’t care
High
Don’t care
Off
Don’t care
High
6
Don’t care
Off
Don’t care
High
6
Notes:
2. If TXD is stuck in the high state, the LED will turn off after about 14 µs.
3. RXD will echo the TXD signal while TXD is transmitting data.
4. In-Band IrDA signals and data rates ≤ 1.152 Mbps.
5. RXD Logic Low is pulsed response.
6. RXD Logic High during shutdown is a weak pull up (equivalent to an approximately 300 kΩ resistor).
4
Caution: The BiCMOS inherent to this design of this component increases the component’s
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static
precautions be taken in handling and assembly of this component to prevent damage and/or
degradation which may be induced by ESD.
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is ≤50°C/W.
Parameter
Symbol
Min.
Max.
Units
Storage Temperature
TS
-40
100
°C
Operating Temperature
TA
-25
85
°C
LED Supply Voltage
VLED
0
6.5
V
Supply Voltage
VCC
0
6.5
V
Input/Output Voltage
IOVCC
0
VCC
V
Input Voltage: TXD, SCLK, SD
VI
0
VCC+ 0.5
V
Output Voltage: RXD
VO
-0.5
VCC+ 0.5
V
Recommended Operating Conditions
Parameter
Symbol Min.
Max.
Units
Operating Temperature
TA
-25
85
°C
Supply Voltage
VCC
2.7
3.6
V
Conditions
Notes
Logic Input Voltage
Logic High
VIH
2/3 IOVCC
IOVCC
V
1.5 V ≤IOVCC ≤3.6 V
for TXD ,SCLK, SD
Logic Low
VIL
0
1/3 IOVCC
V
1.5 V ≤IOVCC ≤3.6 V
EIH
0.009
500
mW/cm2
For in-band signals
≤115.2kb/s (SIR)
7
0.0225
500
mW/cm2
0.576 Mb/s ≤ in-band
signals ≤ 1.15 Mb/s (MIR)
7
0.3
µW/cm2
For in-band signals.
1.5
VCC
V
0.0024
1.152
Mb/s
Logic High Receiver
Input Irradiance EIH
Logic Low Receiver Input
EIL
Input/Output Voltage
IOVCC
Receiver Data Rate
5
Electrical and Optical Specifications
Specifications hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions may be
anywhere in their operating range. All typical values are at 25°C and 3.0 V unless otherwise noted.
Parameter
Symbol
Min.
Logic High
VOH
Logic Low
Typ.
Max.
Units
Conditions
Notes
IOVCC -0.2
IOVCC
V
IOH=-200 µA, EI ≤0.3
µW/cm2
VOL
0
0.4
V
IOL=200 µA
8
Viewing Angle
2φ1/2
30
Peak Sensitivity Wavelength
λp
RXD Pulse Width (SIR)
tPW (SIR)
RXD Pulse Width (MIR)
tPW(MIR) 200
RXD Rise and Fall Times
tR, tF
Receiver Latency Time
Receiver Wake Up Time
Receiver
RXD Output Voltage
°
880
nm
7.5
µs
CL =10 pF
8,9
750
ns
CL =10 pF
9
25
100
ns
CL =10 pF
tL
25
50
µs
10
tRW
30
100
µs
11
1
Transmitter
Radiant Intensity (SIR)
IEH
4
15
28.8
mW/Sr TA=25°C, θ1/2 ≤15°, TXD ≥ VIH
Radiant Intensity (MIR)
IEH
9
30
72
mW/Sr TA=25°C, θ1/2 ≤15°, TXD ≥ VIH
Peak Wavelength
λp
875
nm
Spectral Line Half Width
∆λ1/2
35
nm
Viewing Angle
2φ1/2
30
Optical Pulse Width (SIR)
tpw
1.41
Optical Pulse Width
(MIR, IOVCC ≥1.5 V)
tpw
148
60
°
1.6
2.23
µs
tpw(TXD) = 1.6 µs
217
260
ns
tpw(TXD) = 217 ns
Optical Rise and Fall Times (SIR)
tr (EI)
tf (EI)
50
600
ns
tpw(TXD) = 1.6 µs
Optical Rise and Fall Times (MIR)
tr (EI)
tf (EI)
30
40
ns
tpw(TXD) = 1.6 µs
LED Current
On (SIR)
IVLED
60
72
mA
VVLED=VCC=3.6 V, VI(TXD) ≥ VIH
On (MIR)
IVLED
150
180
mA
VVLED=VCC=3.6 V, VI(TXD) ≥ VIH
Current Off
IVLED
0.005
1
µs
VVLED=VCC=3.6 V, VI(TXD) ≤ VIL
High
IH
10
200
nA
VI ≥ VIH
Low
IL
-10
-200
nA
0 ≤ VI ≤ VIL
Shutdown
ICC1
0.01
µA
VCC=3.6 V, VSD ≥ VCC - 0.5,
TA=25°C
Idle
ICC2
300
450
µA
VCC=3.6 V, VI(TXD) ≤ VIL,EI=0
Active,
Receive
ICC3
0.8
3.0
mA
VCC=3.6 V, VI(TXD) ≤ VIL
Transceiver
TXD Input Current
Supply Current
Notes:
7. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 nm ≤ λp ≤ 900 nm,
and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification.
8. For in band signals ≤ 1.152 Mbps where 9 µW/cm2 ≤ EI ≤ 500 mW/cm2.
9. For 0.576 Mbps ≤ in band signals ≤ 1.152 Mbps where 22.5 µW/cm2 ≤ EI ≤ 500 mW/cm2 .
10. Latency is defined as the time from the last TXD light output pulse until the receiver has recovered full sensitivity.
11. Receiver wake up time is measured from the SD pin high to low transition or VCC power on, to valid RXD output.
12. Typical values are at EI = 10 mW/cm2.
13. Maximum value is at EI = 500 mW/cm2.
6
12,13
tpw
VOH
90%
50%
VOL
10%
tf
tr
Figure 4. RXD output waveform.
tpw
LED ON
90%
50%
10%
LED OFF
tr
tf
Figure 5. LED optical waveform.
TXD
LED
tpw (MAX.)
Figure 6. TXD ‘Stuck On’ protection waveform.
SD
SD
RX
LIGHT
TXD
RXD
TX
LIGHT
tRW
Figure 7. Receiver wakeup time waveform.
7
tTW
Figure 8. TXD wakeup time waveform.
Package Dimensions
MOUNTING
CENTER
4.0
1.025
CL
2.05
RECEIVER
EMITTER
2.2
2.5
1.175
1.05
2.85
COPLANARITY:
0 to -0.2 mm
1.25
0.35
0.65
0.80
2.55
4.0
8.0
3.0
2.9
1.85
CL
UNIT: mm
TOLERANCE: ± 0.2 mm
COPLANARITY: 0.1 mm MAX.
PIN 1
0.6
3.325
6.65
Figure 9. Package outline dimensions.
8
Tape and Reel Dimensions
UNIT: mm
4.0 ± 0.1
1.75 ± 0.1
+ 0.1
∅ 1.5 0
1.5 ± 0.1
POLARITY
PIN 8: LED A
7.5 ± 0.1
16.0 ± 0.2
8.4 ± 0.1
PIN 1: CX
3.4 ± 0.1
0.4 ± 0.05
8.0 ± 0.1
2.8 ± 0.1
PROGRESSIVE DIRECTION
EMPTY
PARTS MOUNTED
LEADER
(400 mm MIN.)
(40 mm MIN.)
EMPTY
(40 mm MIN.)
OPTION # "B" "C" QUANTITY
001
178
60
500
021
330
80
2500
UNIT: mm
DETAIL A
2.0 ± 0.5
B
C
∅ 13.0 ± 0.5
R 1.0
LABEL
21 ± 0.8
DETAIL A
2
16.4 + 0
2.0 ± 0.5
Figure 10. Tape and reel dimensions.
9
Moisture-Proof Packaging
All HSDL-3210 options are shipped in moisture-proof packaging. Once opened, moisture absorption begins.
This product is compliant to JEDEC level 4.
UNITS IN A SEALED
MOISTURE-PROOF
PACKAGE
PACKAGE IS
OPENED (UNSEALED)
ENVIRONMENT
LESS THAN 25°C,
AND LESS THAN
60% RH?
YES
NO BAKING
IS NECESSARY
NO
PACKAGE IS
OPENED MORE
THAN 72 HOURS?
NO
YES
PERFORM RECOMMENDED
BAKING CONDITIONS
Figure 11. Baking conditions chart.
Baking Conditions
Recommended Storage Conditions
If the parts are not stored in dry
conditions, they must be baked
before reflow to prevent damage
to the parts.
Storage Temp.
Relative Humidity
Packaging
In Reels
In Bulk
Temp.
60˚C
100˚C
125˚C
150˚C
Time
≥ 48 hours
≥ 4 hours
≥ 2 hours
≥ 1 hour
Baking should only be done once.
10
10˚C to 30˚C
Below 60% RH
Time from Unsealing to Soldering
After removal from the bag, the
parts should be soldered within
two days if stored at the recommended storage conditions. If
times longer than three days are
needed, the parts must be stored
in a dry box.
Reflow Profile
MAX. 245°C
T – TEMPERATURE – (°C)
230
R3
200
183
170
150
R2
90 sec.
MAX.
ABOVE
183°C
125
R1
100
R4
R5
50
25
0
50
100
150
200
250
300
t-TIME (SECONDS)
P1
HEAT
UP
P2
SOLDER PASTE DRY
P3
SOLDER
REFLOW
P4
COOL
DOWN
Figure 12. Reflow graph.
Process Zone
Heat Up
Solder Paste Dry
Solder Reflow
Cool Down
Symbol
P1, R1
P2, R2
P3, R3
P3, R4
P4, R5
The reflow profile is a straight
line representation of a nominal
temperature profile for a convective reflow solder process. The
temperature profile is divided
into four process zones, each
with different ∆T/∆time temperature change rates. The ∆T/∆time
rates are detailed in the above
table. The temperatures are
measured at the component to
printed circuit board connections.
In process zone P1, the PC board
and HSDL-3210 castellation I/O
pins are heated to a temperature
of 125°C to activate the flux in
the solder paste. The temperature
ramp up rate, R1, is limited to
4°C per second to allow for even
heating of both the PC board and
HSDL-3210 castellation I/O pins.
11
∆T
25˚C to 125˚C
125˚C to 170˚C
170˚C to 230˚C (245˚C at 10 seconds max.)
230˚C to 170˚C
170˚C to 25˚C
Process zone P2 should be of
sufficient time duration (> 60
seconds) to dry the solder paste.
The temperature is raised to a
level just below the liquidus point
of the solder, usually 170°C
(338°F).
Process zone P3 is the solder
reflow zone. In zone P3, the temperature is quickly raised above
the liquidus point of solder to
230°C (446°F) for optimum
results. The dwell time above the
liquidus point of solder should be
between 15 and 90 seconds. It
usually takes about 15 seconds to
assure proper coalescing of the
solder balls into liquid solder and
the formation of good solder
connections. Beyond a dwell
time of 90 seconds, the inter-
Maximum ∆T/∆time
4˚C/s
0.5˚C/s
4˚C/s
–4˚C/s
–3˚C/s
metallic growth within the solder
connections becomes excessive,
resulting in the formation of weak
and unreliable connections. The
temperature is then rapidly
reduced to a point below the
solidus temperature of the solder,
usually 170°C (338°F), to allow
the solder within the connections
to freeze solid.
Process zone P4 is the cool down
after solder freeze. The cool
down rate, R5, from the liquidus
point of the solder to 25°C (77°F)
should not exceed –3°C per second maximum. This limitation is
necessary to allow the PC board
and HSDL-3210 castellation I/O
pins to change dimensions
evenly, putting minimal stresses
on the HSDL-3210 transceiver.
Appendix A : SMT Assembly Application Note
1.0 Solder Pad, Mask and Metal Solder Stencil Aperture
METAL STENCIL
FOR SOLDER PASTE
PRINTING
STENCIL
APERTURE
LAND
PATTERN
SOLDER
MASK
PCBA
Figure 13. Stencil and PCBA.
1.1 Recommended Land Pattern
CL
SHIELD
SOLDER PAD
1.35
MOUNTING
CENTER
1.25
2.05
0.10
0.775
1.75
FIDUCIAL
0.60
0.475
1.425
UNIT: mm
2.375
3.325
Figure 14. Land pattern.
12
1.2 Recommended Metal Solder
Stencil Aperture
It is recommended that only a
0.152 mm (0.006 inches) or a
0.127 mm (0.005 inches) thick
stencil be used for solder paste
printing. This is to ensure adequate printed solder paste volume and no shorting. See the
table below the drawing for combinations of metal stencil aperture and metal stencil thickness
that should be used.
Aperture opening for shield pad
is 2.7 mm x 1.25 mm as per land
pattern.
Stencil Thickness, t (mm)
0.152 mm
0.127 mm
APERTURES AS PER
LAND DIMENSIONS
t
w
l
Figure 15. Solder stencil aperture.
Aperture Size (mm)
Length, l
Width, w
2.60 ± 0.05
0.55 ± 0.05
3.00 ± 0.05
0.55 ± 0.05
8.2
1.3 Adjacent Land Keepout and
Solder Mask Areas
Adjacent land keep-out is the
maximum space occupied by
the unit relative to the land pattern. There should be no other
SMD components within this
area.
The minimum solder resist strip
width required to avoid solder
bridging adjacent pads is
0.2 mm. It is recommended that
two fiducial crosses be placed at
mid-length of the pads for unit
alignment.
Note: Wet/Liquid PhotoImageable solder resist/mask is
recommended.
13
0.2
3.1
SOLDER MASK
3.0
UNITS: mm
Figure 16. Adjacent land keep-out and solder mask areas.
Appendix B: PCB Layout Suggestion
The following PCB layout shows
a recommended layout that
should result in good electrical
and EMI performance. Things to
note:
1. The ground plane should be
continuous under the part, but
should not extend under the
shield trace.
2. The shield trace is a wide, low
inductance trace back to the
system ground.
3. C1 is an optional VCC filter
capacitor. It may be left out if
the VCC is clean.
4. VLED can be connected to
either unfiltered or unregulated
power. If C1 is used, and if
VLED is connected to VCC, the
connection should be before
the C1 cap.
A reference layout of a 2-layer
Agilent evaluation board for
HSDL-3210 based on the
guidelines stated above is shown
below. For more details, please
refer to Agilent Application Note
1114, Infrared Transceiver PC
Board Layout for Noise Immunity.
Top Layer
Bottom Layer
Figure 17. PCB layout suggestions.
14
Appendix C: General Application
Guide for the HSDL-3210 Infrared
IrDA® Compliant 1.15 Mb/s
Transceiver
1.152 Mb/s, and supports HP-SIR
and TV Remote modes. The
design of the HSDL-3210 also
includes the following unique
features:
Description
The HSDL-3210, a low-cost and
small form factor infrared
transceiver, is designed to
address the mobile computing
market such as PDAs, as well as
small embedded mobile products
such as digital cameras and
cellular phones. It is fully
compliant to IrDA 1.3 low power
specification from 9.6 kb/s to
• Supports the serial interface for
transceiver control (STC)
specification.
• Low passive component count.
• Shutdown mode for low power
consumption requirement.
• Interface to input/output logic
circuits as low as 1.5 V.
• Adjustable optical power
management
Interface to Recommended I/O chips
The HSDL-3210’s TXD data input
is buffered to allow for CMOS
drive levels. No peaking circuit or
capacitor is required. Data rate
from 9.6 kb/s up to 1.152 Mbp/s
is available at the RXD pin.
The block diagram below shows
how the IR port fits into a mobile
phone and PDA platform.
SPEAKER
AUDIO INTERFACE
DSP CORE
MICROPHONE
ASIC
CONTROLLER
RF INTERFACE
TRANSCEIVER
MOD/
DE-MODULATOR
IR
MICROCONTROLLER
USER INTERFACE
MOBILE PHONE PLATFORM
LCD
PANEL
RAM
IR
ROM
CPU
FOR EMBEDDED
APPLICATION
PCMCIA
CONTROLLER
TOUCH
PANEL
COM
PORT
RS232C
DRIVER
PDA PLATFORM
Figure 18. Mobile phone and PDA platform diagrams.
15
Serial Interface Transceiver Control
(STC)
HSDL-3210 supports the serial
interface for transceiver control
specification that provides a
common interface between the
transceiver and controller.
STC comprises a 3-wire interface:
TXD/SWDAT, RXD/ARDAT and
SCLK. This 3-wire interface
abolishes the use of different
modes and logic pins of existing
transceivers. Instead registers on
board the transceiver store
operating modes and states, thus
electrical interface can be
standardized across different
vendors and transceivers.
Activity on the SCLK line
determines whether the transceiver is to operate in the normal
or STC mode.
The diagram below shows the
STC I/O between the transceiver
and the IrDA controller.
Please refer to Agilent
Application Note 1270 Serial
Transceiver Control for Infrared
Transceivers for further
information on implementing STC
using HSDL-3210 as well as the
lists of registers supported by
HSDL-3210.
In normal operation, the TXD and
RXD carry IR transmit and
receive signals. In STC mode,
SWDAT and SRDAT carry
command and responses to and
from the transceiver respectively.
TXD
INFRARED CONTROLLER
(MASTER)
RXD
SCLK
TRANSCEIVER (SLAVE)
STC – NORMAL MODE
SWDAT
(WRITE COMMAND)
SRDAT
INFRARED CONTROLLER
(MASTER)
(SEND RESPONSES)
SCLK
(CLOCK COMMAND / RESPONSE)
TRANSCEIVER (SLAVE)
STC – COMMAND / RESPONSE MODE
The link distance testing was done using typical HSDL-3210 units with National
Semiconductor’s PC87109 3V Super I/O controller and SMC’s FDC37C669 and
FDC37N769 Super I/O controllers. An IR link distance of up to 40 cm was demonstrated for SIR at full power. On the other hand, for MIR at full power, an IR link
distance of up to 35 cm was demonstrated.
Figure 19. STC block diagram.
16
Appendix D: Optical port dimensions
for HSDL-3210
To ensure IrDA compliance, some
constraints on the height and
width of the window exist. The
minimum dimensions ensure that
the IrDA cone angles are met
without vignetting. The maximum
dimensions minimize the effects
of stray light. The minimum size
corresponds to a cone angle of
30˚ and the maximum size corresponds to a cone angle of 60˚.
In the figure below, X is the width
of the window, Y is the height of
the window, and Z is the distance
OPAQUE
MATERIAL
from the HSDL-3210 to the back
of the window. The distance from
the center of the LED lens to the
center of the photodiode lens, K,
is 5.1 mm. The equations for
computing the window dimensions are as follows:
X = K + 2*(Z + D)*tanA
Y = 2*(Z + D)*tanA
The above equations assume that
the thickness of the window is
negligible compared to the distance of the module from the
back of the window (Z). If they
are comparable, Z' replaces Z in
the above equation. Z' is defined
as:
Z' = Z + t/n
where ‘t’ is the thickness of the
window and ‘n’ is the refractive
index of the window material.
The depth of the LED image inside the HSDL-3210, D, is
3.17 mm. ‘A’ is the required half
angle for viewing. For IrDA compliance, the minimum is 15˚ and
the maximum is 30˚. Assuming
the thickness of the window to be
negligible, the equations result in
the following tables and graphs.
IR TRANSPARENT WINDOW
Y
X
IR TRANSPARENT
WINDOW
K
Z
A
D
Figure 20. Window design diagram.
17
OPAQUE
MATERIAL
Module Depth
(z) mm
0
1
2
3
4
5
6
7
8
9
Aperture Width (x, mm)
Max.
Min.
8.76
6.80
9.92
7.33
11.07
7.87
12.22
8.41
13.38
8.94
14.53
9.48
15.69
10.01
16.84
10.55
18.00
11.09
19.15
11.62
APERTURE WIDTH (X) vs. MODULE DEPTH
APERTURE HEIGHT (Y) vs. MODULE DEPTH
16
APERTURE HEIGHT (Y) – mm
APERTURE WIDTH (X) – mm
25
20
15
10
X MAX.
X MIN.
5
0
0
1
2
3
4
5
6
7
8
9
MODULE DEPTH (Z) – mm
Figure 21. Aperture width (X) vs. module depth.
18
Aperture Height (y, mm)
Max.
Min.
3.66
1.70
4.82
2.33
5.97
2.77
7.12
3.31
8.28
3.84
9.43
4.38
10.59
4.91
11.74
5.45
12.90
5.99
14.05
6.52
14
12
10
8
6
4
Y MAX.
Y MIN.
2
0
0
1
2
3
4
5
6
7
8
9
MODULE DEPTH (Z) – mm
Figure 22. Aperture height (Y) vs. module depth.
Window Material
Almost any plastic material will
work as a window material. Polycarbonate is recommended. The
surface finish of the plastic
should be smooth, without any
texture. An IR filter dye may be
used in the window to make it
look black to the eye, but the
total optical loss of the window
should be 10% or less for best
optical performance. Light loss
should be measured at 875 nm.
The recommended plastic
materials for use as a cosmetic
window are available from
General Electric Plastics.
Shape of the Window
From an optics standpoint, the
window should be flat. This ensures that the window will not
alter either the radiation pattern
of the LED, or the receive pattern
of the photodiode.
If the window must be curved for
mechanical or industrial design
reasons, place the same curve on
the back side of the window that
has an identical radius as the
front side. While this will not
completely eliminate the lens
effect of the front curved surface,
it will significantly reduce the
effects. The amount of change in
the radiation pattern is dependent
upon the material chosen for the
window, the radius of the front
and back curves, and the distance
from the back surface to the
transceiver. Once these items are
known, a lens design can be
made which will eliminate the
effect of the front surface curve.
The following drawings show the
effects of a curved window on the
radiation pattern. In all cases,
the center thickness of the window is 1.5 mm, the window is
made of polycarbonate plastic,
and the distance from the transceiver to the back surface of the
window is 3 mm.
Recommended Plastic Materials:
Material
Number
Lexan 141L
Lexan 920A
Lexan 940A
Light
Transmission
88%
85%
85%
Haze
1%
1%
1%
Refractive
Index
1.586
1.586
1.586
Note: 920A and 940A are more flame retardant than 141L.
Recommended Dye: Violet #21051 (IR transmissant above 625 nm).
Flat Window
(First Choice)
Figure 23. Shape of windows.
19
Curved Front and Back
(Second Choice)
Curved Front, Flat Back
(Do Not Use)
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Data subject to change.
Copyright © 2002 Agilent Technologies, Inc.
Obsolete 5988-7221EN
October 14, 2002
5988-8121EN