HSDL-3610 #007/#008 IrDA® Data Compliant 115.2 kb/s 3 V to 5 V Infrared Transceiver Data Sheet Description The HSDL-3610 is a low-profile infrared transceiver module that provides interface between logic and IR signals for through-air, serial, half-duplex IR data link. The module is compliant to IrDA Data Physical Layer Specifications 1.0 and IEC825-Class 1 Eye Safe. The HSDL-3610 contains a high-speed and highefficiency 870 nm LED, a silicon PIN diode, and an integrated circuit. The IC contains an LED driver and a receiver providing a single output (RXD) for all data rates supported. Functional Block Diagram VCC R1 LEDA (10) TXD (9) SP MD0 (4) HSDL-3610 MD1 (5) RXD (8) GND (3) CX1 GND (7) CX2 VCC (1) AGND (2) Features • Fully compliant to IrDA 1.0 physical layer specifications – 9.6 kb/s to 115.2 kb/s operation • Typical link distance > 1.5 m • Compatible with HP-SIR and TV remote • IEC825-Class 1 eye safe • Low power operation range – 2.7 V to 5.25 V • Small module size – 4.0 x 12.2 x 5.1 mm (HxWxD) • Complete shutdown – TXD, RXD, PIN diode • Low shutdown current – 10 nA typical • Adjustable optical power management – Adjustable LED drive-current to maintain link integrity • Integrated EMI shield – Excellent noise immunity • Edge detection input – Prevents the LED from long turn-on time • Interface to various super I/O and controller devices • Designed to accommodate light loss with cosmetic window • Only 2 external components are required Applications • Digital imaging – Digital still cameras – Photo-imaging printers • Data communication – Notebook computers – Desktop PCs – Win CE handheld products – Personal Digital Assistants (PDAs) – Printers – Fax machines, photocopiers – Screen projectors – Auto PCs – Dongles – Set-Top box • Telecommunication products – Cellular phones – Pagers • Small industrial & medical instrumentation – General data collection devices – Patient & pharmaceutical data collection devices The HSDL-3610 can be completely shut down to achieve very low power consumption. In the shut down mode, the PIN diode will be inactive and thus producing very little photocurrent even under very bright ambient light. The HSDL-3610 also incorporated the capability for adjustable optical power. With two programming pins; MODE 0 and MODE 1, the optical power output can be adjusted lower when the nominal desired link distance is one-third or two-third of the full IrDA link. The HSDL-3610 comes in two package options; the front view option (HSDL-3610#007/#017), and the top view option (HSDL3610#008/#018). Both options come with integrated shield that helps to ensure low EMI emission and high immunity to EMI field, thus enhancing reliable performance. Application Support Information The Application Engineering group is available to assist you with the technical understanding associated with HSDL-3610 infrared transceiver module. You can contact them through your local sales representatives for additional details. Ordering Information Package Option 2 Package Part Number Standard Package Increment Front View HSDL-3610#007 400 Front View HSDL-3610#017 10 Top View HSDL-3610#008 400 Top View HSDL-3610#018 10 Functional Block Diagram I/O Pins Configuration Table Pin 1 2 3 4 5 6 7 8 9 10 VCC R1 LEDA (10) TXD (9) SP MD0 (4) HSDL-3610 MD1 (5) Description Supply Voltage Analog Ground Ground Mode 0 Mode 1 No Connection Ground Receiver Data Output Transmitter Data Input LED Anode Symbol Vcc AGND GND MD0 MD1 NC GND RXD TXD LEDA RXD (8) GND (3) CX1 GND (7) CX2 VCC (1) 10 9 8 7 6 5 4 3 2 1 BACK VIEW (HSDL-3610 #007/#017) AGND (2) 10 9 Transceiver Control Truth Table Mode 0 1 0 0 1 Mode 1 0 0 1 1 RX Function Shutdown SIR SIR SIR TX Function Shutdown Full Distance Power 2/3 Distance Power 1/3 Distance Power X = Don’t Care Transceiver I/O Truth Table Transceiver Mode Active Active Active Shutdown X= Don’t Care Inputs TXD 1 0 0 X[3] Outputs EI X High[1] Low Low LED On Off Off Not Valid RXD Not Valid Low[2] High Not Valid EI = In-Band Infrared Intensity at detector Notes: 1. In-Band El ≤ 115.2 kb/s. 2. Logic Low is a pulsed response. The condition is maintained for duration dependent on the pattern and strength of the incident intensity. 3. To maintain low shutdown current, TXD needs to be driven high or low and not left floating. 3 8 7 6 5 4 3 2 1 BOTTOM VIEW (HSDL-3610 #008/#018) Recommended Application Circuit Components Component R1 CX1[5] Recommended Value 6.2 Ω ± 5%, 0.5 Watt, for 2.7 ≤ Vcc ≤ 3.6 V operation 15.0 Ω ± 5%, 0.5 Watt, for 4.75 ≤ Vcc ≤ 5.25 V operation 0.47 µF ± 20%, X7R Ceramic CX2[6] 6.8 µF ± 20%, Tantalum Notes: 4. CX1 must be placed within 0.7 cm of the HSDL-3610 to obtain optimum noise immunity. 5. In environments with noisy power supplies, supply rejection performance can be enhanced by including CX2, as shown in “HSDL-3610 Functional Block Diagram” in page 3. 200 0.7 180 0.6 160 140 LOP (mW/sr) ILED (A) 0.5 0.4 0.3 120 100 80 60 0.2 40 0.1 0 1.3 20 0 1.5 1.7 1.9 2.1 2.3 0 30 60 90 120 150 180 210 240 270 300 ILED (mA) LEDA VOLTAGE (V) ILED vs. LEDA. Light Output Power (LOP) vs. ILED. Marking Information The HSDL-3610#007/017 is marked “3610YYWW” on the shield where “YY” indicates the unit’s manufacturing year, and “WW” refers to the work week in which the unit is tested. The HSDL-3610#008/018 has no marking on the shield. CAUTIONS: The BiCMOS inherent to the design of this component increases the component’s susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. 4 Absolute Maximum Ratings[6] Parameter Storage Temperature Operating Temperature DC LED Current Symbol TS TA ILED(DC) Peak LED Current ILED(PK) LED Anode Voltage Supply Voltage Transmitter Data Input Current Receiver Data Output Voltage VLEDA Vcc ITXD(DC) VO Minimum -40 -20 Maximum +100 +70 165 Unit °C °C mA 750 mA -0.5 0 -12 7 7 12 V V mA -0.5 Vcc+0.5 V Conditions ≤ 2 µs pulse width, ≤ 10% duty cycle |IO(RXD)| = 20 µA Note: 6. For implementations where case to ambient thermal resistance ≤ 50°C/W. Recommended Operating Conditions Parameter Operating Temperature Supply Voltage Logic High Input Voltage for TXD, MD0, MD1, and FIR_SEL Logic Low Transmitter Input Voltage LED (Logic High) Current Pulse Amplitude Receiver Signal Rate Ambient Light 5 Symbol TA Vcc Minimum -20 2.7 Maximum +70 5.25 Unit °C V VIH 2 Vcc/3 Vcc V VIL 0 Vcc/3 V ILEDA 180 300 mA 2.4 115.2 kb/s Conditions See IrDA Serial Infrared Physical Layer Link Specification, Appendix A for ambient levels Electrical & Optical Specifications Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions can be anywhere in their operating range. All typical values are at 25°C and 3.3 V unless otherwise noted. Parameter Transceiver Supply Current Digital Input Current Transmitter Transmitter Radiant Intensity Symbol Typ. Max. Unit Conditions 10 200 nA 2.5 5 1 mA µA VI(TXD) ≤ VIL or VI(TXD) ≥ VIH VI(TXD) ≤ VIL, EI = 0 0 ≤ VI ≤ VCC 120 400 mW/sr Shutdown ICC1 Idle Logic Low/High ICC2 IL/H -1 Logic High Intensity EIH 50 Peak Wavelength Spectral Line Half Width Viewing Angle Optical Pulse Width Rise and Fall Times λP 875 nm ∆λ1/2 35 nm Maximum Optical Pulse Width LED Anode On State Voltage LED Anode Off State Leakage Current 6 Min. 2θ1/2 tpw (EI) 30 1.5 1.6 tr (EI), tf (EI) tpw (max) 20 VON(LEDA) ILK(LEDA) 1 60 1.8 ° µs 40 ns 50 µs 2.4 V 100 nA VIH = 3.0 V ILEDA = 200 mA θ1/2 ≤ 15° tpw(TXD) = 1.6 µs at 115.2 kb/s tpw(TXD) = 1.6 µs at 115.2 kb/s tr/f (TXD) = 10 ns TXD pin stuck high ILEDA = 200 mA, VI(TXD) ≥ VIH VLEDA = VCC = 5.25 V, VI(TXD) ≤ VIL Electrical & Optical Specifications Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions can be anywhere in their operating range. All typical values are at 25°C and 3.3 V unless otherwise noted. Parameter Receiver Receiver Data Output Voltage Symbol Min. Typ. Max. Unit Logic Low[8] VOL 0 - 0.4 V Logic High VOH Vcc – 0.2 - Vcc V 2θ1/2 EIH 30 0.0036 500 ° mW/cm2 0.3 µW/cm2 Viewing Angle Logic High Receiver Input Irradiance Logic Low Receiver Input Irradiance Receiver Peak Sensitivity Wavelength Receiver SIR Pulse Width Receiver Latency Time Receiver Rise/Fall Times Receiver Wake Up Time EIL λP tpw (SIR) tL tr/f (RXD) tW 880 1 20 25 Conditions IOL = 1.0 mA, EI ≥ 3.6 µW/cm2, θ1/2 ≤ 15° IOH = -20 µA, EI ≤ 0.3 µW/cm2, θ1/2 ≤ 15° For in-band signals ≤ 115.2 kb/s[7] For in-band signals[7] nm 4.0 50 100 µs µs ns µs θ1/2 ≤ 15°[9], CL =10 pF [10] Notes: 7. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 ≤ λp ≤ 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification. 8. Logic Low is a pulsed response. The condition is maintained for duration dependent on pattern and strength of the incident intensity. 9. For in-band signals ≤ 115.2 kb/s where 3.6 µW/cm2 ≤ EI ≤ 500 mW/cm2. 10. Wake Up Time is the time between the transition from a shutdown state to an active state and the time when the receiver is active and ready to receive infrared signals. TXD “Stuck ON” Protection TXD LED tpw (MAX.) 7 RXD Output Waveform tpw VOH 90% 50% VOL 10% tf tr LED Optical Waveform tpw LED ON 90% 50% 10% LED OFF tr tf Receiver Wake Up Time Definition (when MD0 π 1 and MD1 π 0) RX LIGHT RXD VALID DATA tw 8 HSDL-3610#007 and HSDL3610#017 Package Outline with Dimension and Recommended PC Board Pad Layout HSDL-3610#007/#017 (Front Option) MOUNTING CENTER 6.10 PIN FUNCTION PIN FUNCTION 1 VCC 6 NC 2 AGND 7 GND 3 GND 8 RXD 4 MD0 9 TXD 5 MD1 10 LEDA 1.15 4.60 5.09 TOP VIEW 2.55 R 2.00 R 1.77 4.00 1.90 1.90 PIN 1 0.80 0.82 1.68 1.20 3.24 4.05 PIN 10 3.84 12.20 +0.50 0 SIDE VIEW FRONT VIEW ALL DIMENSIONS IN MILLIMETERS (mm). DIMENSION TOLERANCE IS 0.20 mm UNLESS OTHERWISE SPECIFIED. MOUNTING CENTER MID OF LAND PIN 1 PIN 10 0.70 0.43 1.05 PIN 10 2.40 PIN 1 2.08 0.45 0.70 4.95 10 CASTELLATION: PITCH 1.1 ± 0.1 CUMULATIVE 9.90 ± 0.1 BACK VIEW 9 2.35 2.84 LAND PATTERN HSDL-3610#008 and HSDL3610#018 Package Outline with Dimension and Recommended PC Board Pad Layout HSDL-3610#008/#018 (Top Option) R 2.00 PIN FUNCTION PIN R 1.78 FUNCTION 1 VCC 6 NC 2 AGND 7 GND 3 GND 8 RXD 4 MD0 9 TXD 5 MD1 10 LEDA 1.35 4.89 4.40 LEGEND: MC – MOUNTING CENTER OC – OPTICAL CENTER 0.90 FRONT VIEW SHIELD PAD RECEIVE 5.00 2.40 2.50 TRANSMIT 0.30 0.85 MC OC 2.08 1.46 1.50 4.16 OC 2.08 2.57 0.30 2.25 3.24 3.83 5.00 SIDE VIEW 5.10 12.20 ALL DIMENSIONS IN MILLIMETERS (mm). DIMENSION TOLERANCE IS 0.20 mm UNLESS OTHERWISE SPECIFIED. TOP VIEW 5.70 1.60 2.85 1.70 PIN 10 PIN 1 1.95 PIN 1 10 CASTELLATION: PITCH 1.1 ± 0.1 CUM. OF 9 PITCH – 9.9 ± 0.1 9.90 BOTTOM VIEW 10 1.30 0.43 0.70 PIN 10 0.20 PITCH 9 x 1.10 10 x 0.60 PAD LAND PAD PATTERN Tape and Reel Dimensions (HSDL-3610#007, #017) All dimensions in millimeters (mm) Quantity = 400 pieces per reel (HSDL-3610#007) = 10 pieces per tape (HSDL-3610#017) 13.00 ± 0.50 R 1.00 (40 mm MIN.) EMPTY (400 mm MIN.) LEADER PARTS MOUNTED 21.00 ± 0.80 EMPTY (40 mm MIN.) 2.00 ± 0.50 DIRECTION OF PULLING CONFIGURATION OF TAPE LABEL SHAPE AND DIMENSIONS OF REELS 4.00 ± 0.10 2.00 ± 0.10 1.75 ± 0.10 1.50 + 0.10 0 11.50 ± 0.10 POLARITY A 24.00 ± 0.20 12.40 ± 0.10 178.00 ± 2.00 60.00 ± 2.00 VDD 0.40 ± 0.05 5.50 ± 0.10 8.00 ± 0.10 4.20 ± 0.10 DIRECTION OF PULLING + 0.50 25.50 - 1.00 TAPE DIMENSIONS 1.60 ± 0.50 11 Tape and Reel Dimensions (HSDL-3610#008, #018) All dimensions in millimeters (mm) Quantity = 400 pieces per reel (HSDL-3610#008) = 10 pieces per tape (HSDL-3610#018) 13.00 ± 0.50 R 1.00 (40 mm MIN.) EMPTY (400 mm MIN.) LEADER PARTS MOUNTED 21.00 ± 0.80 EMPTY (40 mm MIN.) 2.00 ± 0.50 DIRECTION OF PULLING CONFIGURATION OF TAPE LABEL SHAPE AND DIMENSIONS OF REELS 4.00 ± 0.10 2.00 ± 0.10 1.75 ± 0.10 1.50 + 0.10 11.50 ± 0.10 POLARITY VDD 24.00 ± 0.20 12.80 ± 0.10 178.00 ± 2.00 60.00 ± 2.00 A 4.80 ± 0.10 0.40 ± 0.05 5.30 ± 0.10 5.65 ± 0.10 8.00 ± 0.10 5.10 ± 0.10 DIRECTION OF PULLING + 0.50 25.50 - 1.00 TAPE DIMENSIONS 1.60 ± 0.50 12 Moisture Proof Packaging All HSDL-3610 options are shipped in moisture proof package. Once opened, moisture absorption begins. UNITS IN A SEALED MOISTURE-PROOF PACKAGE PACKAGE IS OPENED (UNSEALED) ENVIRONMENT LESS THAN 25°C, AND LESS THAN 60% RH? YES NO BAKING IS NECESSARY NO PACKAGE IS OPENED MORE THAN 3 DAYS? NO YES PERFORM RECOMMENDED BAKING CONDITIONS Baking Conditions If the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. Package In Reel In Bulk Temperature 60°C 100°C 125°C Baking should only be done once. 13 Time ≥ 48 hours ≥ 4 hours ≥ 2 hours Reflow Profile MAX. 245°C T – TEMPERATURE – (°C) 230 R3 200 183 170 150 R2 90 sec. MAX. ABOVE 183°C 125 R1 100 R4 R5 50 25 0 50 100 150 200 250 300 t-TIME (SECONDS) P1 HEAT UP Process Zone Heat Up Solder Paste Dry P2 SOLDER PASTE DRY Symbol P1, R1 P2, R2 P3, R3 Solder Reflow Cool Down P3, R4 P4, R5 The reflow profile is a straightline representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different ∆T/∆time temperature change rates. The ∆T/∆time rates are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and HSDL-3610 castellation I/O pins are heated to a temperature of 125°C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 4°C per second to allow for even heating of both the PC board and HSDL-3610 castellation I/O pins. 14 P3 SOLDER REFLOW P4 COOL DOWN ∆T 25°C to 125°C 125°C to 170°C 170°C to 230°C (245°C at 10 seconds max.) 230°C to 170°C 170°C to 25°C Process zone P2 should be of sufficient time duration (> 60 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder, usually 170°C (338°F). Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 230°C (446°F) for optimum results. The dwell time above the liquidus point of solder should be between 15 and 90 seconds. It usually takes about 15 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 90 seconds, the intermetallic growth within the solder ∆time Maximum ∆T/∆ 4°C/s 0.5°C/s 4°C/s -4°C/s -3°C/s connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 170°C (338°F), to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25°C (77°F) should not exceed -3°C per second maximum. This limitation is necessary to allow the PC board and HSDL-3610 castellation I/O pins to change dimensions evenly, putting minimal stresses on the HSDL-3610 transceiver. Appendix A: Test Method A1. Background Light and Electromagnetic Field There are four ambient interference conditions in which the receiver is to operate correctly. The conditions are to be applied separately: 1. Electromagnetic field: 3 V/m maximum (please refer to IEC 801-3, severity level 3 for details). 2. Sunlight: 10 kilolux maximum at the optical port. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased to provide 490 µW/cm2 (with no modulation) at the optical port. The light source faces the optical port. 3. Incandescent Lighting: 1000 lux maximum. This is produced with general service, tungsten-filament, gas-filled, inside frosted lamps in the 60 Watt to 100 Watt range to generate 1000 lux over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The source is expected to have a filament temperature in the 2700 to 3050 Kelvin range and a spectral peak in the 850 to 1050 nm range. 4. Fluorescent Lighting: 1000 lux maximum. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased and modulated to provide an optical square wave signal (0 µW/cm2 minimum and 0.3 µW/cm2 peak amplitude with 10% to 90% rise and fall times less than or equal to 100 ns) over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The frequency of the optical signal is swept over the frequency range from 20 kHz to 200 kHz. Due to the variety of fluorescent lamps and the range of IR emissions, this condition is not expected to cover all circumstances. It will provide a common floor for IrDA operation. This simulates sunlight within the IrDA spectral range. The effect of longer wavelength radiation is covered by the incandescent condition. All IR transceivers operating under the recommended drive conditions are classified as CENELEC EN60825-1 Accessible Emission Limit (AEL) Class 1. This standard is in effect in Europe as of January 1, 1997. AEL Class 1 LED devices are considered eye safe. Please see Application Note 1094 for more information. 15 Appendix B: HSDL-3610#007/#017 SMT Assembly Application Note 1.0 Solder Pad, Mask and Metal Solder Stencil Aperture METAL STENCIL FOR SOLDER PASTE PRINTING STENCIL APERTURE LAND PATTERN SOLDER MASK PCBA Figure 1.0. Stencil and PCBA. 1.1 Recommended Land Pattern for HSDL-3610#007/#017 Dim. a b c (pitch) d e f g mm 2.40 0.70 1.10 2.35 2.80 3.13 4.31 Inches 0.095 0.028 0.043 0.093 0.110 0.123 0.170 SHIELD SOLDER PAD Rx LENS Tx LENS e d g b Y f a X theta FIDUCIAL 10x PAD Figure 2.0. Top view of land pattern. 16 c FIDUCIAL 1.2 Adjacent Land Keep-out and Solder Mask Areas Dim. h j k l mm min. 0.2 13.4 4.7 3.2 Inches min. 0.008 0.528 0.185 0.126 Note: Wet/Liquid Photo-Imaginable solder resist/mask is recommended. j Tx LENS • Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. • “h” is the minimum solder resist strip width required to avoid solder bridging adjacent pads. LAND Rx LENS SOLDER MASK h k Y l • It is recommended that 2 fiducial cross be placed at midlength of the pads for unit alignment. Figure 3.0. HSDL-3610#007/#017 PCBA – Adjacent land keep-out and solder mask. 2.0 Recommended Solder Paste/ Cream Volume for Castellation Joints Based on calculation and experiment, the printed solder paste volume required per castellation pad is 0.30 cubic mm (based on either no-clean or aqueous solder cream types with typically 60 to 65% solid content by volume). 17 2.1 Recommended Metal Solder Stencil Aperture It is recommended that only 0.152 mm (0.006 inches) or 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. The following combination of metal stencil aperture and metal stencil thickness should be used: See Fig 4.0 t, nominal stencil thickness l, length of aperture mm inches mm inches 0.152 0.006 2.8 ± 0.05 0.110 ± 0.002 0.127 0.005 3.4 ± 0.05 0.134 ± 0.002 w, the width of aperture is fixed at 0.70 mm (0.028 inches) Aperture opening for shield pad is 2.8 mm x 2.35 mm as per land dimensions APERTURE AS PER LAND DIMENSIONS t (STENCIL THICKNESS) SOLDER PASTE w l Figure 4.0. Solder paste stencil aperture. 3.0 Pick and Place Misalignment Tolerance and Product SelfAlignment after Solder Reflow If the printed solder paste volume is adequate, the unit will selfalign in the X-direction after solder reflow. Units should be properly reflowed in IR Hot Air convection oven using the recommended reflow profile. The direction of board travel does not matter. 18 Allowable Misalignment Tolerance X – direction Theta – direction ≤ 0.2 mm (0.008 inches) ± 2 degrees 3.1 Tolerance for X-axis Alignment of Castellation Misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of the castellation during placement of the unit. The castellations will completely selfalign to the pads during solder reflow as seen in the pictures below. Photo 1.0. Castellation misaligned to land pads in x-axis before reflow. 3.2 Tolerance for Rotational (Theta) Misalignment Units when mounted should not be rotated more than ± 2 degrees with reference to center X-Y as specified in Fig 2.0. Pictures 3.0 and 4.0 show units before and Photo 3.0. Unit is rotated before reflow. 19 Photo 2.0. Castellation self-align to land pads after reflow. after reflow. Units with a Theta misalignment of more than 2 degrees do not completely self align after reflow. Units with ± 2 degree rotational or Theta misalignment self-aligned completely after solder reflow. Photo 4.0. Unit self-aligns after reflow. 3.3 Y-axis Misalignment of Castellation In the Y-direction, the unit does not self-align after solder reflow. It is recommended that the unit be placed in line with the fiducial mark (mid-length of land pad.) This will enable sufficient land length (minimum of 1/2 land length.) to form a good joint. See Fig 5.0. LENS EDGE FIDUCIAL Y MINIMUM 1/2 THE LENGTH OF THE LAND PAD Figure 5.0. Section of a castellation in Y-axis. 3.4 Example of Good HSDL-3610#007/#017 Castellation Solder Joints This joint is formed when the printed solder paste volume is adequate, i.e. 0.30 cubic mm and reflowed properly. It should be reflowed in IR Hot-air convection reflow oven. Direction of board travel does not matter. Photo 5.0. Good solder joint. 20 4.0 Solder Volume Evaluation and Calculation Geometry of an HSDL-3610#007/#017 solder fillet. 0.425 0.20 0.8 0.4 21 1.2 0.70 0.7 Appendix C : HSDL-3610#008/#018 SMT Assembly Application Note 1.0 Solder Pad, Mask and Metal Solder Stencil Aperture METAL STENCIL FOR SOLDER PASTE PRINTING STENCIL APERTURE LAND PATTERN SOLDER MASK PCBA Figure 1.0. Stencil and PCBA. 1.1 Recommended Land Pattern for HSDL-3610#008/#018 Dim. a b c (pitch) d e f g h mm 1.95 0.60 1.10 1.60 5.70 3.80 2.40 0.80 Inches 0.077 0.024 0.043 0.063 0.224 0.150 0.094 0.032 SHIELD SOLDER PAD e d g Y Rx LENS b Tx LENS theta f X h a FIDUCIAL 10x PAD Figure 2.0. Top view of land pattern. 22 c FIDUCIAL 1.2 Adjacent Land Keep-out and Solder Mask Areas Dim. h j k l mm min. 0.2 13.4 5.8 3.5 Inches min. 0.008 0.528 0.228 0.130 Note: Wet/Liquid Photo-Imaginable solder resist/mask is recommended. j Rx LENS • Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. • “h” is the minimum solder resist strip width required to avoid solder bridging adjacent pads. LAND Tx LENS SOLDER MASK h k Y l • It is recommended that 2 fiducial cross be placed at midlength of the pads for unit alignment. Figure 3.0. HSDL-3610#008/#018 PCBA – Adjacent land keep-out and solder mask. 2.0 Recommended Solder Paste/ cream Volume for Castellation Joints Based on calculation and experiment, the printed solder paste volume required per castellation pad is 0.28 cubic mm (based on either no-clean or aqueous solder cream types with typically 60 to 65% solid content by volume). 23 2.1 Recommended Metal Solder Stencil Aperture It is recommended that only 0.152 mm (0.006 inches) or 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. The following combination of metal stencil aperture and metal stencil thickness should be used: See Fig 4.0 t, nominal stencil thickness mm inches l, length of aperture mm inches 0.006 3.1 ± 0.05 0.122 ± 0.002 0.005 3.7 ± 0.05 0.147 ± 0.002 w, the width of aperture is fixed at 0.60 mm (0.024 inches) Aperture opening for shield pad is 5.7 mm x 1.6 mm as per land dimensions 0.152 0.127 APERTURE AS PER LAND DIMENSIONS t (STENCIL THICKNESS) SOLDER PASTE w l Figure 4.0. Solder paste stencil aperture. 3.0 Pick and Place Misalignment Tolerance and Product SelfAlignment after Solder Reflow If the printed solder paste volume is adequate, the unit will selfalign in X-direction after solder reflow. Units should be properly reflowed in IR Hot Air convection oven using the recommended reflow profile. The direction of board travel does not matter. 24 Allowable Misalignment Tolerance X – direction ≤ 0.2 mm (0.008 inches) 3.1 Tolerance for X-axis Alignment of Castellation Misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of the castellation during placement of the unit. The castellations will completely selfalign to the pads during solder reflow as seen in the pictures below. ß ß Solder Castellation Photo 1.0. Castellation mis-aligned to land pads in X-axis before reflow. 3.2 Tolerance for Rotational (Theta) Misalignment Units when mounted should not be rotated more than ± 1 degrees with reference to center X-Y as specified in Fig 2.0. Pictures 3.0 Photo 3.0. Unit is rotated before reflow. 25 Photo 2.0. Castellation self–aligned to land pads after reflow. and 4.0 show that unit cannot be self-aligned back due to the small wetting force. Units with a Theta misalignment of more than 1 degree do not completely self align after reflow. Photo 4.0. Unit not self-aligned after reflow. 3.3 Y-axis Misalignment of Castellation In the Y-direction, the unit does not self align after solder reflow. It is recommended that the unit be placed in line with the fiducial mark. This will enable sufficient land length to form a good joint. See Fig. 5.0. Tx LENS Rx LENS FIDUCIAL EDGE Y Figure 5.0. Section of a castellation in Y-axis. 3.4 Example of Good Castellation Solder Joints Photo 6.0. Good attachment before reflow. This joint is formed when the printed solder paste volume is adequate, i.e. 0.30 cubic mm and reflowed properly. It should be 26 Photo 7.0. Good solder joint after reflow. reflowed in IR Hot-air convection reflow oven. Direction of board travel does not matter. 4.0 Solder Volume Evaluation and Calculation Geometry of an HSDL-3610#008/#018 solder fillet. 0.46 0.6 0.6 0.1 0.8 1.15 Vsolder = (0.8 x 0.6 x 0.1) + (0.5 x 0.6 x 0.46 (0.6 + 1.15)/2) = 0.1662 mm3 Vpaste = Vsolder/0.6 = 0.277 mm3 27 For product information and a complete list of distributors, please go to our website: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Pte. in the United States and other countries. Data subject to change. Copyright © 2006 Avago Technologies Pte. All rights reserved. Obsoletes 5980-1767E 5988-2314EN April 20, 2006