CEL UPB1007K

3 V DUAL DOWNCONVERTER AND
PLL FREQUENCY SYNTHESIZER UPB1007K
FEATURES
DESCRIPTION
• INTEGRATED RF BLOCK:
LNA, RF & IF Downconverter + PLL frequency
synthesizer + on-chip crystal oscillator
• STATE OF THE ART 25 GHz fT UHS0 BIPOLAR
PROCESS
• DOUBLE-CONVERSION: f1stIF = 61.380 MHz
f2ndIF = 4.092 MHz
NEC's UPB1007K is a Silicon RFIC designed for low cost GPS
receivers. The IC combines an LNA, followed by a doubleconversion RF/IF downconverter block and a PLL frequency
synthesizer on one chip. The chip also includes an on-board
crystal oscillator working up to 16 MHz which can be used as
a CPU reference for fast locking. The device operates on a 3
V supply voltage and is housed in a small 36 pin QFN (Quad
Flat No-lead) package, resulting in low power consumption
and reduced board space. The device is manufactured using
the state of the art UHS0 25 GHz fT silicon bipolar process.
NEC's stringent quality assurance and test procedures ensure the highest reliability and performance.
• ADJUSTABLE GAIN: 20 dB range MIN
• FIXED DIVISION PRESCALER
• LOW POWER CONSUMPTION: 25 mA @ 3 V
• SMALL 36 PIN QFN PACKAGE
Flat lead style for better performance
APPLICATIONS
• TAPE AND REEL PACKAGING AVAILABLE
• LOW POWER HANDHELD GPS RECEIVER
• IN-VEHICLE NAVIGATION SYSTEMS
• PC/PDA+GPS INTEGRATION
ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 3.0 V, unless otherwise specified)
SYMBOLS
PART NUMBER
PACKAGE OUTLINE
PARAMETERS AND CONDITIONS
ICC
Total Circuit Current, No Signals
VCC
Supply Voltage
UNITS
MIN
UPB1007K
QFN-36
TYP
25
31
2.7
3.0
3.3
mA
V
MAX
LNA (fRFin = 1575.42 MHz, ZL = ZS = 50 Ω)
ZLNAin
RF Input Impedance of LNA
Ω
28 - j38
ZLNAop
RF Output Impedance of LNA
Ω
85 - jx6
P1dBLNA
1 dB Compression, Input matched
dBm
-22
PGLNA
Power Gain LNA, Input matched, PRFin = -60 dBm
dB
14
15
NFLNA
Noise Figure of LNA, Input matched
dB
2.8
Mixer (fRFin = 1575.42 MHz, f1stLOin = 1636.80 MHz, PLO = -10 dBm, f1stIF = 61.38 MHz, ZL = ZS = 50 Ω)
ZMIXin
RF Input Impedance of Mixer
Ω
31 -j103
P1dBMIX
1 dB Compression (refer to input), Input matched
dBm
-25
PCGMIX
Power Conversion Gain
dB
21
NFMIX
Noise Figure of Mixer (SSB), Input matched
dB
9.5
ALO-IF
LO Leakage to IF Pins, PLO = -10 dBm
dBm
-40
ALO-RF
LO Leakage to RF Input Pins, PLO = -10 dBm
dBm
-48
ZMIXout
RF Output Impedance of Mixer
+152 - j9
PLL
ICPOH
PLL Charge Pump High Side Current @ VCPout = VCC/2
mA
1
ICPOL
PLL Charge Pump Low Side Current @ VCPout = VCC/2
mA
-1
fPD
Phase Comparison Frequency
MHz
8.184
IF Downconverter Block (f1stIFin = 61.38 MHz, f2ndLOin = 65.472 MHz, f2ndIF output = 4.092 MHz, ZS = 2kΩ, ZL = 2 kΩ)
NF2ndMIX
Noise Figure of 2nd IF Mixer (SSB), (ZS = 50Ω)
dB
12
GV2ndMIX
Voltage Gain of 2nd Mixer/Amplifier, P1stIF = -50 dBm
dB
47
VGC
Gain Control Voltage (Voltage at maximum gain)
V
0.5
DGC
Gain Control Range, P1stIF = -50 dBm
dB
20
(Voltage at maximum gain)
A2ndLO1stIF 2nd LO Isolation to 1st IF Input Pins, VAGC = 0 V
dB
-70
A2ndLO2ndIF 2nd LO Isolation to 2nd IF Output Pins, VAGC = 0 V
dB
-70
3.2
10
California Eastern Laboratories
UPB1007K
ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 3 V, unless otherwise specified)
PART NUMBER
PACKAGE OUTLINE
SYMBOLS
UPB1007K
QFN-36
PARAMETERS AND CONDITIONS
UNITS
MIN
TYP
MAX
Ω)
2nd IF Amplifier Block (f2ndIF = 4.096 MHz, ZS = 2kΩ, ZL = 2 kΩ)
GVLIM
fBB
Voltage Gain of Limiter Amplifier, PIN = -60 dBm
Roll-off Frequency
dB
48
MHz
110
Crystal Oscillator/Reference Amplifier Block
Reference Input Minimum Level
Reference Output Swing (open collector output),
CL = 2 pF//RL = 10 kΩ
Power Down Control Pins
VREFin
VREFout
VIH
VIL
Digital Control Input High
Digital Control Input Low
ABSOLUTE MAXIMUM RATINGS1,2 (TA = 25°C)
SYMBOLS
VCC
PT
PARAMETERS
Supply Voltage
Total Power Dissipation3
UNITS
RATINGS
V
3.6
mW
433
TOP
Operating Temperature
°C
-40 to +85
TSTG
Storage Temperature
°C
-55 to +150
Notes:
1. Operation in excess of any one of these parameters may result
in permanent damage.
2. More than two items must not be reached simultaneously.
3. TA = +85°C, mounted on a 50 x 50 x 1.6 mm double-sided
copper clad epoxy glass PWB.
mVpp
400
400
Vpp
1.1
1.2
1.3
V
V
1.83
1.86
0.5
2.15
0.6
RECOMMENDED
OPERATING CONDITIONS
SYMBOLS
PARAMETERS
UNITS MIN
TYP
MAX
VCC
Supply Voltage
V
2.7
3.0
3.3
TOP
Operating Temperature
°C
-40
+25
+85
fRFin
RF Input Frequency
MHz
1575.42
fREFin
fREFout
Reference Frequency
MHz
16.368
f1stLO
1st LO Oscillating
Frequency
MHz
1636.8
f1stIFin
1st IF Input Frequency
MHz
61.38
f2ndLOin
2nd LO Input Frequency MHz
65.472
f2ndIFin
f2ndIFout
VIH
VIL
2nd IF Input/Output
Frequency
Power Down Control
Voltage "High"
Power Down Control
Voltage "Low"
MHz
V
V
4.092
1.8
3
0.6
UPB1007K
CURRENT BUDGET
SYMBOL
PARAMETER AND CONDITIONS
UNITS
MIN
TYP
MAX
V
2.7
3.0
3.3
31
IC Performance Parameters
VCC
Supply Voltage
ICC
Total Circuit Current, VCC = 3.0 V, no signal
mA
25
ICC_PL
Power Down Node Current
mA
0.15
ICC_XO
Crystal Oscillator Supply Current, (Pin 15 = 0 V, Pin 16 = 3 V)
mA
2.7
ICC_RX
Receiver Supply Current, (Pin 15 = 0 V, Pin 16 = 3 V)
mA
22.3
Functional Blocks Current Details
ICC_LNA
Supply Current of LNA, RF off
mA
2.6
ICC_MIX1
Supply Current of RF Mixer, RF off
mA
6.7
ICC_MIX2
Supply Current of IF Mixer, RF off
mA
3.5
ICC_IFAMP
Supply Current of IF Amplifier, RF off
mA
1.1
Crystal Oscillator Supply Current
mA
2.7
ICC_XO
PLL Supply Current
mA
6.3
ICC_CF
ICC9
Control Functions Supply Current
µA
2.1
VIL
Power Down Pin Logic LOW Level
V
VIH
Power Down Pin Logic HIGH Level
τd_PON
0.6
V
Power-on Response Time
1.8
ms
3
APPLICATION EXAMPLE
25
LOOP FILTER
TUNING ELEMENT
8
PD
2
IC
BASEBAND
1575.42 MHz
UPB1007K
PIN FUNCTIONS
Pin No.
Symbol
Function and Application
1
LNAout
2
VCC (Vreg)
Supply voltage pin of regulator mixer
block.
3
GND (Vreg)
Ground pin of regulator reference cell.
4
RF MIXin
5
GND (MIX)
6
1stLO-OSC1
7
1stLO-OSC2
Pins 6 & 7 are base pins of the differential
amplifier for 1st LO oscillator. These pins
should be equipped with LC and varactor
circuits to oscillate at 1636.8 MHz.
8
VCC (1stLO-OSC)
Supply voltage pin of differential amplifier
for 1st LO oscillator circuit (VCO).
9
VCC
(Charge Pump)
Supply voltage pin of the phase detector
charge pump.
10
PD-out
This is a current mode charge pump
output for connection to a passive RC
loop filter for driving the external varactor
diode of 1stLO-OSC.
11
GND
(Charge Pump)
Output pin of LNA. Output biasing
and matching required as it is an open
collector output.
Input pin of RF mixer. 1575.42 MHz
band pass filter can be inserted between
pin 1 and mixer input.
Ground pin of RF mixer cell.
Ground pin of phase detector charge
pump.
Internal Equivalent Circuit
UPB1007K
PIN FUNCTIONS
Pin No.
Symbol
12
VCC
(Divider Block)
Function and Application
Supply voltage pin of prescaler, phase
detector, crystal oscillator, VCO buffer.
13
LO_out
Monitor pin of comparison frequency at
phase detector.
14
XO_out
Monitor pin of crystal oscillator ÷2 output
at phase detector.
15
PD1
Power down control pin
Low = Whole chip off except XTAL osc.
High = Whole chip on except XTAL osc.
16
PD2
Reference block standby mode.
Low = Reference block disabled.
High = Reference block enabled.
17
REFout
Output pin of reference frequency or
crystal oscillator. The frequency from pin
17 can be taken out as 1Vp-p swing.
Internal Equivalent Circuit
UPB1007K
PIN FUNCTIONS
Pin No.
Symbol
Function and Application
18
XO2
19
XO1/REFin
Differential crystal oscillator input. If
crystal oscillator is not used, this pin can
be used as an input pin of the reference
frequency buffer. This pin should be
equipped with an external 16.368 MHz
oscillator (e.g. TCXO).
20
VCC
(Ref Block)
Supply voltage pin of output charge pump
of the crystal oscillator.
21
GND
(Ref Block)
22
2nd IFout
23
VCC
2ndIFAMP
24
2ndIF bypass
25
2ndIFin2
Pin 2 of 2nd IF amplifier input. This pin
should be grounded via a capacitor.
26
2ndIFin1
Pin 1 of 2nd IF amplifier input . 2nd IF filter
can be inserted between 26 & 28.
27
GND
(2ndIF AMP)
28
IF MIXout
29
VCC (IF MIX)
Differential crystal oscillator input.
Ground pin of the crystal oscillator,
prescaler, phase detector and VCO.
Output pin of 2nd IF amplifier. This pin
output 4.092 MHz clipped sinewave. This
pin should be equipped with external
inverter to adjust level to next stage on
user's system.
Supply voltage pin of 2ndIF amplifier
Bypass pin of 2nd IF amplifier input. This
pin should be grounded via a capacitor.
Ground pin of 2nd IF amplifier.
Output pin from IF mixer. IF mixer output
signal goes through gain control amplifier
before this emitter follower output port.
Supply voltage pin of IF mixer, gain control
amplifier.
Internal Equivalent Circuit
UPB1007K
PIN FUNCTIONS
Pin No.
Symbol
30
VGC (IF MIX)
31
IF-MIXin
32
GND (IF-MIX)
33
RF-MIXout
34
VCC (RF-MIX)
35
LNAin
36
GND (LNA)
Function and Application
Internal Equivalent Circuit
Gain control voltage pin of IF mixer output
amplifier. This voltage performs forward
control, i.e., (VGC up➝Gain down).
Input pin of IF mixer and IF VAGC.
Ground pin of IF mixer and IF VAGC.
Output pin of RF mixer . 1st IF filter must
be inserted between pins 31 and 33.
Supply voltage pin of RF mixer block. This
pin must be decoupled with capacitor (e.g.
1000 pF).
Input pin of low noise amplifier. Optimal
input matching required for low noise
performance.
Ground pin of LNA.
See Pins 1-3
UPB1007K
INTERNAL BLOCK DIAGRAM
8
25
PD
2
IC
BASEBAND
1575.42MHz
LOOP FILTER
TUNING ELEMENT
ORDERING INFORMATION
Part Number
Package
UPB1007K-A
36 Pin plastic QFN
OUTLINE DIMENSIONS (Units in mm)
Package Outline QFN-361
6.2±0.2
6.2±0.2
Package Outline QFN-36
6.2±0.2
6.2±0.2
ACTUAL SIZE (Units in mm)
6.2±0.2
6.2±0.2
Pin 36
6.4
6.0
Pin 1
4 -CO.5
3.8
0.5
0.22±0.05
6.2±o.2
6.2±o.2
1.0 MAX
0.6±0.1
Note:
0.5±0.025
1. The solder pads on each corner should be grounded.
Life Support Applications
These NEC products are not intended for use in life support devices, appliances, or systems where the malfunction of these products can reasonably
be expected to result in personal injury. The customers of CEL using or selling these products for use in such applications do so at their own risk and
agree to fully indemnify CEL for all damages resulting from such improper use or sale.
7/22/02
A Business Partner of NEC Compound Semiconductor Devices, Ltd.
4590 Patrick Henry Drive
Santa Clara, CA 95054-1817
Telephone: (408) 919-2500
Facsimile: (408) 988-0279
Subject: Compliance with EU Directives
CEL certifies, to its knowledge, that semiconductor and laser products detailed below are compliant
with the requirements of European Union (EU) Directive 2002/95/EC Restriction on Use of Hazardous
Substances in electrical and electronic equipment (RoHS) and the requirements of EU Directive
2003/11/EC Restriction on Penta and Octa BDE.
CEL Pb-free products have the same base part number with a suffix added. The suffix –A indicates
that the device is Pb-free. The –AZ suffix is used to designate devices containing Pb which are
exempted from the requirement of RoHS directive (*). In all cases the devices have Pb-free terminals.
All devices with these suffixes meet the requirements of the RoHS directive.
This status is based on CEL’s understanding of the EU Directives and knowledge of the materials that
go into its products as of the date of disclosure of this information.
Restricted Substance
per RoHS
Concentration Limit per RoHS
(values are not yet fixed)
Concentration contained
in CEL devices
-A
Not Detected
Lead (Pb)
< 1000 PPM
Mercury
< 1000 PPM
Not Detected
Cadmium
< 100 PPM
Not Detected
Hexavalent Chromium
< 1000 PPM
Not Detected
PBB
< 1000 PPM
Not Detected
PBDE
< 1000 PPM
Not Detected
-AZ
(*)
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standards, please do not hesitate to contact your local representative.
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