XRT5794ES Evaluation System balanced 120W operation are one quarter inch, 3-circuit audio type jacks. Equipment connections should be made with shielded twisted pair patch cords. The signal applied to any inputs must be a CCITT G.703 compliant pulse that may be attenuated by a twisted-pair cable. The XR-T5794 exceeds G.703 maximum cable loss of requirement of 6.0 dB at 1.024 MHz. GENERAL DESCRIPTION The XR-T5794 demo board is a 4.75” x 9.75” double-sided circuit card that provides the support circuitry necessary for a comprhensive evaluation of the XR-T5794 CMOS Quad E1 Line Interface IC. three board-mounted DIP switches allow complete testing of all loop back, monitor, and transmitter power-down features. The demo board is normally supplied configured for 120W balanced E1 operation. However, the information contianed in this manual enables the user to modify the hardware for E1 unbalanced 75W cable service, or T1 balanced 100W use. Similarly, transmitter outputs are labeleds TXOUT1 through TXOUT4 for the four channels. The monitor channel output is labeled MONOUT. Connector types and connection methods are identical to those specified above for the recieve side. The transmitter output, when terminated by a 120W resistor, is a pulse meeting the G.703 template requirements. During demo board evaluation, all ransmitters, including the monitor channel, that are not powered down should be connected to either a properly terminated cable, a piece of test equipment contianing a termination, or a 120W load resistor. BOARD OPERATION Figures 1, 2 and Table 2 are the board component layout, circuit diagram, and parts list respectively. The Demo Board uses the same pin function and signal names as the XR-T5794 data sheet. This user’s manual is designed to be used in conjuction with the XR-T5794 data sheet. The following description if for a demo board set up for balanced 120 W E1 use. It also applies to the other modes of operation if the appropriate impedence, cable type, and signal source changes are made. Equipment-Side Signal Connections For convenience, access to the logic-level equipment-side signals is provided by two groups of turret terminals and also by two ribbon cable connectors. The terminals are convient for simple tests while the ribbon cable connectors reduce the amount of wiring necessary to connect the entire equipment side of the demo board to customer equipment. Power Requirements Power connections are made to banana jacks located in the upper left hand corner of the board. Power supply requirements are: Header P1 and a group of terminals that provide channel 1 and 2 I/O are located below the XR-T5794. For channels 3 and 4, P2 and a second group of pins are located above the XR-T5794. P1 and P2 are dual-row 26 pin headers with only the odd-nimbered pins used to carry signals. Even-numbered pins are grounded to minimize ribbon cable crosstalk. Pin 13 is also grounded to provide isolation between the transmit and receive directions. VDD = +5.0 V ±5% at 850 mA maximum VSS = - 5.0 V ±5% at 850 mA minimum Line-Side Signals Receiver signal inputs are labeled RXIN1 through RXIN4 for the four channels. The connectors supplied for Rev. 2.00 5 XRT5794ES For P1 and P2 respectively, Table 1 and 2 presented below give the header pin, signal symbol, the corresponding XR-T5794 pin, and a brief description of the signal present. P1 Pin Symbol T5794 Pin Signal Description 1 LOS1 39 Channel 1 - Receive Loss of Signal Output 3 LOS2 40 Channel 2 - Receive Loss of Signal Output 5 RXNEG1 45 Channel 1 - Receive Negative Rail Output 7 RXPOS1 46 Channel 1 - Receive Positive Rail Output 9 RXNEG2 47 Channel 2 - Receive Negative Rail Output 11 RXPOS2 48 Channel 2 - Receive Positive Rail Output 15 TXNEG1 53 Channel 1 - Transmit Negative Rail Input 17 TXPOS1 54 Channel 1 - Transmit Positive Rail Input 19 TXCLK1 55 Channel 1 - Transmit Clock Input 21 TXNEG2 56 Channel 2 - Transmit Negative Rail Input 23 TXPOS2 57 Channel 2 - Transmit Positive Rail Input 25 TXCLK2 58 Channel 2 - Trnasmit Clock Input Table 1. Header P1 - Channel 1 and 2 Equipment Side I/O Connections P2 Pin Symbol T5794 Pin Signal Description 1 TXCLK4 12 Channel 4 - Transmit Clock Input 3 TXPOS4 13 Channel 4 - Transmit Positive Rail Input 5 TXNEG4 14 Channel 4 - Transmit Negative Rail Input 7 TXCLK3 15 Channel 3 - Transmit Clock Input 9 TXPOS3 16 Channel 3 - Transmit Positive Rail Input 11 TXNEG3 17 Channel 3 - Transmit Negative Rail Input 15 RXPOS3 22 Channel 3 - Receive Positive rail Output 17 RXNEG3 23 Channel 3 - Recevie Negative Rail Output 19 RXPOS$ 24 Channel 4 - Receive Positive Rail Output 21 RXNEG4 25 Channel 4 - Receive Negative Rail Output 23 LOS4 30 Channel 4 - Receive Loss of Signal Output 25 LOS3 31 Channel 3 - Receive Loss of Signal Outpu Table 2. Header P2 - Channel 3 and 4 Equipment Side I/O Connections Rev. 2.00 6 XRT5794ES tranmitter output. The signal applied to a TXPOS input must be wider that the positive half cycle of the corresponding TXCLK, and must also meet the set-up and hold time specified in the XR-T5794 datasheet. When these conditions are met, the pulse width at the transmitter output TXOUT is determined by the positive going half-cycle of TXCLK . Equipment-Side Signal Characteristics All equipment-side connections at P1 and P2 are TTL logic-level compatible for the inputs and outputs. Specific signal types present at these pins are as follows. LOS1 Through LOS4 These pins are the loss signal outputs (LOS) for the for receive channels. A LOS output will go to a logic 1 state when the input applied to the corresponding receiver is less that the LOS threshold voltage. TXNEG1 Through TXNEG4 These pins are the negative rail input for the dual-rail transmit data for the four transmit channels. A positive-going pulse at a TXNEG input will produce a negative bipolar output pulse at the corresponding transmitter output. The pulse width conditions described above for the TXPOS input also apply to TXNEG. RXPOS1 Through RXPOS4 The signal present at these pins is the positive half of the dual-rail receive data. A positive bipolar input pulse at a receiver input will produce a positive-going pulse at the corresponding RXPOS output. Data pulse width at an RXPOS output is approximately equal to the width of the pulse applied to the reciever input at its 50% amplitude point. Operation Without TXCLK Operation without TXCLK is possible if this pin is connected to either DGND or DVDD. Transmit output pulse width in this mode of operation is determined by the widths of the pulsed applied to the TXPOS and TXNEG inputs. Therefore, the data applied to these inputs must be one-half width return-to-zero (RZ) pulses in order to produce a normal width bipolar transmit output pulse. RXNEG1 Through RXNEG4 The signal present at these pins is the negative half of the dual-rail receive data. A negative bipolar input pulse at a receiver input will produce a positive-going pulse at the corresponding RXNEG output. Data pulse width is the same as described above for the RXPOS output. DIP Switch Settings TXCLK1 Through TXCLK4 On the demo board, the logic levels presented at all control-type XR-T5794 input pins may be set with DIP switches. The following circuit is used to switch logic levels. Each IC input that is to be programmed has a 10 K W pull-up resistor connected to VDD. A SPAT DIP switch section is also connected between this input and ground. Therefore, when the switch lever is in the “ON” position as marked on the switch body, the IC input is at a “Logic 0” level. For convenience, a small “1” and “0” that indicate IC pin logic level to switch position correspondence is printed on the borad at the top end of each DIP switch. These pins are the transmit clock inputs of four transmit channels. For a specific channel, TXCLK is a 2.048 MHz 50% duty cycle square wave that is synchronized with the data to be transmitted over that channel. TXPOS1 Through TXPOS4 These pins are the positive rail inputs for the dual-rail transmit data for the four tranmit channels. A positive-going pulse at a TXPOS input will produce a positive bipolar outout pulse at the corresponding Rev. 2.00 7 XRT5794ES Tables 3, 4 and 5, which are given below, list the switch position, XR-T5794 pin controlled, signal symbol, and function of the three demo board DIP switches. Switch Position IC Pin Symbol Switch Setting 1 33 MSEL0 Off MSEL0 = Logic 1 On MSEL0 = Logic 0 Off MSEL1 = Logic 1 On MSEL1 = Logic 0 On MSEL2 = Logic 1 Off MSEL2 = Logic 0 2 3 34 37 MSEL1 MSEL2 Function 4 (Not Used) Table 3. Dip Switch S1 Functions Switch Position IC Pin Symbol Switch Setting 1 61 TXEN2 Off Transmitter 2 Output Enabled On Transmitter 2 Output High Impedence Off Transmitter 1 Output Enabled On Transmitter 1 Output High Impedance Off 120 W Mode Selected On 75 W Mode Selected Off Channel 2 Loop Mode Enabled On Channel 2 Normal Operation Off Channel 1 Loop Mode Enabled On Channel 1 Normal Operation Off E1 Mode Selected On T1 Mode Selected Off Channel 2 Remote Loop Back Mode Selected On Channel 2 Local Loop back Mode Selected Off Channel 1 remote Loopback Mode Selected On Channel 1 Local Loop Back Mode Selected 2 3 4 5 6 7 8 62 60 52 51 50 42 41 TXEN1 ZSEL LPEN2 LPEN1 E1/T1B LPMOD2 LPMOD1 Function Table 4. Dip Switch S2 Functions Rev. 2.00 8 XRT5794ES Switch Position IC Pin Symbol Switch Setting 1 28 LPMOD3 Off Channel 3 Remote Loop Back Mode Selected On Channel 3 Local Loop Back Mode Selected Off Channel 4 Remote Loop Back Mode Selected On Channel 4 Remote Loop Back Mode Selected Off Channel 3 Loop Mode Enabled On Channel 3 Normal Operation Off Channel 4 Loop Made Enabled On Channel 4 Normal Operation Off Monitor Output Enabled On Monitor Output High Impedance Off Transmitter 3 Output Enabled On Transmitter 3 Output High Impedance Off Transmitter 4 Output Enabled On Transmitter 4 Output High Impedance 2 27 LPMOD4 Function 3 (Not Used) 4 19 LPEN3 5 18 LPEN4 6 10 MONEN 7 8 9 8 TXEN3 TXEN4 Table 5. Dip Switch S3 Functions HARDWARE CONFIGURATION CHANGES the nine clip-on jumpers so that they now connect the top two pins on the 3-pin headers labeled E1 through E9. This section describes hardware changes necessary for different modes of operation. It assumes that the demo board is initially configured for 120W balanced E1 service. Balanced or unbalanced cable operation is chosen by a clip-on jumper for each channel and by the installation the appropriate types of input and output connectors. T1/E1 rate selection is done by one DIP switch section. 100/120W impedance selection for balanced operation involoves a resistor change. 75W Unbalanced E1 Operation Replace the 3-circuit audio type jacks used on the line-side inputs and outputs with BNC connectors (9 total). Wire the center pin of each BNC connector to the adjacent circuit borad pad labeled “75”. 100W Balanced T1 Operation Replace 120W resistor R2, R4, R6 and R8, with 100W parts. Replace 68W resistors R10, R12, R14, R16 and R18, with 62W parts. With the demo board oriented so that the power connections are in the upper left hand corner, reposition Rev. 2.00 9 XRT5794ES Qty. Reference 4 T1,2,3,4 5 Description Supplier Input Transforner, 1:1 Ratio Pulse Eng. PE-65834 T5,6,7,8,9 Output Transformer, 1:1.266 Ratio Pulse Eng. PE-65839 4 R1,3,5,7 75W, 1/4W, 1% Metal Film Resistor 4 R2,4,6,8 121W, 1/4W, 1% Metal Film Resistor 10 R9, 10, 11,12,13, 14, 15, 16, 17, 18 68.1W, 1/4W, 1% Metal Film Resistor 1 R19 10 K, 2%, 5 Resistor, Thick-film Network 2 R20, 21 10 K, 2%, 9 Resistor, Thick-film Network 2 C1, 2 15 C3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 1 S1 4-Position DIP Switch 2 S2, 3 8-Position DIP Switch CTS 68 Pin PLCC Socket Amp 1 22mF, 16 V, Electrolytic, Axial LEad, 5mm Dia., 2mm Spacing 0.1 mF, 63 V, Z5U Dielectric, Axial lead, 0.1” Spacing, Panasonic CTS 2 P1, P2 26 Pin Dual-Row Header, Gold Pins 2 P1, P2 26 Pin Ribbon Connector For Above 9 E1, 2, 3, 4, 5, 6, 7, 8, 9 9 (Select option on E1 through E9) 9 Line-Side signal connections 3 Pin Single-Row Header, Gold Shorting Jumper For Above Header 3-Conductor 1/4” Audio Jack, for 3/8” Hole (Connector for Balanced Line) 3 Banana Jacks, red, Blue, Black 26 (GND, VSS, VDD) Pins for Digital I/O Pads 4 Spacers to Elevate Board 4 4-40 x 5/16” Screws for Spacers Table 6. XR-T5794 Demo Board Parts List Rev. 2.00 10 XRT5794ES C14 R11 R12 TXCLK2 TXPOS2 TXNEG2 TXCLK1 TXPOS1 TXNEG1 120 75 XR--T5794 P2 C3 C7 R20 1 S2 0 E6 R17 R18 T9 TXOUT4 120 75 C17 120 75 E9 TXEN2 TXEM1 T6 ZSEL LPEN2 LPEN1 E5 C13 LPMOD1 R9 LPMOD2 E1/TIB R10 T5 TXOUT3 1 S3 0 E8 LPMOD3 R15 LPMOD4 R16 T8 LPEN3 LPEN4 C15 MONEN TXEN3 TXEN4 E7 R13 R21 R14 T7 120 75 120 75 MONOUT RXPOS2 RXNEG2 RXPOS1 RXNEG1 LOS2 LOS1 VSS 75 120 GND RXIN4 P1 75 120 RXIN3 R1 R2 75 120 RXIN2 T1 T2 T3 R3 R4 E1 C10 E2 1 C9 R5 R6 S1 0 T4 C12 VDD R7 R8 C11 E3 C6 * E4 C2 * R19 C5 C1 C8 C4 U1 RXPOS3 RXNEG3 RXPOS4 RXNEG4 LOS4 LOS3 MSEL0 MSEL1 MSEL2 C16 TXOUT2 TXOUT1 TXCLK4 TXPOS4 TXNEG4 TXCLK3 TXPOS3 TXNEG3 75 RXIN1 Figure 1. XR-T5794 Demo Board Component Layout Rev. 2.00 11 120 XRT5794ES VDD T1 TIP RING R2 120 E1 1 PE 65834 1:1 0.1mF 2 3 TIP TIP RING T2 R4 120 PE 65834 1:1 0.1mF RING E2 1 8 7 6 5 1 2 3 4 9 10 11 12 13 14 15 16 8 7 6 5 4 3 2 1 2 3 TIP TIP R19 10K VDD 2 6 11 21 26 64 T3 R6 120 PE 65834 1:1 0.1mF TIP 1 41 38 32 29 2 3 C11 RING TIP T4 R8 120 PE 65834 1:1 0.1mF C12 R7 75 1 1 2 3 4 5 6 1 9 8 7 6 5 4 3 2 2 3 4 5 6 7 8 910 1 0 2 3 4 5 6 7 8 C13 16 15 14 13 12 11 10 9 3 R9 68 E5 1 R10 68 2 333 347 MM M SS S EE E LL L 01 2 TVDD TVDD AVDD VDD RVDD TVDD 4 45 55 6 6 6 3 201 2 0 21 L L E L L ZT T P P1 P PS X X M M / E EE E E O O T N NL N N D D1 1 2 1 2 1 2 111 89089 T TM L L X XOP P E E NE E N NE N N 4 3M 4 3 XR-T5794 TTTTTT XXXXXX N P C NP C E OL E OL GS K GS K 111 222 5 5 55 5 5 34 56 7 8 T T T TT T X X X XX X C P N CP N L O E L OE K S GKS G 4 4 4 3 33 11 1 1 1 1 234567 2 2 7 8 L L PP MM OO DD 4 3 TVSS RVSS DVSS AVSS TVSS TVSS T5 3 R11 68 E6 1 R12 68 T6 PE 65839 C15 0.1mF 20 35 36 5 44 49 59 65 68 0.1mF PE 65839 C14 0.1mF 2 RXIN1 RXIN2 RXIN3 RXIN4 3 AGND 67 AGND R R RR X X XX L L NP NP OOE O E O S S GS GS 1 21 1 2 2 3 44 4 4 4 9 05 6 7 8 E3 R5 75 TIP 1 R20 10K 3 R13 68 E7 1 R14 68 2 VSS T7 PE 65839 C16 0.1mF 3 R15 68 E8 1 R16 68 2 TXOUT1 63 TXOUT2 66 TXOUT3 4 TXOUT4 7 MOUT 1 R R RR X X XX P N P NL L O E O EOO S G S GSS 3 3 4 443 2 2 23 3 3 2 3 4 5 01 T8 PE 65839 C17 0.1mF 3 2 E9 1 R17 68 T9 R18 68 PE 65839 E4 1 2 3 VDD C1 + 10mF VSS VSS C3 C4 C5 0.1mF 0.1mF 0.1mF 1 35 791 1 1 1 1 222 1 3 5 791 35 P1 11 1 1 1 22 22 24 6 8 02 4 6 8 024 6 1 35 7 91 1 1 1 1 222 1 3 57 91 3 5 P2 1 1 1 1 1 22 22 2 46 8 0 2 4 6 80 24 6 C2 10mF + Figure 2. XR-T5794 Demo Board Circuit Diagram Rev. 2.00 12 C6 C7 C8 0.1mF 0.1mF 0.1mF TIP TIP RING TIP TIP RING TIP TIP RING TIP TIP RING TIP TIP RING XRT5794ES Notes Rev. 2.00 13 XRT5794ES Notes Rev. 2.00 14 XRT5794ES Notes Rev. 2.00 15