GMT G2993

G2993
Global Mixed-mode Technology Inc.
DDR Termination Regulator
Features
General Description
„Operation Supply Voltage: 1.6V to 5.5V
„Low Supply Current: 280µA @ 2.5V
„Low Output Offset
„Source and Sink Current
„Low External Component Count
„No Inductor Required
„No external Resistors Required
„Thermal Shutdown Protection
„SOP-8L package
The G2993 is a linear regulator designed to meet the
JEDEC SSTL-2 and SSTL-3 (Series Stub Termination
Logic) specifications for termination of DDR-SDRAM.
It contains a high-speed operational amplifier that provides excellent response to the load transients. This
device can deliver 1.5A continuous current and transient peaks up to 3A in the application as required for
DDR-SDRAM termination.
The G2993 can easily provide the accurate VTT voltages without external resistors that PCB areas can be
reduced. The quiescent current is as low as 280µA @
2.5V. So the power consumption can meet the low
power consumption applications.
Applications
„DDR-SDRAM Termination Voltage
„DDR-I / DDR-II Termination Voltage
„SSTL-2
„SSTL-3
Ordering Information
ORDER
NUMBER
MARKING
TEMP.
RANGE
PACKAGE
G2993P1X
G2993
-40°C to 85°C
SOP- 8L
Note: X Specify the packing type
U: Tape & Reel
T: Tube
Pin Configuration
Typical Application Circuit
G2993
VDDQ
1
8
GND
AVIN
2
7
GND
PVIN
3
6
GND
VTT
5
4
VDDQ=2.5V
VDDQ
VDD=2.5V
AVIN
PVIN
47µF
GND
+
VTT
GND
VTT=1.25V
+
220µF
SOP-8L
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Ver: 1.3
Jan 13, 2004
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G2993
Global Mixed-mode Technology Inc.
Absolute Maximum Ratings
Recommend Operation Range
(1)
Supply Voltage
PVIN, AVIN, VDDQ to GND……………-0.3V to +6V
Operating Ambient Temperature Range
TA…….…………………………….……...-40°C to +125°C
Maximum Junction Temperature, TJ…..……….….150°C
Storage Temperature Range, TSTG….….-65°C to+150°C
Soldering Temperature, 10seconds, TS……….……260°C
Electrostatic Discharge, VESD
Human body mode..……………………………….2000V(2)
SOP-8L Thermal Resistance (θJA)….………..…50°C/W
Operating Ambient Temperature Range
TA…………….…………………….………..-40°C to +85°C
AVIN to GND…………………………………1.6V to +5.5V
PVIN, VDDQ to GND.…………………..……1.6V to AVIN
Note:
(1)
:Absolute maximum rating indicates limits beyond which damage to the device may occurs.
(2)
: Human body model : C = 100pF, R = 1500Ω, 3 positive pulses plus 3 negative pulses
Electrical Characteristics
Specifications with standard typeface are for TA=25°° C. Unless otherwise specified, AVIN=PVIN=2.5V,
VDDQ=2.5V
SYMBOL
VTT
IQ
ZVDDQ
TSD
PARAMETER
VTT Output voltage
Quiescent Current
VDDQ input Impedence
Thermal Shutdown
Thermal Shutdown Hystersis
CONDITION
IOUT=0A
VDDQ=2.3V
VDDQ=2.5V
VDDQ=2.7V
IOUT=±1.5A
VDDQ=2.3V
VDDQ=2.5V
VDDQ=2.7V
IOUT=0A
MIN
TYP
MAX
UNIT
1.115
1.215
1.315
1.15
1.25
1.35
1.19
1.29
1.39
V
V
V
1.115
1.215
1.315
120
1.15
1.25
1.35
280
100
150
25
1.19
1.29
1.39
500
V
V
V
µA
KΩ
°C
°C
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Ver: 1.3
Jan 13, 2004
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G2993
Global Mixed-mode Technology Inc.
Typical Performance Characteristics
AVIN=2.5V, PVIN=2.5V, VDDQ=2.5V,CAVIN=0.1µF, CPVIN=47µF, CVTT=220µF, TA=25°° C, unless otherwise noted.
VTT vs IOUT vs Temperature
1.248
230
1.244
210
1.24
VTT(V)
IQ(µA)
IQ vs AVIN
250
190
0°C
1.236
25°C
170
1.232
150
2
2.5
3
3.5
4
4.5
5
85°C
1.228
5.5
-100
-75
-50
AV IN(V)
0
25
50
75
100
5
5.5
IOUT(mA)
IQ vs AVIN Temperature
VTT vs VDDQ
3
270
2.5
250
IQ(µA)
1.5
25°C
IO=200m
85°C
230
2
VTT(V)
-25
210
0°C
1
190
0.5
170
150
0
2
2.5
3
3.5
4
4.5
5
2
5.5
2.5
3
3.5
Maximum Sourcing Current vs AVIN
(VDDQ=2.5V, PVIN=1.8V)
4.5
Maximum Sourcing Current vs AVIN
(VDDQ=2.5V, PVIN=2.5V)
1.4
1.8
1.2
1.7
OUTPUT CURRENT(A)
OUTPUT CURRENT(A)
4
AVIN(V)
VDDQ(V)
1
0.8
0.6
0.4
1.6
1.5
1.4
1.3
1.2
0.2
1.1
0
2
2.5
3
3.5
4
4.5
5
5.5
2
AVIN(V)
2.5
3
3.5
4
AVIN(V)
4.5
5
5.5
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Ver: 1.3
Jan 13, 2004
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G2993
Global Mixed-mode Technology Inc.
Typical Performance Characteristics (continued)
AVIN=2.5V, PVIN=2.5V, VDDQ=2.5V,CAVIN=0.1µF, CPVIN=47µF, CVTT=220µF, TA=25°° C, unless otherwise noted.
Maximum Sourcing Current vs AVIN
(VDDQ=1.8V, PVIN=1.8V)
Maximum Sourcing Current vs AVIN
(VDDQ=2.5V, PVIN=3.3V)
3
1.4
OUTPUT CURRENT(A)
OUTPUT CURRENT(A)
1.2
2.8
2.6
2.4
2.2
1
0.8
0.6
0.4
0.2
2
0
2
2.5
3
3.5
4
4.5
5
5.5
2
2.5
3
Maximum Sourcing Current vs AVIN
(VDDQ=1.8V, PVIN=3.3V)
3
3.5
4
4.5
5
5.5
AVIN(V)
AVIN(V)
Maximum Sinking Current vs AVIN
(VDDQ=2.5V)
3
OUTPUT CURRENT(A)
OUTPUT CURRENT(A)
2.8
2.8
2.6
2.4
2.2
IO=200m
2.6
2.4
2.2
2
1.8
1.6
2
1.4
2
2.5
3
3.5
4
4.5
5
2
5.5
AVIN(V)
2.5
3
3.5
4
4.5
5
5.5
AVIN(V)
Maximum Sinking Current vs AVIN
(VDDQ=1.8V)
2.8
OUTPUT CURRENT(A)
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
2
2.5
3
3.5
4
4.5
5
5.5
AVIN(V)
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Global Mixed-mode Technology Inc.
G2993
Typical Performance Characteristics (continued)
AVIN=2.5V, PVIN=2.5V, VDDQ=2.5V, CAVIN=0.1µF/ Ceramic X7R/0603/6.3V/TDK, CPVIN=1000µF/Dip Electrolytic/10*12.5mm/6.3V/JACKCON, CVTT=1000µF*3/Dip Electrolytic/10*12.5mm/6.3V/JACKCON, TA=25°°C, unless
otherwise noted.
ILoad=0.5A Transient (Sinking)
ILoad=0.5A Transient (Sourcing)
ILoad=1A Transient (Sinking)
ILoad=1A Transient (Sourcing)
ILoad=1.5A Transient (Sinking)
ILoad=1.5A Transient (Sourcing)
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Ver: 1.3
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G2993
Global Mixed-mode Technology Inc.
Pin Description
NUMBER
NAME
1
2
3
4
5
6
7
8
VDDQ
AVIN
PVIN
VTT
GND
GND
GND
GND
FUNCTION
Input for internal reference which equals to VDDQ/2
Analog input pin
Power input pin
Output voltage for connection to termination resistors, equal to VDDQ/2
Ground
Ground
Ground
Ground
Block Diagram
VDDQ
AVIN
PVIN
50k
+
50k
VTT
-
GND
Description
VTT
VDD
The G2993 is a linear bus termination regulator designed to meet the JEDEC SSTL-2 and SSTL-3 (Series Stub Termination Logic) specifications for termination of DDR-SDRAM. The output, VTT, is capable of
sinking and sourcing current while regulating the output voltage equal to VDDQ/2. The G2993 is designed
to maintain the excellent load regulation and with fast
response time to minimum the transition preventing
shoot-through. The G2993 also incorporates two distinct power rails that separates the analog circuitry
(AVIN) from the power output stage (PVIN). This
power rails split can be utilized to reduce the internal
power dissipation. And this also permits G2993 to provide a termination solution for the next generation of
DDR-SDRAM (DDR II).
RT
RS
MENORY
CHIPSET
VREF
Figure 1. SSTL-Termination Scheme
AVIN, PVIN
AVIN and PVIN are two independent input supply pins
for the G2993. AVIN is used to supply all the internal
analog circuits. PVIN is only used to supply the output
stage to create the regulated VTT. To keep the regulation successfully, AVIN should be equal to or larger
than PVIN. Using a higher PVIN voltage will produce a
larger sourcing capability from VTT. But the internal
power loss will also increase and then the heat increases. If the junction temperature exceeds the
thermal shutdown threshold than the G2993 will enter
the shutdown state, where VTT is tri-state.
For SSTL-2 applications, the AVIN and PVIN can be
short together at 2.5V to minimize the PCB complexity
and to reduce the bypassing capacitors for the two
supply pins separately.
Series Stub Termination Logic (SSTL) was created to
improve signal integrity of the data transmission
across the memory bus. This termination scheme is
essential to prevent data error from signal reflections
while transmitting at high frequencies encountered
with DDR-SDRAM. The most common form of termination is Class II single parallel termination. This involves one RS series resistor from the chipset to the
memory and one RT termination resistor, both 25Ω
typically. The resistors can be changed to scale the
current requirements from the G2993. This implementation can be seen below in Figure 1.
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VDDQ
A voltage divider of two 50kΩ is connected between
VDDQ and ground, to create the internal reference
voltage (VDDQ/2). This guarantees that VTT will track
VDDQ/2 precisely. The optimal implementation of
VDDQ is as a remote sensing. This can be achieved
by connecting VDDQ directly to the 2.5V rail (SSTL-2
applications) at the DIMM instead of AVIN and PVIN.
This will ensure that the reference voltage tracks the
DDR memory rails precisely without a large voltage
drop from the power lines.
G2993
possible. The typical recommended value is 50µF for
AL electrolytic capacitors, 10uF with X5R for the ceramic capacitors. To prevent the excessive noise coupling into this device, an additional 0.1µF ceramic capacitor can be placed on the AVIN power rail for the
better performance.
The output capacitor of the G2993 is suggested to use
the capacitors with low ESR. Using the capacitors with
low ESR (as ceramic, OS-CON, tantalum) will have
the better transition performance which is with smaller
voltage drop when the peak current occurring at the
transition. As a general recommendation the output
capacitor should be sized above 220µF with the low
ESR for SSTL applications with DDR-SDRAM.
VTT
VTT is the regulated output that is used to terminate
the bus resistors of DDR-SDRAM. It can precisely
track the VDDQ/2 voltage with the sinking and sourcing current capability. The G2993 is designed to deliver 1.5A continuous current and peak current up to
3A with a fast transient response @ 2.5V supply rail.
The maximum continuous current sourcing from VTT is
a function of PVIN. Using a higher PVIN will increase
the source current from VTT, but it also increase the
internal power dissipation and reduce the efficiency.
Although the G2993 can deliver the larger current,
care should be taken for the thermal dissipation when
larger current is required. The RDS of MOS will increase when the junction temperature increases. If the
heat is not dealt with well, the maximum output current
will be degraded. When the temperature exceeds the
junction temperature, the thermal shutdown protection
is activated. That will drive the VTT output into tri-state
until the temperature returns below the hysteretic trigger point.
Thermal Dissipation
When the current is sinking to or sourcing from VTT,
the G2993 will generate internal power dissipation
resulting in the heat. Care should be taken to prevent
the device from damages caused by the junction temperature exceeding the maximum rating. The maximum allowable internal temperature rise (TRMAX) can
be calculated under the given maximum ambient
temperature (TAMAX) of the application and the maximum allowable junction temperature (TJMAX).
TRMAX= TJMAX - TAMAX
From this equation, the maximum power dissipation
(PDMAX) of the G2993 can be calculated:
PDMAX = TRMAX /θJA
θJA of the G2993 will be dependent on several variables: the packages used, the thickness and size of
the copper, the number of vias and the airflow. The
better θJA is not only protecting the device well, but
also increasing the maximum current capability at the
same ambient temperature.
Capacitors
The G2993 does not require the capacitors for input
stability, but it is recommended for improving the
performance during large load transition to prevent the
input power rail from dropping, especially for PVIN.
The input capacitor for PVIN should be as close as
TEL: 886-3-5788833
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G2993
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Typical Application Circuits
ment the SSTL-2 termination scheme, it is recommended to connect all the input rails to 2.5V rail, as
seen in Figure 2. This provides an optimal trade-off
between power dissipation and component count.
There are several application circuits shown in Figure
2 through 6 to illustrate some of the possible configurations of the G2993. Figure 2~4 are the SSTL-2 applications. For the majority of applications that imple-
VDDQ
VDDQ=2.5V
VDD=2.5V
AVIN
PVIN
CIN
+
VTT
VTT=1.25V
+
GND
COUT
Figure 2. Recommended SSTL-2 Implementation
device and improve the efficiency, but the disadvantage is the maximum continuous current sourcing from
VTT is reduced. This configuration is applied when the
power dissipation and efficiency are concerned.
In Figure 3, the power rails are split. The power rail of
the output stage (PVIN) can be as low as 1.8V, the
power rail of the analog circuit (AVIN) is operated
above 2V. The lower output stage power rail can lower
the internal power dissipation when sourcing from the
VDDQ=2.5V
VDDQ
AVIN=1.8V or 5.5V
AVIN
PVIN=1.8V
PVIN
CIN
+
VTT
VTT=1.25V
+
GND
COUT
Figure 3. Lower Power Dissipation SSTL-2 Implementation
In Figure 4, the power rail of the output stage (PVIN) is
connected to 3.3V to increase the maximum continuous current sourcing from VTT. AVIN should be always
equal to or larger than PVIN. This configuration can
increase the source capability of this device, but the
power dissipation increases at the same time. It
VDDQ=2.5V
VDDQ
AVIN=3.3V or 5V
AVIN
PVIN=3.3V
should be more careful to prevent the junction temperature from exceeding the maximum rating. Because of this risk, it is not recommended to supply the
output stage power rail (PVIN) with a voltage higher
than a nominal 3.3V rail.
PVIN
CIN
+
VTT
GND
VTT=1.25V
+
COUT
Figure 4. SSTL-2 Implementation with higher voltage rails
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G2993
Global Mixed-mode Technology Inc.
it is possible to use the G2993 in applications utilizing
DDR-II memory. Figure 6 is used to increase the driving capability. The risk is the same as figure 4.
In Figure 5 & 6, they are the application configurations
of DDR-II SDRAM bus terminations. Figure 5 is the
typical application scheme of DDR-II SDRAM. With
the separate VDDQ pin and an internal resistor divider,
VDDQ=1.8V
VDDQ
AVIN=1.8V or 5.5V
AVIN
PVIN=1.8V
PVIN
CIN
+
VTT
VTT=0.9V
+
GND
COUT
Figure 5. Recommended DDR-II Termination
VDDQ=1.8V
VDDQ
AVIN=3.3V or 5.5V
AVIN
PVIN=3.3V
PVIN
CIN
+
VTT
GND
VTT=0.9V
+
COUT
Figure 6. DDR-II Termination with higher voltage rails
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Ver: 1.3
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G2993
Global Mixed-mode Technology Inc.
Package Information
C
E
H
L
D
θ
7 ° (4X)
A2
y
e
A
A1
B
SOP-8L Package
Note:
1. Package body sizes exclude mold flash and gate burrs
2. Dimension L is measured in gage plane
3. Tolerance 0.10mm unless otherwise specified
4. Controlling dimension is millimeter converted inch dimensions are not necessarily exact.
5. Followed from JEDEC MS-012
SYMBOL
A
A1
A2
B
C
D
E
e
H
L
y
θ
MIN.
DIMENSION IN MM
NOM.
MAX.
MIN.
1.35
0.10
----0.33
0.19
4.80
3.80
----5.80
0.40
----0º
1.60
----1.45
----------------1.27
-----------------
1.75
0.25
----0.51
0.25
5.00
4.00
----6.20
1.27
0.10
8º
0.053
0.004
----0.013
0.007
0.189
0.150
----0.228
0.016
----0º
DIMENSION IN INCH
NOM.
0.063
----0.057
----------------0.050
-----------------
MAX.
0.069
0.010
----0.020
0.010
0.197
0.157
----0.244
0.050
0.004
8º
Taping Specification
Feed Direction
Typical SOP Package Orientation
GMT Inc. does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and GMT Inc. reserves the right at any time without notice to change said circuitry and specifications.
TEL: 886-3-5788833
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Ver: 1.3
Jan 13, 2004
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