HANBit HMNP16MM Non-Volatile SRAM MODULE 16Mbyte (4,096K x 32Bit), PCI interface, (SMM) 5V Part No. HMNP16MM GENERAL DESCRIPTION The HMNP16MM Nonvolatile SRAM is a 16,777,216-byte static RAM organized as 8,388,608 words by 16 bits. The HMNP16MM has a self-contained lithium energy source provide reliable non-volatility coupled with the unlimited write cycles of standard SRAM and integral control circuitry which constantly monitors the single 5V supply for an out-of-tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on to sustain the memory until after VCC returns valid and write protection is unconditionally enabled to prevent garbled data. In addition the SRAM is unconditionally write-protected to prevent an inadvertent write operation. At this time the integral energy source is switched on to sustain the memory until after VCC returns valid. The HMNP16MM uses extremely low standby current CMOS SRAM’s, coupled with small lithium coin cells to provide non-volatility without long write-cycle times and the write-cycle limitations associated with EEPROM. FEATURES w Access time : 70, 85 and 100ns w High-density design : 16Mbyte Design w Battery internally isolated until power is applied w Unlimited write cycles w Data retention in the absence of VCC w 10-years minimum data retention in absence of power w Automatic write-protection during power-up/power-down cycles w Data is automatically protected during power loss w Industrial temperature operation OPTIONS MARKING w Timing 70 ns - 70 85 ns - 85 100 ns -100 URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 1 HANBit Electronics Co.,Ltd HANBit HMNP16MM PIN ASSIGNMENT P1 P2 PIN Symbol PIN Symbol PIN Symbol PIN Symbol 1 NC 2 TRST* 1 TCK 2 NC 3 TMS 4 TDO 3 GND 4 INTA* 5 TDI 6 GND 5 INTB* 6 INTC* 7 GND 8 NC 7 NC 8 VCC 9 NC 10 NC 9 INTD* 10 NC 11 NC 12 NC 11 GND 12 NC 13 P_RST* 14 NC 13 P_CLK 14 GND 15 NC 16 NC 15 GND 16 P_GNT* 17 NC 18 GND 17 18 VCC 19 P_AD(30) 20 P_AD(29) 19 NC 20 P_AD(31) 21 GND 22 P_AD(26) 21 P_AD(28) 22 P_AD(27) 23 P_AD(24) 24 NC 23 P_AD(25) 24 GND 25 P_IDSEL 26 P_AD(23) 25 GND 26 P_C_BE3* 27 NC 28 P_AD(20) 27 P_AD(22) 28 P_AD(21) 29 P_AD(18) 30 GND 29 P_AD(19) 30 VCC 31 P_AD(16) 32 P_C_BE2* 31 NC 32 P_AD(17) 33 GND 34 NC 33 P_FRAME* 34 GND 35 P_TRDY* 36 NC 35 GND 36 P_IRDY* 37 GND 38 P_STOP* 37 P_DEVSEL* 38 VCC 39 P_PERR* 40 GND 39 GND 40 P_LOCK* 41 NC 42 P_SERR* 41 NC 42 NC 43 P_C_BE1* 44 GND 43 P_PAR 44 GND 45 P_AD(14) 46 P_AD(13) 45 NC 46 P_AD(15) 47 GND 48 P_AD(10) 47 P_AD(12) 48 P_AD(11) 49 P_AD(8) 50 NC 49 P_AD(9) 50 VCC 51 P_AD(7) 52 NC 51 GND 52 P_C_BE0* 53 NC 54 NC 53 P_AD(6) 54 P_AD(5) 55 NC 56 GND 55 P_AD(4) 56 GND 57 NC 58 NC 57 NC 58 P_AD(3) 59 GND 60 NC 59 P_AD(2) 60 P_AD(1) 61 ACK64* 62 NC 61 P_AD(0) 62 VCC 63 GND 64 NC 63 GND 64 REQ64* URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 2 P_REQ* HANBit Electronics Co.,Ltd HANBit HMNP16MM FUNCTIONAL DESCRIPTION The HMNP16MM executes a read cycle whenever /WE is inactive(high) and /CE is active(low). The address specified by the address inputs(A0-A19) defines which of the 16,777,216 bytes of data is accessed. Valid data will be available to the eight data output drivers within tACC (access time) after the last address input signal is stable. When power is valid, the HMNP16MM operates as a standard CMOS SRAM. During power-down and powerup cycles, the HMNP16MM acts as a nonvolatile memory, automatically protecting and preserving the memory contents. The HMNP16MM is in the write mode whenever the /WE and /CE signals are in the active (low) state after address inputs are stable. The later occurring falling edge of /CE or /WE will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge of /CE or /WE. All address inputs must be kept valid throughout the write cycle. /WE must return to the high state for a minimum recovery time (tWR) before another cycle can be initiated. The /OE control signal should be kept inactive (high) during write cycles to avoid bus contention. However, if the output bus been enabled (/CE and /OE active) then /WE will disable the outputs in tODW from its falling edge. The HMNP16MM provides full functional capability for Vcc greater than 4.5 V and write protects by 4.37 V nominal. Power-down/power-up control circuitry constantly monitors the Vcc supply for a power-fail-detect threshold VPFD. When VCC falls below the VPFD threshold, the SRAM automatically write-protects the data. All inputs to the RAM become “don’t care” and all outputs are high impedance. As Vcc falls below approximately 3 V, the power switching circuit connects the lithium energy source to RAM to retain data. During power-up, when Vcc rises above approximately 3.0 volts, the power switching circuit connects external Vcc to the RAM and disconnects the lithium energy source. Normal RAM operation can resume after Vcc exceeds 4.5 volts. URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 3 HANBit Electronics Co.,Ltd HANBit HMNP16MM BLOCK DIAGRAM E X T E R N A L S L O T PCI BRIDGE BUFFER BUFFER BUFFER BUFFER BUFFER Rev. 0.0 (April, 2002) SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM EPLD POWER POWER POWER POWER POWER CONTROLLER CONTROLLER CONTROLLER CONTROLLER CONTROLLER URL : www.hbe.co.kr SRAM SRAM SRAM SRAM SRAM 4 HANBit Electronics Co.,Ltd HANBit HMNP16MM TRUTH TABLE MODE /OE /CE /WE I/O OPERATION POWER Not selected X H X High Z Standby Output disable H L H High Z Active Read L L H DOUT Active Write X L L DIN Active ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATING UNIT Vin,VCC -0.5 to 7.0 V Voltage on Vcc supply relative to Vss Vcc -0.5 to 7.0 V Power Dissipation Pd 32 W TSTG -65 to 150 °C 0 to 70 °C K6T4016C3C-B -40 to 85 °C K6T4016C3C-F Voltage on any pin relative to Vss Storage temperature Operating Temperature Ta REMARK NOTE: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. RECOMMENDED DC OPERATING CONDITIONS PARAMETER ( TA= TOPR ) SYMBOL MIN TYPICAL MAX Supply Voltage VCC 4.5V 5.0V 5.5V Ground VSS 0 0 0 Input high voltage VIH 2.2 - VCC+0.5V Input low voltage VIL -0.5 - 0.8V NOTE: Typical values indicate operation at TA = 25℃ URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 5 HANBit Electronics Co.,Ltd HANBit HMNP16MM DC AND OPERATING CHARACTERISTICS (TA= TOPR, VCCmin £ PARAMETER Input Leakage Current Output Leakage Current CONDITIONS VIN=VSS to VCC /CE=VIH or /OE=VIH or /WE=VIL VCC≤ VCCmax ) SYMBOL MIN TYP. MAX UNIT ILI -1 - 1 mA ILO -1 - 1 mA Output high voltage IOH=-1.0mA VOH 2.4 - - V Output low voltage IOL= 2.1mA VOL - - 0.4 V Standby supply /CE=VIH, ISB current(TTL) Other input = Vil or Vih Standby supply current(CMOS) /CE≥VCC-0.2V, Other inputs = 0 ~ Vcc Operating supply current Min.cycle,duty=100%, /CE=VIL, II/O=0㎃ , A19<VIL or A19>VIH A20<VIL or A20>VIH CAPACITANCE (TA=25℃ DESCRIPTION Input Capacitance Input/Output Capacitance - 3 ㎃ ISB1 - 20 mA ICC - 10 ㎃ , f=1MHz, VCC=5.0V) CONDITIONS SYMBOL MAX MIN UNIT Input voltage = 0V CIN 8 - pF Output voltage = 0V CI/O 10 - pF AC CHARACTERISTICS (Test Conditions) PARAMETER Input pulse levels Input rise and fall times Input and output timing reference levels Output load (including scope and jig) VALUE 0 to 2.4V 5 ns 1.5V ( unless otherwise specified) See rignt Cl Cl = 100pF + 1TTL 50pF + 1TTL URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 6 HANBit Electronics Co.,Ltd HANBit HMNP16MM READ CYCLE (TA= TOPR, VCCmin £ PARAMETER VCC≤ VCCmax ) 55 ns SYMBOL Min 70 ns Max 55 MIN MAX UNIT 70 - Ns Read Cycle Time tRC Address Access Time tACC 55 - 70 Ns Chip enable access time tACE 55 - 70 Ns Output enable to Output valid tOE 25 - 35 Ns Chip enable to output in low Z tCLZ 5 5 - ns Output enable to output in low Z tOLZ 5 5 - ns Chip disable to output in high Z tCHZ 0 20 0 25 ns Output disable to output high Z tOHZ 0 20 0 25 ns Output hold from address tOH 10 10 - ns WRITE CYCLE (TA= TOPR, VCCmin £ VCC ≤ VCCmax ) change SYMB OL MIN Write Cycle Time tWC Chip enable to end of write PARAMETER 50 ns 70ns UNIT MIN MAX 55 70 - ns tCW 45 60 - ns Address setup time tAS 0 0 - ns Address valid to end of write tAW 45 60 - ns Write pulse width tWP 45 55 - ns Write recovery time tWR1 0 0 - ns Write to output high-Z tDW 0 0 25- ns Data to writer time overlap tDH1 25 30 - ns Data hold from write time tDH2 0 0 - ns End write to output low-Z tWZ 5 5 /LB, /UB valid to end of write tOW 45 60 NOTE: MAX 20 ns - 1. A write ends at the earlier transition of /CE going high and /WE going high. 2. A write occurs during the overlap of allow /CE and a low /WE. A write begins at the later transition of /CE going low and /WE going low. 3. Either tWR1 or tWR2 must be met. URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 7 HANBit Electronics Co.,Ltd ns HANBit HMNP16MM 4. Either tDH1 or tDH2 must be met. 5. If /CE goes low simultaneously with /WE going low or after /WE going low, the outputs remain in high-impedance state. TIMING WAVEFORM URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 8 HANBit Electronics Co.,Ltd HANBit URL : www.hbe.co.kr Rev. 0.0 (April, 2002) HMNP16MM 9 HANBit Electronics Co.,Ltd HANBit URL : www.hbe.co.kr Rev. 0.0 (April, 2002) HMNP16MM 10 HANBit Electronics Co.,Ltd HANBit HMNP16MM PACKAGE DIMENSION <FRONT VIEW> <REAR VIWE> URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 11 HANBit Electronics Co.,Ltd HANBit URL : www.hbe.co.kr Rev. 0.0 (April, 2002) HMNP16MM 12 HANBit Electronics Co.,Ltd HANBit HMNP16MM ORDERING INFORMATION Part Number Density Org. Package Vcc Compone nt number HMNP16MM-100 16Mbyte x 32 128 Pin-MMC 5V 32 EA URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 13 Speed 100ns HANBit Electronics Co.,Ltd