HANBit HMS25632J2V SRAM MODULE 1Mbyte (256K x 32-Bit) 3.3V, 68-Pin JLCC Packaging Part No. HMS25632J2V GENERAL DESCRIPTION The HMS25632J2V is a high-speed static random access memory (SRAM) module containing 262,144 words organized in a x32-bit configuration. The module consists of two 256K x 16 SRAMs mounted on a 68-pin, double-sided, FR4-printed circuit board. The HMS25632J2V uses 31 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. Also it allows that lower and upper byte access by data byte control (/BS0~/BS3). Output enable (/OE) and write enable (/WE) can set the memory input and output. Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW. Reading is accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW. For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be powered from a single +3.3V DC power supply and all inputs and outputs are fully LVTTL-compatible. FEATURES PIN ASSIGNMENT w Access times : 10, 12 ,15, and 70, 85, 100ns DQ16 NC /A17 /BS3 /BS2 /BS1 /BS0 /CE1 Vcc NC /CE0 OE /WE A16 A15 A14 DQ15 w Low Power Dissipation w High-density 1Mbyte design w High-reliability, high-speed design w Single + 3.3V ±0.3V power supply DQ17 DQ18 DQ19 Vss DQ20 DQ21 DQ22 DQ23 Vcc DQ24 DQ25 DQ26 DQ27 Vss DQ28 DQ29 DQ30 w Easy memory expansion /CE and /OE functions w All inputs and outputs are LVTTL-compatible w Industry-standard pinout w FR4-PCB design w Low profile 68-pin JLCC OPTIONS MARKING w Timing 10ns access -10 12ns access -12 -15 w Packages 68-pin JLCC 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 11 59 12 58 13 57 14 56 15 55 16 54 17 53 18 52 19 51 20 50 21 49 22 48 23 47 24 46 25 45 26 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 DQ31 A6 A5 A4 A3 A2 A1 A0 Vcc A13 A12 A11 A10 A9 A8 A7 DQ0 15ns access 10 9 8 J JLCC TOP VIEW PIN FUNCTION PIN NAME PIN FUNCTION PIN NAME PIN FUNCTION A0-A17 Address Inputs /BS0 ~ /BS3 Byte Controls DQ0-31 Data Inputs Vcc Power(+3.3V) /WE Write Enable Vss Ground /CE Chip Enable N.C No Connection /OE Output Enable URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 1 HANBit Electronics Co.,Ltd. DQ14 DQ13 DQ12 Vss DQ11 DQ10 DQ9 DQ8 Vcc DQ7 DQ6 DQ5 DQ4 Vss DQ3 DQ2 DQ1 HANBit HMS25632J2V FUNCTIONAL BLOCK DIAGRAM DQ0 - DQ31 A0 - A17 32 18 A0-17 /WE /WE /OE /OE /BS0 /LB /BS1 /UB DQ 0-15 U1 /CE /CE0 A0-17 /WE DQ 16-31 U2 /OE /BS2 /LB /BS3 /UB /CE /CE1 URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 2 HANBit Electronics Co.,Ltd. HANBit HMS25632J2V ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATING VIN,OUT -0.5V to +4.6V Voltage on Vcc Supply Relative to Vss VCC -0.5V to +4.6V Power Dissipation PD Voltage on Any Pin Relative to Vss Commercial TA 2W o -65 C to +150oC 0oC to +70oC Industrial TA -40 C to +85 C Storage Temperature Operating Temperature TSTG O O w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. RECOMMENDED DC OPERATING CONDITIONS PARAMETER * ( TA=0 to 70 o C ) SYMBOL MIN TYP. MAX Supply Voltage VCC 3.0V 3.3V 3.6V Ground VSS 0 0 0 Input High Voltage VIH 2.0 - Vcc+0.3V** Input Low Voltage VIL -0.3* - 0.8V VIL(Min.) = -2.0V (Pulse Width ≤ 10ns) for I ≤ 20 mA ** VIH(Min.) = Vcc+2.0V (Pulse Width ≤ 10ns) for I ≤ 20 mA DC AND OPERATING CHARACTERISTICS (1) (0oC ≤ TA ≤ 70 oC ; Vcc = 3.3V ± 0.3V, Unless otherwise specified) PARAMETER Input Leakage Current Output Leakage Current TEST CONDITIONS VIN = Vss to Vcc /CE=VIH or /OE =VIH or /WE=VIL VOUT=Vss to VCC SYMBOL MIN MAX UNITS ILI -4 4 µA IL0 -4 4 µA 2.4 Output High Voltage IOH = -4.0mA VOH Output Low Voltage IOL = 8.0mA VOL V 0.4 V * Vcc=3.3V, Temp=25 oC URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 3 HANBit Electronics Co.,Ltd. HANBit HMS25632J2V DC AND OPERATING CHARACTERISTICS (2) DESCRIPTION Power Supply Current:Operating Power Supply Current:Standby TEST CONDITIONS MAX SYMBOL UNIT -10 -12 -15 lCC 500 490 480 mA lSB 100 100 100 mA lSB1 20 20 20 mA Min. Cycle, 100% Duty /CE=VIL, VIN=VIH or VIL, IOUT=0mA Min. Cycle, /CE=VIH f=0MHZ, /CE≥VCC-0.2V, VIN≥ VCC-0.2V or VIN≤0.2V CAPACITANCE DESCRIPTION TEST CONDITIONS SYMBOL MAX UNIT Input /Output Capacitance VI/O=0V CI/O 16 pF Input Capacitance VIN=0V CIN 14 pF * NOTE: Capacitance is sampled and not 100% tested AC CHARACTERISTICS (0oC ≤ TA ≤ 70 oC ; Vcc = 3.3V ± 0.3V, unless otherwise specified) TEST CONDITIONS PARAMETER VALUE Input Pulse Level 0 to 3V Input Rise and Fall Time 3ns Input and Output Timing Reference Levels 1.5V Output Load See below Output Load (B) for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ Output Load (A) VL=1.5V +3.3V 50Ω DOUT Z0=50Ω URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 319Ω DOUT 30pF 4 353Ω 5pF* HANBit Electronics Co.,Ltd. HANBit HMS25632J2V READ CYCLE PARAMETER -10 SYMBOL MIN -12 MAX MIN -15 MAX MIN UNIT MAX Read Cycle Time tRC 10 - 12 - 15 - ns Address Access Time tAA - 10 - 12 - 15 ns Chip Select to Output tCO - 10 - 12 - 15 ns Output Enable toValid Output tOE - 5 - 6 - 7 ns /BS0 ~ /BS3 Access Time tBA - 5 - 6 - 7 ns Chip Enable to Low-Z Output tLZ 3 - 3 - 3 - ns Output Enable to Low-Z Output tOLZ 0 - 0 - 0 - ns /BS0 ~ /BS3 Enable to Low-Z Output tBHZ 0 - 0 - 0 - ns Chip Disable to High-Z Output tHZ 0 5 3 6 0 7 ns Output Disable to High-Z Output tOHZ 0 5 0 6 0 7 /BS0 ~ /BS3 Disable to High-Z Output tBHZ 0 5 0 6 0 7 ns Output Hold from address Change tOH 3 - 3 - 3 - ns WRITE CYCLE PARAMETER -10 SYMBOL -12 -15 MIN MAX MIN MAX MIN MAX UNIT Write Cycle Time tWC 10 - 12 - 15 - ns Chip Select to End of Write tCW 7 - 8 - 10 - ns Address Set-up Time tAS 0 - 0 - 0 - ns Address Valid to End of Write tAW 7 - 8 - 10 - ns Write Pulse Width (/OE High) tWP 7 - 8 - 10 - ns Write Pulse Width (/OE Low) tWP1 10 - 12 - 15 - ns Write Recovery Time tWR 0 - 0 - 0 - ns Write to Output High-Z tWHZ 0 5 0 6 0 7 ns Data to Write Time Overlap tDW 5 - 6 - 7 - ns Data Hold from Write Time tDH 0 - 0 - 0 - ns End of Write to Output Low-Z tOW 3 - 3 - 3 - ns URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 5 HANBit Electronics Co.,Ltd. HANBit HMS25632J2V TIMING DIAGRAMS See Part No. HMS25632J2 FUNCTIONAL DESCRIPTION /CE /WE /OE MODE I/O PIN SUPPLY CURRENT H X* X Not Select High-Z ISB, I SB1 L H H Output Disable High-Z ICC L H L Read DOUT ICC L L X Write DIN ICC Note: X means Don't Care DATA RETENTION CHARACTERISTICS* (TA = 0 to 70 ℃ PARAMETER ) SYMBOL TEST CONDITION MIN MAX UNIT VCC for Data Retention VDR /CE≥ VCC-0.2V 2.0 3.6 V Data Retention Current IDR VCC=3.0V, /CE≥ VCC-0.2V - 2.0 mA VIN≥ VCC-0.2V or VIN≤ 0.2V Data Retention Set-up Time tSDR See Data Retention 0 - ns Recovery Time tRDR Wave forms(below) 5 - ns * L-Version Only URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 6 HANBit Electronics Co.,Ltd. HANBit HMS25632J2V PACKAGING DIMENSIONS 4.30±0.20mm 24.94±0.20mm 0.46±0.20mm 23.67±0.20mm 1.278±0.20mm ORDERING INFORMATION Part Number Density Org. Package Function Vcc Access Time HMS25632J2V-10 1MByte 256KX 32bit 68 Pin-JLCC Low power 3.3V 10ns HMS25632J2V-12 1MByte 256KX 32bit 68 Pin-JLCC Low power 3.3V 12ns HMS25632J2V-15 1MByte 256KX 32bit 68 Pin-JLCC Low power 3.3V 15ns HMS25632J2V-70 1MByte 256KX 32bit 68 Pin-JLCC Low power 3.3V 70ns HMS25632J2V-85 1MByte 256KX 32bit 68 Pin-JLCC Low power 3.3V 85ns HMS25632J2V-100 1MByte 256KX 32bit 68 Pin-JLCC Low power 3.3V 100ns URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 7 HANBit Electronics Co.,Ltd.