HD74CBT3245A Octal FET Bus Switch ADE-205-642 (Z) Preliminary Rev. 0 August 2001 Description The HD74CBT3245A provides eight bits of high speed TTL-compatible bus switching in a standard ’245 device pinout. The low on state resistance of the switch allows connections to be made with minimal propagation delay. The device is organized as one 8-bit switch. When output enable (OE) is low, the switch is on, and port A is connected to port B. When OE is high, the switch is open, and the high impedance state exists between the two ports. Features • Standard ’245 type pinout. • Minimal propagation delay through the switch. • 5 Ω switch connection between two ports. • TTL-compatible input levels. • Ultra low quiescent power. -Ideally suited for notebook applications. HD74CBT3245A Function Table Input OE Function L A port = B port H Disconnect H: L: High level Low level Pin Arrangement NC 1 20 VCC A1 2 19 OE A2 3 18 B1 A3 4 17 B2 A4 5 16 B3 A5 6 15 B4 A6 7 14 B5 A7 8 13 B6 A8 9 12 B7 GND 10 11 B8 (Top view) Rev.0, Aug. 2001, page 2 of 10 HD74CBT3245A Absolute Maximum Ratings Item Symbol Ratings Unit VCC −0.5 to 7.0 V VI −0.5 to 7.0 V Input clamp current IIK −50 mA VI < 0 Continuous output current IO 128 mA VO = 0 to VCC Continuous current through VCC or GND ICC or IGND ±100 mA Maximum power dissipation *2 at Ta = 25°C (in still air) PT 757 mW Storage temperature Tstg −65 to 150 °C Supply voltage range Input voltage range Notes: *1 Conditions TSSOP The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation was calculated using a junction temperature of 150°C. Recommended Operating Conditions Item Symbol Min Max Unit Supply voltage range VCC 4.0 5.5 V Input voltage range VI 0 5.5 V Output voltage range VI/O 0 5.5 V Input transition rise or fall rate ∆t / ∆v 0 5 ns / V Operating free-air temperature Ta −40 85 °C Conditions VCC = 4.5 to 5.5 V Note: Unused or floating inputs must be held high or low. Rev.0, Aug. 2001, page 3 of 10 HD74CBT3245A Block Diagram A1 2 18 B1 • • • A8 OE • • • 9 19 Rev.0, Aug. 2001, page 4 of 10 11 B8 HD74CBT3245A DC Electrical Characteristics (Ta = −40 to 85°C) Item Symbol VCC (V) Min Typ Clamp diode voltage VIK 4.5 Input voltage VIH 4.0 to 5.5 VIL RON On-state switch *2 resistance *1 Max Unit Test conditions −1.2 V IIN = −18 mA 2.0 V 4.0 to 5.5 0.8 4.5 5 7 4.5 5 7 VIN = 0 V, IIN = 30 mA 4.5 10 15 VIN = 2.4 V, IIN = 15 mA Ω VIN = 0 V, IIN = 64 mA Input current IIN 0 to 5.5 ±1.0 µA VIN = 5.5 V or GND Off-state leakage current IOZ 5.5 ±1.0 µA 0 ≤ A, B ≤ VCC Quiescent supply current ICC 5.5 3 µA VIN = VCC or GND, IO = 0 mA Increase in ICC *3 per input ∆ICC 5.5 2.5 mA One input at 3.4 V, other inputs at VCC or GND Notes: For condition shown as Min or Max use the appropriate values under recommended operating conditions. 1. All typical values are at VCC = 5 V (unless otherwise noted), Ta = 25°C. 2. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower voltage of the two (A or B) terminals. 3. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. Capacitance (Ta = 25°C) Item Symbol VCC (V) Min Typ Max Unit Test conditions Control input capacitance CIN 5.0 3.5 pF VIN = 0 or 3 V Input / output capacitance CI/O (OFF) 5.0 5 pF VO = 0 or 3 V OE = VCC Note: This parameter is determined by device characterization is not production tested. Rev.0, Aug. 2001, page 5 of 10 HD74CBT3245A Switching Characteristics (Ta = −40 to 85°C) • VCC = 4.0 V Test conditions FROM (Input) TO (Output) ns CL = 50 pF RL = 500 Ω A or B B or A 7.2 ns CL = 50 pF RL = 500 Ω OE A or B 7.4 ns CL = 50 pF RL = 500 Ω OE A or B Symbol Min Max Unit Test conditions FROM (Input) TO (Output) Propagation delay *1 time tPLH tPHL 0.25 ns CL = 50 pF RL = 500 Ω A or B B or A Enable time tZH tZL 1.9 6.5 ns CL = 50 pF RL = 500 Ω OE A or B Disable time tHZ tLZ 2.1 7.6 ns CL = 50 pF RL = 500 Ω OE A or B Item Symbol Min Max Unit Propagation delay *1 time tPLH tPHL 0.35 Enable time tZH tZL Disable time tHZ tLZ Item • VCC = 5.0±0.5 V Note: 1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). Rev.0, Aug. 2001, page 6 of 10 HD74CBT3245A Test Circuit See under table 500 Ω S1 OPEN GND *1 CL = 50 pF 500 Ω Load circuit for outputs Symbol S1 t PLH / tPHL OPEN t ZH / t HZ OPEN t ZL / t LZ 7V Note: 1. CL includes probe and jig capacitance. Rev.0, Aug. 2001, page 7 of 10 HD74CBT3245A Waveforms – 1 tr tf 90 % 1.5 V Input 3V 90 % 1.5 V 10 % 10 % t PLH GND t PHL V OH 1.5 V Output 1.5 V V OL Waveforms – 2 tf tr 90 % Output Control 3V 90 % 1.5 V 1.5 V 10 % t ZL 10 % GND t LZ 3.5 V Waveform - A 1.5 V V OL + 0.3 V t ZH t HZ V OH - 0.3 V Waveform - B V OL V OH 1.5 V GND Notes: 1. All input pulses are supplied by generators having the following characteristics : PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. Rev.0, Aug. 2001, page 8 of 10 HD74CBT3245A Package Dimensions As of January, 2001 Unit: mm 6.50 6.80 Max 11 1 10 4.40 20 0.65 *0.22 +0.08 −0.07 0.20 ± 0.06 1.0 0.13 M 6.40 ± 0.20 *Dimension including the plating thickness Base material dimension +0.03 −0.04 0° − 8° 0.50 ± 0.10 0.07 0.10 *0.17 ± 0.05 0.15 ± 0.04 1.10 Max 0.65 Max Hitachi Code JEDEC EIAJ Mass (reference value) TTP-20DA 0.07 g Rev.0, Aug. 2001, page 9 of 10 HD74CBT3245A Disclaimer 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. 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(Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road Hung-Kuo Building Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://semiconductor.hitachi.com.hk Copyright © Hitachi, Ltd., 2001. All rights reserved. Printed in Japan. Colophon 5.0 Rev.0, Aug. 2001, page 10 of 10