ETC CY7C225-30PC

CY7C225-30PC (1/2)
IL00
**********
C-MOS 4 K (512 X 8)-BIT PROM WITH REGISTER
-TOP VIEW-
A7
IN
1
VDD 24
(
)
23
+5V
1
A6
IN
2
23 A8
IN
2
3
A5
IN
3
22 PS
A4
IN
4
21 E
A3
IN
5
20 CLR
IN
4
5
IN
6
7
IN
8
22
PS
A8
D7
A7
D6
A6
D5
A5
D4
A4
D3
A3
D2
A2
D1
A1
D0
17
16
15
14
13
11
10
9
A0
18
A2
IN
6
19 ES
IN
21
19
A1
IN
7
18 C
IN
E
ES
CLR
20
A0
IN
8
17 D7
OUT
D0
OUT
9
16 D6
OUT
D1
OUT
10
15 D5
OUT
D2
OUT
11
14 D4
OUT
12 GND
13 D3
OUT
MODE SELECTION
CK ES CLR E
X
0
1
0
X
1
1
X
X
X
1
1
X
0
0
0
X
0
1
0
0
1
VPP
1
1
VPP
0
1
1
VPP
1
1
0
VPP
1
1
0
VPP
0
0
VPP
0
1
0
0
1
X
HI-Z
VPP
;
;
;
;
;
PS
1
1
1
1
0
1
1
1
1
1
1
OUTPUTS
DATA OUT
HI-Z
HI-Z
ZEROS
ONES
DATA IN
DATA OUT
HI-Z
DATA IN
DATA OUT
HI-Z
LOW LEVEL
HIGH LEVEL
DON'T CARE (NOT TO EXCEED VPP)
HIGH IMPEDANCE
PROGRAM VOLTAGE (+13V TO +14V)
A0 - A14
CLR
CK
D0 - D7
E
ES
PS
;
;
;
;
;
;
;
ADDRESS INPUTS
CLEAR INPUT
CLOCK INPUT
DATA OUTPUTS
ASYNCHRONOUS ENABLE INPUT
SYNCHRONOUS ENABLE INPUT
PRESET INPUT
MODE
READ
OUTPUT DISABLE
OUTPUT DISABLE
CLEAR
PRESET
PROGRAM
PROGRAM VERIFY
PROGRAM INHIBIT
INTELLIGENT PROGRAM
BLANK CHECK ONES
BLANK CHECK ZEROS
CY7C225-30PC (2/2)
CLR
20
A5
A4
2
3
4
S
A2
A1
A0
PS
CK
ES
5
6
7
8
D
Q
Q
E
14
13
9
18
21
15
10
22
19
CP
16
11
COLUMN DECODER
1 OF 16
A3
17
8-BIT
EDGE-TRIGGERED
REGISTER
A6
1
8 X 1 OF 16
A7
23
22 X 128
PROGRAMMABLE
ARRAY
A8
ROW DECODER
1 OF 32
R
D7
D6
D5
D4
D3
D2
D1
D0