ETC MV5087

THIS DOCUMENT IS FOR MAINTENANCE
PURPOSES ONLY AND IS NOT
RECOMMENDED FOR NEW DESIGNS
MV5087
DS3125-2.0 June 1993
MV5087
DTMF GENERATOR
The MV5087 is fabricated using ISO-CMOS high density
technology and offers low power and wide voltage operation.
An inexpensive 3.58MHz TV crystal completes the reference
oscillator. From this frequency are derived 8 different
sinusoidal frequencies which, when appropriately mixed,
provide Dual-Tone Multi-Frequency (DTMF) tones.
Inputs are compatible with either a standard 2-of-8 or a
single contact (form A) keyboard. The keyboard entries
determine the correct division of the reference frequency by
the row and column counters.
D-to-A conversion, using R-2R ladder networks, results in
a staircase approximation of a sinewave with low total distortion.
Frequency and amplitude stability over operating voltage
and temperature range are maintained within industry
specifications.
+VDD
1
16
TONE OUT
XMITR
2
15
SINGLE TONE INHIBIT
COLUMN 1
3
14
ROW 1
COLUMN 2
4
13
ROW 2
COLUMN3
5
12
ROW 3
VSS
6
11
ROW 4
OSC IN
7
10
MUTE
OSC OUT
8
9
COLUMN 4
DP16
MP16
FEATURES
■
■
■
■
Pin-for-Pin Replacement for MK5087
Low Standby Power
Minimum External Parts Count
3.5V to 10V Operatlon
2-of-8 Keyboard or Calculator-Type Single Contact (Form
A) Keyboard Input
On-Chip Regulation of Output Tone
Mute and Transmitter Drivers On-Chip
High Accuracy Tones Provided by 3.58MHz Crystal
Oscillator
Pin-Selectable Inhibit of Single Tone Generation
Figure 1: Pin connections - top view
APPLICATIONS
DTMF Signalling for
■ Telephone Sets
■ Mobile Radio
■ Remote Control
■ Point-of-Sale and Banking Terminals
■ Process Control
ROW INPUTS
{
1
2
3
SINGLE TONE
INHIBIT
4
RR
RR
VDD
VDD
RR
MV5087
RR
VDD
KEYBOARD LOGIC
OSC
OUT
ROW
COUNTER
4
SINE
WAVE
COUNTER
D/A
CONVERTER
VDD
VREF
+
-
OSC
IN
COLUMN
COUNTER
SINE
WAVE
COUNTER
D/A
CONVERTER
TONE OUT
VDD
KEYBOARD LOGIC
VSS
XMITR
RC
RC
VSS
TRANSMIT/MUTE
LOGIC
MUTE OUT
RC
RC
1
2
3
4
{
■
■
■
■
■
COLUMN INPUTS
Figure 2: Functional block diagram
1
MV5087
ABSOLUTE MAXIMUM RATINGS
VDD - VSS
Voltage on any pin
Current on any pin
Operating temperature
Storage temperature
Min.
Max.
-0.3V
VSS - 0.3V
10.5V
VDD + 0 3V
10 mA
+85°C
+150°C
-40°C
-65°C
Min.
Power dissipation
Derate 16 mW/°C above 75°C
(All leads soldered to PCB)
Max.
850 mW
DC ELECTRICAL CHARACTERISTICS
Test conditions (unless othenwise stated):
Tamb = +25°C, VDD = 3.5V to 10V
OUTPUTS
INPUTS
SUPPLY
Characteristics
Operating Supply Voltage
Symbol
Min.
VDD
3.5
Standby Supply Current
IDDS
Operating Supply Current
SINGLE TONE Input High Voltage
INHIBIT
Input Low Voltage
Input Resistance
ROW 1-4
Input High Voltage
Input Low Voltage
COLUMN 1-4
Input High Voltage
Input Low Voltage
XMITR
Source Current
IDD
VIH
VIL
RIN
VIH
VIL
VIH
VIL
IOH
MUTE
Leakage Current
Sink Current
IOZ
IOL
Source Current
IOH
Typ.
0.2
0.5
1.0
5.0
0.7VDD
0
Max.
Units
10
100
200
2.0
10.0
VDD
0.3VDD
V
uA
uA
mA
mA
V
V
KΩ
V
V
V
V
mA
mA
uA
mA
mA
mA
mA
60
0.9VDD
0.3VDD
0.7VDD
0.1VDD
-15
-50
-25
-100
0.1
10
0.5
1.0
-0.5
-1.0
Ref. to VSS
VDD = 3.5V
VDD = 10V
VDD = 3.5V
VDD = 10V
No Key Depressed
All outputs Unloaded
One Key Depressed
All outputs Unloaded
VDD = 3.5V, VOH = 2.5V
VDD = 10V, VOH = 8V
VDD = 10V, VOH = 0V
VDD = 3.5V, VOL = 0.5V
VDD = 10V, VOL = 0.5V
VDD = 3.5V, VOH = 3.0V
VDD = 10V, VOH = 9.5V
No Keyboard
Entry
Keyboard Entry
No Keyboard
Entry
Keyboard Entry
AC ELECTRICAL CHARACTERISTICS
Test conditions (unless othenwise stated):
Tamb = +25°C, VDD = 3.5V to 10V
Characteristics
TONE OUT
Row Tone
Output Voltage
Column Tone
Output Voltage
External Load
Impedance
OUTPUT DISTORTION
PRE EMPHASIS, High Band
Tone Output Rise Time
2
Symbol
Min.
Typ.
Max.
Units
VOR
320
400
500
mVRMS
VOC
400
500
630
mVRMS
RL
700
300
-20
Ω
Ω
dB
3
5
dB
ms
1
tr
3
Single Tone
RL = 1KΩ
VDD = 3.5V
VDD = 10V
Total out-of-band power relative to
sum of row and column
fundamental power
MV5087
PIN FUNCTIONS
PIN
NAME
DESCRIPTION
VDD
Positive Power Supply
2
XMITR
Emitter output of a bipolar transistor whose collector is connected to VDD. With
no keyboard input this output remains at VDD and a keyboard input changes the
output to a high impedance state. The state of Single Tone Inhibit input has no
effect on XMITR output.
3,4,5,9
Column 1-4
These inputs are held at VSS by resistors RC and sense a valid logic level (approx
/2 VDD) when tied to a ROW input.
1
VSS
Negative Power Supply (OV)
7,8
OSC In,
OSC Out
On-chip inverter completes the oscillator when a 3,579545 MHz crystal is
connected to these pins. OSC In is the inverter input and OSC Out is the output.
10
Mute
This CMOS Output switches to VSS with no keyboard input and to VDD with a
keyboard input. This output is unaffected by the state of Single Tone Inhibit.
11,12,13,14
Row 1-4
These inputs are held at VDD by resistors RR and sense a valid logic level (Approx
1
/2 VDD) when tied to a column input.
15
Single Tone
Inhibit
This input has a pull-up resistor to VDD and when left unconnected or tied to VDD,
single or dual tones may be generated. When Vss is applied dual tones only are
generated and no input combinations will cause generation of a single tone.
16
Tone Out
Emitter output of a bipolar NPN transistor whose collector is tied to VDD. Input to
this transistor is from an op-amp which mixes, and regulates the output level of,
the row and column tones.
ROW AND COLUMN INPUTS
These inputs are compatible with the standard 2-of-8
keyboard, single contact (form A) keyboard and electronic
input. Figures 3 and 4 show these input configurations, and
Fig. 5 shows the internal structure of these inputs.
When operating with a keyboard, dual tones are generated
when any single button is pushed. Single tones are generated
when more than one button is pushed in any row
or column. No tones are generated when diagonallypositioned
buttons are simultaneously pressed.
An electronic input to a single column generates that single
column tone. Inputs to multiple columns generates no tone. An
electronic input to a single row generates no tone and a single
row tone may be generated only by activating 2 columns and
the desired row.
VDD
COL
ROW
CLASS A KEYBOARD
RR
ROW
INPUT
STATIC
PROTECTION
COLUMN
INPUT
STATIC
PROTECTION
Row input
sensing circuit
COL
ROW
2 OF 8 DTMF KEYBOARD
Figure 3: Keyboard configuration
Column input
sensing circuit
RC
VSS
VDD
VSS
COLUMN
VDD
ROW
Figure 5: Row and column inputs
VSS
Figure 4: Electronic input
3
MV5087
OUTPUT FREQUENCY
Standard
DTMF
(Hz)
Table 1 shows the output frequency deviation from the
standard DTMF frequencies when a 3.58MHz crystal is used
as the reference.
The row and column output waveforms are digitally
synthesised using R-2R D-to-A converters (see Fig.6),
resulting in a ‘staircase’ approximation to a sinewave. An
opamp mixes these tones to produce a dual-tone waveform.
Single tone distortion is typically better than 7% and all
distortion components of the mixed dual-tone should be 30dB
relative to the strongest fundamental (column tone).
697
770
852
941
1209
1336
1477
1633
f1
f2
f3
f4
f5
f6
f7
f8
Row
Column
Tone Output
Frequency Using
3.5795545 MHz
Crystal
701.3
771.4
857.2
935.1
1215.9
1331.7
1471.9
1645.0
% Deviation
from Standard
+0.62
+0.19
+0.61
-0.63
+0.57
-0.32
-0.35
+0.73
Table 1: Output frequency deviation
VOUT
a)
t
VOUT
b)
t
Figure 6: Typical sinewave output (a) Row tones (b) Column tones
DISTORTION MEASUREMENTS
THD for the single tone is defined by:
100 (
2) %
V22f + V3f2 + V2 + ---- Vnf
4f
V fundamental
Where V2f --- Vnf are the Fourier components of the waveform.
THD for the dual tone is defined by:
100 (
2 + V2 + V2 + V2 --- V2 + V2 )
V22R+ V3R
nR
V2
2C
ROW
where
4
3C
nc
IMD
+ V2
COL
VROW is the row fundamental amplitude
VCOL is the column fundamental amplitude
V2R—VnR are the Fourier component amplitudes of the row frequencies
V2C—VnC are the Fourier component amplitudes of the column frequencies
VIMD is the sum of all intermodulation components.
Low
Group
High
Group
MV5087
VDD
COL 1
3
1
SINGLE TONE INHIBIT
15
7
COL 2 4
COL 3
5
COL 4
9
1
2
3
A
4
5
6
B
7
8
9
C
*
0
#
D
ROW 1
ROW 2
3.58 MHz XTAL
8
XMITR
MV5087 2
16
14
TONE OUTPUT
RL
13
ROW 3 12
ROW 4
VSS
11
6
10
VSS
MUTE
Figure 7: Connection diagram
5