TMC TD34063 DC TO DC CONVERTER CONTROLLER DESCRIPTION T he TD34063 Series is a monolithic control circuit containing the primary functions required for DC to DC converters. T hese , devices consist of an internal temperature compensated reference, comparator controlled duty cycle oscillator with an active current limit circuit, driver and high current output switch. T his series was specifically designed to be incorporated in Step-Down and Step-Up and Voltage-Inverting applications with a minimum number of external components. SOP-8 FEATURES *Operation from 3.0V to 40V. *Short circuit current limiting. *Low standby current. *Output switch current of 1.5A without external transistors. *Frequency of operation from 100Hz to 100kHz. *Step-up, step-down or inverting switch regulators. DIP-8 BLOCK DIAGRAM E SWITCH COLLECTOR T2 S 1 Q T1 SWITCH EMITTER 8 DRIVE COLLECTOR 7 Ipeak SENSE 6 Vcc R D C 2 Is A TIMING CAPACITOR 3 GND 4 CT OSCILLATOR COMP. 5 1.25Vref B COMPARATOR INVERTING INPUT PIN CONFIGURATION Switch Collector 1 8 Driver Collector Switch Emitter 2 7 Ipk Sense Timing Capacitor 3 6 Vcc Gnd 4 5 Comparator Inverting input ORDERING INFOR MATION TD34063 Operating Temperature Range TA = 0°C to +70°C TD34063 TA = 0°C to +70°C Device Package PDIP-8 SOP-8 1 TD34063 ELECTRICAL CHARACTERISTICS(VCC=5.0V, TA = Tlow to Thigh [Note 3], unless otherwise specified.) Characteristics Symbol OSCILLATOR fosc Frequency (Vpin5 = 0 V, CT = 1.0nF, TA = 25°C) lchg Charge Current (VCC =5.0 V to 40 V, TA = 25°C) ldischg Discharge Current (VCC =5.0 V to 40 V, TA = 25°C ) Discharge to Charge Current Ratio (Pin7 to VCC, TA = 25°C) ldischg / lchg Vipk(sense) Current Limit Sense Voltage (Ichg = ldischg, TA = 25 °C) OUTPUT SWITCH (Note 4) Saturation Voltage, Darlington Connection (Note 5) VCE(sat) (ISW = 1.0 A, Pins 1,8 connected) Saturation Voltage, Darlington Connection VCE(sat) (ISW = 1.0 A, Rpin 8 = 82 Ω to VCC, Forced β = 20) hFE DC Current Gain (ISW = 1.0 A, VCE =5.0 V, TA = 25°C) Collector Off-State Current (VCE = 40 V) IC(off) COMPARATOR Threshold Voltage TA = 25 °C Vth Threshold Voltage Line Regulation (VCC = 3.0 V to 40 V) Input Bias Current (Vin = 0 V) TOTAL DEVICE Supply Current (VCC = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = VCC, Vpin 5 > Vth, Pin 2 = Gnd, remaining pins open) Min Typ Max Unit 24 22 140 5.2 250 33 33 200 6.2 300 42 42 260 7.5 350 kHz uA uA - 1.0 1.3 V - 0.45 0.7 V 50 - 120 0.01 100 uA 1.23 mV 1.25 1.27 V Regline IIB - 1.4 -40 5.0 -400 mV nA ICC - 2.5 4.0 mA MAXIMUM RATINGS Rating Symbol Value Unit Power Supply Voltage VCC 40 V Comparator Input Voltage Range VIR -0.3 to +40 V Switch Collector Voltage VC(switch) 40 V Switch Emitter Voltage (Vpin 1 = 40 V) VE(switch) 40 V Switch Collector to Emitter Voltage VCE(switch) 40 V Driver Collector Voltage VC(driver) 40 V Driver Collector Current (Note 1) IC(driver) 100 mA Switch Current ISW 1.5 A Power Dissipation and Thermal Characteristics PD 1.0 W TA = 25 °C 100 °C / W R θJA Thermal Resistance Operating Junction Temperature TJ +150 °C Operating Ambient Temperature Range TA 0 to +70 °C Storage Temperature Range Tstg -65 to +150 °C NOTE : 1. Maximum package power dissipation limits must be observed. 2. ESD data available upon request. 3. Tlow = 0 °C , Thigh = +70 °C 4. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. 5.If the output switch is driven into hard saturation (non-Darlington configuration) at low switch currents ( ≤ 300mA) and high driver currents ( ≥ 30mA), it may take up to 2.0uS for it to come out of saturatiion. This condition will shorten the off time at frequencies ≥ 30kHz, and is magnified at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non-Darlington configuration is used, the following output drive condition is recommended: Forced β of output switch: *The 100 Ω resistor in the emitter of the driver device requires about 7.0 mA before the output switch conducts. TMC 2 TD34063 TYPICAL PERFORMANCE CHARACTERISTICS 1000 Standby Supply Current vs. Supply Voltage 2 ICC, Supply Current (mA) VCC=5V VIPK=VCC PIN 5=GND 100 ON TIME 10 OFF TIME 1.6 CT=1nF VIPK=VCC PIN 2=GND 1.2 0.8 0.4 1 tON-OFF Output Switch ON-OFF Time ( S) Output Switch ON-OFF Time vs. Oscillator Timing Capacitor 1 0.1 10 0 100 0 5 10 25 20 30 IPK Threshold Voltage vs Temperature VFB, Threshold Voltage vs Temperature 350 1.3 VCC = 5V, CT = 1nF PIN 2 = GND 1.28 VCC = 5V CT = 1nF PIN 5 = GND 340 VIPK, Threshold Voltage (mV) VFB, Threshold Voltage (V) 15 VCC, Supply Voltage (V) CT, Oscillator Timing Capacitor (nF) 1.26 1.24 1.22 330 320 310 300 290 280 270 260 1.2 250 0 10 20 30 40 50 60 70 80 0 10 20 30 Temperature ( °C) 60 70 80 Common-Emitter Configuration Output Switch Saturation Voltage vs Collector Current 1.8 1.4 VCC = 5V PIN 1, 7, 8 = VCC PIN 3, 5 = GND VCE(SAT), Saturation Voltage (V) VCE(SATE) Saturation Voltage (V) 50 Temperature ( °C) Emitter-Follower Configuration Output Switch Saturation Voltage vs Emitter Current 1.7 40 1.6 1.5 1.4 1.3 VCC 5V VCC == 5.0V PIN = VCC PIN 77 =VCC PINS2,2,3,3,55 == GND GND PIN Forced Beta = 20 1.2 1.0 Darlington Connection 0.8 0.6 0.4 Forced Beta = 20 0.2 0 1.2 0 0.5 1 1.5 0 IE, Emitter Current (A) 0.5 1 1.5 IC, Collector Current (A) Note 4. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. TMC 3 TD34063 Figure 1. Voltage Inverting Converter Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency Output Ripple With Optional Filter Condition Vin = 4.5 V to 6.0 V, Io = 100 mA Vin = 5.0 V, Io = 10 mA to 100 mA Vin = 5.0 V, Io = 100 mA Vin = 5.0 V, RL = 0.1 Ω Vin = 5.0 V, Io = 100 mA Vin = 5.0 V, Io = 100 mA Results 3.0 mV = ± 0.012% 0.022 V = ± 0.09% 500 mVpp 910 mA 62.2% 70 mVpp Figure 2. External Current Boost Connections for Ic Peak Greater than 1.5 A 2a. External NPN Switch TMC 2b. External PNP Saturated Switch 4 TD34063 Figure 3. Step-Down Converter Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency Output Ripple With Optional Filter Condition Vin = 15 V to 25 V, Io = 500 mA Vin = 25 V, Io = 50 mA to 500 mA Vin = 25 V, Io = 500 mA Vin = 25 V, RL = 0.1 Ω Vin = 25 V, Io = 500 mA Vin = 25 V, Io = 500 mA Results 12 mV = ± 0.12% 3.0 mV = ± 0.03% 120 mVpp 1.1 A 83.7% 40 mVpp Figure 4. External Current Boost Connections for Ic Peak Greater than 1.5 A 4a. External NPN Switch TMC 4b. External PNP Saturated Switch 5 TD34063 Figure 5. Step-Up Converter Test Line Regulation Load Regulation Output Ripple Efficiency Output Ripple With Optional Filter Condition Vin = 8.0 V to 16 V, Io = 175 mA Vin = 12 V, Io = 75 mA to 175 mA Vin = 12 V, Io = 175 mA Vin = 12 V, Io = 175 mA Vin = 12 V, Io = 175 mA Results 30 mV = ± 0.05% 10 mV = ± 0.017% 400 mVpp 87.7% 40 mVpp Figure 6. External Current Boost Connections for Ic Peak Greater than 1.5 A 6a. External NPN Switch 6 b. External NPN Saturated Switch (See Note 5 ) Note 5: If the output switch is driven into hard saturation (non-Darlington configuration) at low switch currents ( ≤ 300 mA) and high driver currents ( ≥ 30 mA), it may take up to 2.0 us to come out of saturation. This condition will shorten the off time at frequencies ≥ 30 kHz, and is magnified at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non-Darlington configuration is used, the following output drive condition is recommended. TMC 6 Package Information Plastic DIP Outline Dimensions 8-pin DIP (300mil) Outline Dimensions A 8 B 5 4 1 H C D G E = I F Symbol A Dimensions in mil Min. Nom. Max. 355 ¾ 375 B 240 ¾ 260 C 125 ¾ 135 D 125 ¾ 145 E 16 ¾ 20 F 50 ¾ 70 G ¾ 100 ¾ H 295 ¾ 315 I 335 ¾ 375 a 0° ¾ 15° Package Information SOP Outline Dimensions 8-pin SOP (150mil) Outline Dimensions 5 8 A B 4 1 C C ' G H D E Symbol = F Dimensions in mil Min. Nom. Max. A 228 ¾ 244 B 149 ¾ 157 C 14 ¾ 20 C¢ 189 ¾ 197 D 53 ¾ 69 E ¾ 50 ¾ F 4 ¾ 10 G 22 ¾ 28 H 4 ¾ 12 a 0° ¾ 10° Package Information Carrier Tape Dimensions P 0 D P 1 t E F W C D 1 B 0 P K 0 A 0 SOP 8N Symbol Description Dimensions in mm W Carrier Tape Width 12.0+0.3 -0.1 P Cavity Pitch 8.0±0.1 E Perforation Position 1.75±0.1 F Cavity to Perforation (Width Direction) 5.5±0.1 D Perforation Diameter 1.55±0.1 D1 Cavity Hole Diameter 1.5+0.25 P0 Perforation Pitch 4.0±0.1 P1 Cavity to Perforation (Length Direction) 2.0±0.1 A0 Cavity Length 6.4±0.1 B0 Cavity Width 5.20±0.1 K0 Cavity Depth 2.1±0.1 t Carrier Tape Thickness 0.3±0.05 C Cover Tape Width 9.3