TECHNICAL DATA KK74LV14 Hex Schmitt-Trigger Inverter The 74LV14 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT14. The 74LV14 provides six inverting buffers with Schmitt-trigger action. • • • • Wide Operating Voltage: 1.0 to 5.5 V Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between VCC =2.7 V and VCC =3.6 V Low input current ORDERING INFORMATION KK74LV14N Plastic KK74LV14D SOIC TA = -40° to 125° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT FUNCTION TABLE Input Output A Y= A L H H L PIN 14 =VCC PIN 7 = GND 1 KK74LV14 MAXIMUM RATINGS* Symbol Value Unit -0.5 ÷ +7.0 V DC input diode current ±20 mA DC output diode current ±50 mA DC output source or sink current -bus driver outputs ±25 mA IGND DC GND current for types with - bus driver outputs ±50 mA ICC DC VCC current for types with - bus driver outputs ±50 mA PD Power dissipation per paskade, plastic DIP+ SOIC package+ 750 500 mW -65 ÷ +150 °C 260 °C VCC IIK* 1 IOK*2 Io* 3 Tstg TL Parameter DC supply voltage (Referenced to GND) Storage temperature Lead temperature, 1.5 mm from Case for 10 seconds (Plastic DIP ), 0.3 mm (SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 12 mW/°C from 70° to 125°C SOIC Package: : - 8 mW/°C from 70° to 125°C *1: VI < -0.5V or VI > VCC+0.5V *2: Vo < -0.5V or Vo > VCC+0.5V *3: -0.5V < Vo < VCC+0.5V RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) TA Operating Temperature, All Package Types tr, tf Input Rise and Fall Time 1.0 V≤VCC <2.0 V 2.0 V≤VCC <2.7 V 2.7 V≤VCC <3.6 V 3.6 V≤VCC ≤5.5 V Min Max Unit 1.0 5.5 V 0 VCC V -40 +125 °C 0 0 0 0 500 200 100 50 ns This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK74LV14 DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Guaranteed Limit Symbol Parameter Test Conditions VCC -40°C ÷ 85°C max 0.95 1.35 1.95 2.15 2.35 3.10 3.80 min 0.4 0.8 1.0 1.2 1.5 1.7 2.1 max 1.0 1.4 2.0 2.2 2.4 3.15 3.85 -40°C ÷ 125°C min max 0.4 1.0 0.8 1.4 1.0 2.0 1.2 2.2 1.5 2.4 1.7 3.15 2.1 3.85 25°C V Unit VIT+ Positive-Going Input Threshold Voltage VO ≥ VOH 1.2 2.0 2.7 3.0 3.6 4.5 5.5 min 0.45 0.85 1.05 1.25 1.55 1.75 2.15 VIT- Negative-Going Input Threshold Voltage VO ≤ VOL 1.2 2.0 2.7 3.0 3.6 4.5 5.5 0.2 0.35 0.45 0.65 0.85 0.95 1.15 0.65 0.85 1.35 1.45 1.75 1.95 1.15 0.15 0.3 0.4 0.6 0.8 0.9 1.1 0.7 0.9 1.4 1.5 1.8 2.0 2.26 0.15 0.3 0.4 0.6 0.8 0.9 1.1 0.7 0.9 1.4 1.5 1.8 2.0 2.26 V VH Hysteresis Voltage VO ≥ VOH 1.2 2.0 2.7 3.0 3.6 4.5 5.5 0.2 0.25 0.35 0.45 0.45 0.45 0.65 0.15 0.3 0.4 0.6 0.8 0.9 1.1 1.2 2.0 2.7 3.0 3.6 4.5 5.5 1.05 1.85 2.55 2.85 3.45 4.35 5.35 1.0 1.8 2.5 2.8 3.4 4.3 5.3 1.0 1.8 2.5 2.8 3.4 4.3 5.3 0.7 0.9 1.4 1.5 1.8 2.0 2.6 - V VI = VIH – or VIL 0.7 0.9 1.4 1.5 1.8 2.0 2.6 - 0.15 0.3 0.4 0.6 0.8 0.9 1.1 High-Level Output Voltage 0.65 0.75 1.05 1.15 1.15 1.35 1.45 - 3.0 2.48 - 2.40 - 2.20 - V 4.5 3.70 - 3.60 - 3.50 - 1.2 2.0 2.7 3.0 3.6 4.5 5.5 - 0.15 0.15 0.15 0.15 0.15 0.15 0.15 - 0.2 0.2 0.2 0.2 0.2 0.2 0.2 - 0.2 0.2 0.2 0.2 0.2 0.2 0.2 VOH VO ≤ VOL IO = -100 µA VOH High-Level Output Voltage VI = VIH – or VIL V V IO = -6.0 mA VI = VIH – or VIL IO = -12.0 mA VOL Low-Level Output Voltage VI = VIH – or VIL IO = 100 µA V 3 KK74LV14 DC ELECTRICAL CHARACTERISTICS (continuation) Guaranteed Limit Symbol VOL Parameter Low-Level Output Voltage Test Conditions VCC -40°C ÷ 85°C 25°C V max 0.33 min - max 0.40 -40°C ÷ 125°C min max 0.50 VI = VIH – or IO = 6.0 mA 3.0 min - VI = VIH – or VIL 4.5 - 0.40 - 0.55 - 0.65 Unit V IO = 12.0 mA µA IIL Low-Level Input Leakage Current VI=0 V 5.5 - -0.1 - -1.0 - -1.0 IIH High-Level Input Leakage Current VI= VСС 5.5 - 0.1 - 1.0 - 1.0 ICC Quiescent Supply Current (per Package) VI=0 В or VСС 5.5 - 4.0 - 20 - 40 µA Additional Quiescent Supply Current on input VI = VСС 0.6V 2.7 3.6 - 0.2 - 0.5 - 0.85 mA ICC1 IO = 0 µA IO = 0 µA . 4 KK74LV14 AC ELECTRICAL CHARACTERISTICS (CL=50 pF, tLH =tHL = 2.5 ns, RL=1 kΩ) Guaranteed Limit Symbol tPLH, tPHL CI Test Conditions Parameter Propagation Delay, Input A to Output Y (Figure 1 ) VCC VI=0 V or V1 tLH = tHL =2.5 ns СL = 50 pF RL = 1 kΩ Input Capacitance CPD VI=0 V or VСС Unit 1.2 2.0 2.7 3.0 4.5 max 150 28 22 17 14 min - max 170 37 28 22 18 5.5 - 7.0 - 7.0 - 7.0 pF 5.5 - 30 - 30 - 30 pF ns tLH V1 0.9 0.9 VX 0.1 -40°C ÷ 125°C min max 200 48 35 28 23 min - tHL Input А -40°C ÷ 85°C 25°C V VX 0.1 tPHL GND tPLH VOH Output Y VY VY VOL VX=0.5 VCC Figure 1. Switching Waveforms VCC VI PULSE GENERATOR VO RT DEVICE UNDER TEST Termination resistance RT – should be equal to ZOUT of pulse generators CL RL Figure 2. Test Circuit 5 KK74LV14 N SUFFIX PLASTIC DIP (MS - 001AA) A Dimension, mm 8 14 B 7 1 Symbol MIN MAX A 18.67 19.69 B 6.1 7.11 5.33 C F L C -T- SEATING PLANE N G M K J H D 0.25 (0.010) M T NOTES: 1. Dimensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. D 0.36 0.56 F 1.14 1.78 G 2.54 H 7.62 J 0° 10° K 2.92 3.81 L 7.62 8.26 M 0.2 0.36 N 0.38 D SUFFIX SOIC (MS - 012AB) Dimension, mm A 14 8 H B 1 G P 7 R x 45 C -TK D SEATING PLANE M Symbol MIN MAX A 8.55 8.75 B 3.8 4 C 1.35 1.75 D 0.33 0.51 F 0.4 1.27 G 1.27 H 5.27 J 0° 8° K 0.1 0.25 1. Dimensions A and B do not include mold flash or protrusion. M 0.19 0.25 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side. P 5.8 6.2 R 0.25 0.5 J 0.25 (0.010) M T C M NOTES: F 6