MX23L8051 8M-BIT [8M x 1] CMOS SERIAL MASK-ROM FEATURES SOFTWARE FEATURES • Input Data Format - 1-byte Command code, 3-byte address, 1-byte byte address GENERAL • 8,338,608 x 1 bit structure • Single Power Supply Operation - 3.0 to 3.6 volt for read operations • Latch-up protected to 100mA from -1V to Vcc +1V HARDWARE FEATURES • SCLK Input - Serial clock input • SI Input - Serial Data Input • SO Output - Serial Data Output • PACKAGE - 28-pin SOP (330mil) PERFORMANCE • High Performance - Fast access time: 20MHz serial clock (50pF + 1TTL Load) • Low Power Consumption - Low active read current: 10mA (typical) at 20MHz - Low standby current: 30uA (CMOS) GENERAL DESCRIPTION The MX23L8051 is a CMOS 8,338,608 bit serial Mask ROM, which is configured as 1,048,576 x 8 internally. The MX23L8051 features a serial peripheral interface and software protocol allowing operation on a simple 3- wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial peripheral interface access to the device is enabled by CS input. The MX23L8051 provide sequential read operation on the whole chip. PIN CONFIGURATIONS PIN DESCRIPTION When the device is not in operation and CS is high, it is put in standby mode and draws less than 30uA DC current. NC NC NC NC NC NC NC NC NC NC NC NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 MX23L8051 28-PIN SOP (330 mil) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 NC GND VCC NC NC NC SI SO CS SCLK NC NC NC NC P/N: PM0838 SYMBOL DESCRIPTION CS Chip Select SI Serial Data Input SO Serial Data Output SCLK Clock Input VCC + 3.3V Power Supply GND Ground NC No Internal Connection REV. 1.1, JUN. 23, 2003 1 MX23L8051 BLOCK DIAGRAM X-Decoder Address Generator Memory Array (2048 x 4096) Page Buffer SI Data Register Y-Decoder CS Sense Amplifier Mode Logic Output Buffer SO SCLK Clock Generator P/N: PM0838 2 REV. 1.1, JUN. 23, 2003 MX23L8051 COMMAND DEFINITION Command Read Array (byte) 1st 52H 2nd AD1 3rd AD2 4th AD3 5th BA 6th X 7th X 8th X 9th X Action n bytes read out until CS goes high Note: 1.X is dummy cycle and is necessary 2.AD1 to AD3 are address input data 3.BA is byte address 1-byte command code Bit7(MSB) Bit6 3-byte address(0 to 0FFFH) AD1: X X AD2: A16 A15 AD3: X X 1-byte byte address(0 to 7FH) BA: X A6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 X A14 X X A13 X X A12 X A19 A11 X A18 A10 A8 A17 A9 A7 A5 A4 A3 A2 A1 A0 P/N: PM0838 3 REV. 1.1, JUN. 23, 2003 MX23L8051 DEVICE OPERATION 1.When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until next CS falling edge. In standby mode, SO pin of this LSI should be High-Z. 2.When correct command is inputted to this LSI, this LSI becomes active mode and keeps the active mode until next CSB rising edge. COMMAND DESCRIPTION (1) Read Array This command is sent with the 4-byte address (command included), and the byte address, followed by four dummy bytes sent to give the device time to stabilize. The device will then send out data starting at the byte address until CS goes high. The clock to clock out the data is supplied by the master serial peripheral interface. (2) Standby Mode When CS is high and there is no operation in progress, the device is put in standby mode. Typical standby current is less than 30uA. DATA SEQUENCE Output data is serially sent out through SO pin, synchronized with the rising edge of SCLK, whereas input data is serially read in through SI pin, synchronized with the rising edge of SCLK. The bit sequence for both input and output data is bit 7 (MSB) first, then bit 6, bit 5, ...., and bit 0.(LSB) ADDRESS SEQUENCE The address assignment is described as follows : BA: Byte address Bit sequence: AD1:First Address Bit sequence: AD2:Second Address Bit sequence: AD3:Thrid Address Bit sequence: X X A16 X A6 X A15 X A5 X A14 X A4 X A13 X P/N: PM0838 4 A3 X A12 X A2 A19 A11 X A1 A18 A10 A8 A0 A17 A9 A7 REV. 1.1, JUN. 23, 2003 MX23L8051 ELECTRICAL SPECIFICATIONS NOTICE: 1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and functional operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability. ABSOLUTE MAXIMUM RATINGS RATING VALUE Ambient Operating Temperature 0° C to 70° C Storage Temperature -55° C to 125° C Applied Input Voltage -0.5V to 4.6V Applied Output Voltage -0.5V to 4.6V VCC to Ground Potential -0.5V to 4.6V 2.Specifications contained within the following tables are subject to change. 3.During voltage transitions, all pins may overshoot to 4.6V or -0.5V for period up to 20ns. 4.All input and output pins may overshoot to VCC+0.5V while VCC+0.5V is smaller than or equal to 4.6V. Maximum Positive Overshoot Waveform Maximum Negative Overshoot Waveform 20ns 4.6V 0V 3.6V -0.5V 20ns CAPACITANCE TA = 25° C, f = 1.0 MHz SYMBOL PARAMETER CIN COUT MIN. MAX. UNIT CONDITIONS Input Capacitance 10 pF VIN = 0V Output Capacitance 10 pF VOUT = 0V P/N: PM0838 5 TYP REV. 1.1, JUN. 23, 2003 MX23L8051 INPUT TEST WAVEFORMS AND MEASURESMENT LEVEL 3.0V AC 1.5V Measurement Level 0V Note:Input pulse rise and fall time are < 10ns OUTPUT LOADING DEVICE UNDER TEST +3.3V CL DIODES=IN3064 OR EQUIVALENT CL=50pF Including jig capacitance P/N: PM0838 6 REV. 1.1, JUN. 23, 2003 MX23L8051 DC CHARACTERISTICS (Temperature = 0° C to 70° C, VCC = 3.0V ~ 3.6V) SYMBOL PARAMETER NOTES MIN. IIL 1 Input Load TYP MAX. UNITS TEST CONDITIONS ±10 uA VCC = VCC Max Current ILO Output Leakage VIN = VCC or GND ±10 1 uA Current ISB1 VCC Standby VIN = VCC or GND 1 30 uA VCC Standby 1 3 mA Current (TTL) ICC1 VCC Read VIL Input Low Voltage VIH Input High Voltage VOL Output Low Voltage VOH Output High Voltage VCC = VCC Max CS = VCC ± 0.2V Current (CMOS) ISB2 VCC = VCC Max VCC = VCC Max CS = VIH 1 10 30 mA -0.5 0.8 V 2.0 VCC+0.5 V 0.4 V IOL = 500uA V IOH = -100uA 2.4 f=20MHz NOTES: 1. All currents are in RMS unless otherwise noted. Typical values at VCC = 3.3V, T = 25° C. These currents are valid for all product versions (package and speeds). 2. Typical value is calculated by simulation. P/N: PM0838 7 REV. 1.1, JUN. 23, 2003 MX23L8051 AC CHARACTERISTICS (Temperature = 0° C to 70° C, VCC = 3.0V ~ 3.6V) SYMBOL PARAMETER Min. Typ. Max. Units fSCLK Clock Frequency 20 MHz tCYC Clock Cycle Time 50 ns tSKH Clock High Time 25 ns tSKL Clock Low Time 25 ns tR Clock Rise Time 6 ns tF Clock Fall Time 6 ns tCSA CS Lead Clock Time 50 ns tCSB CS Lag Clock Time 50 ns tCSH CS High Time 100 ns tDS SI Setup Time 5 ns tDH SI Hold Time 25 ns tAA Access Time tDOH SO Hold Time 5 tDOZ SO Floating Time 0 30 Conditions ns ns 20 ns NOTES: 1. Typical value is calculated by simulation. SERIAL DATA INPUT/OUTPUT TIMING tCSB tCSH tCSA CS tR tCYC tF SCLK tSKH SI BIT 7 tDS tSKL BIT 6 BIT 0 tDH BIT 7 SO tAA BIT 0 tDOH tDOZ P/N: PM0838 8 REV. 1.1, JUN. 23, 2003 MX23L8051 STANDBY TIMING WAVEFORM CS SCLK SI SO Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Hi-Z 1st byte When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until next CS falling edge. In standby mode, SO pin of this LSI should be High-Z. While CS=VIH, current=standby current, while CS=VIL and commands are issuing, or commands are invalid, current=5mA(typ.) to 15mA(max.). P/N: PM0838 9 REV. 1.1, JUN. 23, 2003 MX23L8051 READ ARRAY TIMING WAVEFORM CS SCLK SI Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 Hi-Z SO 1st byte (52h) 2nd byte (AD1) Hi-Z CS SCLK SI Bit 1 Bit 0 SO Bit 7 Bit 6 9th byte (Dummy) Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 1st data output byte Bit 7 Bit 6 Bit 5 2nd data output byte Hi-Z CS SCLK SI SO Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 (N-1)th data output byte Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Hi-Z Nth data output byte NOTES: 1. 1st Byte='52h' 2. 2nd Byte=Address 1(AD1), A17=BIT 0, A18=BIT1, A19=BIT2. 3. 3rd Byte=Address 2(AD2), A9=BIT0, A10=BIT1,......A16=BIT7 4. 4th Byte=Address 3(AD3), A7=BIT0, A8=BIT1 5. 5th Byte=Byte Address(BA), A0=BIT0, A1=BIT1,......A6=BIT6 6. 6th-9th Bytes for SI ==> Dummy Bytes (Don't care) 7. From Byte 10, SO Would Output Array Data P/N: PM0838 10 REV. 1.1, JUN. 23, 2003 MX23L8051 PACKAGE IMFORMATION P/N: PM0838 11 REV. 1.1, JUN. 23, 2003 MX23L8051 REVISION HISTORY Revision No. Description 1.0 1. Low standby current: 8uA(typical) --> 30uA 2. From Advance Information to Formal Version 1.1 1. Modify Package Information P/N: PM0838 12 Page P1,4,7 Date AUG/26/2002 P11 JUN/23/2003 REV. 1.1, JUN. 23, 2003 MX23L8051 MACRONIX INTERNATIONAL CO., LTD. Headquarters: TEL:+886-3-578-6688 FAX:+886-3-563-2888 Europe Office : TEL:+32-2-456-8020 FAX:+32-2-456-8021 Hong Kong Office : TEL:+86-755-834-335-79 FAX:+86-755-834-380-78 Japan Office : Kawasaki Office : TEL:+81-44-246-9100 FAX:+81-44-246-9105 Osaka Office : TEL:+81-6-4807-5460 FAX:+81-6-4807-5461 Singapore Office : TEL:+65-6346-5505 FAX:+65-6348-8096 Taipei Office : TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 MACRONIX AMERICA, INC. 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