General Description The ’F132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have a greater noise margin than conventional NAND gates. Each circuit contains a 2-input Schmitt trigger followed by level shifting circuitry and a standard FAST ® output structure. The Schmitt trigger uses positive feedback to effectively speed-up slow input transitions, and provide different input Ordering Code: threshold voltages for positive and negative-going transitions. This hysteresis between the positive-going and negative-going input threshold (typically 800 mV) is determined by resistor ratios and is essentially insensitive to temperature and supply voltage variations. Features n Guaranteed 4000V minimum ESD protection n Standard Military Drawing (SMD) n 5962-89487 See Section 0 Commercial Military Package Package Description Number 74F132PC N14A 14-Lead (0.300" Wide) Molded Dual-In-Line J14A 14-Lead Ceramic Dual-In-Line 74F132SC (Note 1) M14A 14-Lead (0.150" Wide) Molded Small Outline, JEDEC 74F132SJ (Note 1) M14D 14-Lead (0.300" Wide) Molded Small Outline, EIAJ 54F132FM (Note 2) W14B 14-Lead Cerpack 54F132LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C 54F132DM (Note 2) 54F/74F132 54F/74F132 Quad 2-Input NAND Schmitt Trigger 54F/74F132 Quad 2-Input NAND Schmitt Trigger November 1994 DSXXX Note 1: Devices also available in 13" reel. Use suffix = SCX and SJX. Note 2: Military grade device with environmental and burn-in processing. Use suffix = DMQB, FMQB and LMQB. Logic Symbol IEEE/IEC DS009477-3 TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1997 National Semiconductor Corporation www.national.com DS009477 PrintDate=1997/08/28 PrintTime=12:25:28 10193 ds009477 Rev. No. 1 cmserv Proof 1 1 Connection Diagrams Pin Assignment for DIP, SOIC and Flatpak Pin Assignment for LCC DS009477-1 DS009477-2 Unit Loading/Fan Out See Section 0 for U.L. definitions DSXXX 54F/74F Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL An, Bn Inputs 1.0/1.0 20 µA/−0.6 mA On Outputs 50/33.3 −1 mA/20 mA Function Table Inputs Outputs A B O L L H L H H H L H H H L H = HIGH Voltage Level L = LOW Voltage Level www.national.com 2 PrintDate=1997/08/28 PrintTime=12:25:31 10193 ds009477 Rev. No. 1 cmserv Proof 2 Absolute Maximum Ratings Current Applied to Output in LOW State (Max) ESD Last Passing Voltage (Min) (Note 3) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Plastic VCC Pin Potential to Ground Pin Input Voltage (Note 4) Input Current (Note 4) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output TRI-STATE ® Output −65˚C −55˚C −55˚C −55˚C to to to to twice the rated IOL (mA) 4000V Recommended Operating Conditions +150˚C +125˚C +175˚C +150˚C Free Air Ambient Temperature Military Commercial Supply Voltage Military Commercial −0.5V to +7.0V −0.5V to +7.0V −30 mA to +5.0 mA −55˚C to +125˚C 0˚C to +70˚C +4.5V to +5.5V +4.5V to +5.5V Note 3: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. −0.5V to VCC −0.5V to +5.5V Note 4: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol Parameter 54F/74F Min Typ Units VCC 5.0 Conditions Max VT+ Positive-going Threshold 1.5 2.0 V VT− Negative-going Threshold 0.7 1.1 V 5.0 ∆VT Hysteresis (VT+ − VT−) 0.4 V 5.0 VCD Input Clamp Diode Voltage V Min VOH Output HIGH V Min V Min IOH = −1 mA IOL = 20 mA IOL = 20 mA µA Max VIN = 2.7V µA Max VIN = 7.0V µA Max VOUT = VCC V 0.0 IID = 1.9 µA Voltage VOL IIH IBVI ICEX VID −1.2 54F 10% VCC 2.5 74F 10% VCC 2.5 74F 5% VCC 2.7 Output LOW 54F 10% VCC 0.5 Voltage 74F 10% VCC 0.5 Input HIGH 54F 20.0 Current 74F 5.0 Input HIGH Current 54F 100 Breakdown Test 74F 7.0 Output HIGH 54F 250 Leakage Current 74F 50 Input Leakage 74F 4.75 Test IOD Output Leakage 74F 3.75 µA 0.0 All Other Pins Grounded VIOD = 150 mV −0.6 mA Max All Other Pins Grounded VIN = 0.5V Circuit Current IIL Input LOW Current IOS Output Short-Circuit Current −150 mA Max ICCH Power Supply Current 17.0 mA Max ICCL Power Supply Current 18.0 mA Max −60 IIN = −18 mA IOH = −1 mA IOH = −1 mA 3 PrintDate=1997/08/28 PrintTime=12:25:38 10193 ds009477 Rev. No. 1 VOUT = 0V VO = HIGH VO = LOW www.national.com cmserv Proof 3 AC Electrical Characteristics See Section 0 for Waveforms and Load Configurations Symbol DSXXX 74F TA = +25˚C VCC = +5.0V Parameter 54F TA, VCC = Mil CL = 50 pF 74F TA, VCC = Com CL = 50 pF Fig. Units No. CL = 50 pF Max Min Max Min tPLH Propagation Delay Min 4.0 Typ 10.5 2.0 13.0 3.5 Max 12.0 tPHL An, Bn to On 5.0 12.5 4.5 16.0 5.0 13.0 ns kk-kk DSXXX Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: Book Extract End DS009477-5 www.national.com 4 PrintDate=1997/08/28 PrintTime=12:25:40 10193 ds009477 Rev. No. 1 cmserv Proof 4 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Ceramic Leadless Chip Carrier (L) NS Package Number E20A 14-Lead Ceramic Dual-In-Line Package (D) NS Package Number J14A 5 PrintDate=1997/08/28 PrintTime=12:25:42 10193 ds009477 Rev. No. 1 www.national.com cmserv Proof 5 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead (0.150" Wide) Molded Small Outline Package, JEDEC (S) NS Package Number M14A 14-Lead (0.300" Wide) Molded Small Outline Package, EIAJ (SJ) NS Package Number M14D www.national.com 6 PrintDate=1997/08/28 PrintTime=12:25:43 10193 ds009477 Rev. No. 1 cmserv Proof 6 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead (0.300" Wide) (Molded Dual-In-Line Package (P) NS Package Number N14A 14-Lead Ceramic Flatpak (F) NS Package Number W14B 7 PrintDate=1997/08/28 PrintTime=12:25:43 10193 ds009477 Rev. No. 1 www.national.com cmserv Proof 7 54F/74F132 Quad 2-Input NAND Schmitt Trigger LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: [email protected] www.national.com 8 National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductor Japan Ltd. Tel: 81-3-5620-6175 Fax: 81-3-5620-6179 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. PrintDate=1997/08/28 PrintTime=12:25:44 10193 ds009477 Rev. No. 1 cmserv Proof 8