LM3224 615kHz/1.25MHz Step-up PWM DC/DC Converter General Description Features The LM3224 is a step-up DC/DC converter with a 0.15Ω (typ.), 2.45A (typ.) internal switch and pin selectable operating frequency. With the ability to convert 3.3V to multiple outputs of 8V, -8V, and 23V, the LM3224 is an ideal part for biasing TFT displays. With the high current switch it is also ideal for driving high current white LEDs for flash applications. The LM3224 can be operated at switching frequencies of 615kHz and 1.25MHz allowing for easy filtering and low noise. An external compensation pin gives the user flexibility in setting frequency compensation, which makes possible the use of small, low ESR ceramic capacitors at the output. An external soft-start pin allows the user to control the amount of inrush current during start up. The LM3224 is available in a low profile 8-lead MSOP package. n n n n n Operating voltage range of 2.7V to 7V 615kHz/1.25MHz pin selectable frequency operation Over temperature protection Optional soft-start function 8-Lead MSOP package Applications n n n n n n TFT Bias Supplies Handheld Devices Portable Applications GSM/CDMA Phones Digital Cameras White LED Flash/Torch Applications Typical Application Circuit 20097631 © 2005 National Semiconductor Corporation DS200976 www.national.com LM3224 615kHz/1.25MHz Step-up PWM DC/DC Converter September 2005 LM3224 Connection Diagram Top View 20097604 8-Lead Plastic MSOP NS Package Number MUA08A Ordering Information Order Number Spec. Package Type NSC Package Drawing Supplied As Package Top Mark LM3224MM-ADJ MSOP-8 MUA08A 1000 Units, Tape and Reel SEKB LM3224MMX-ADJ MSOP-8 MUA08A 3500 Units, Tape and Reel SEKB LM3224MM-ADJ NOPB MSOP-8 MUA08A 1000 Units, Tape and Reel SEKB LM3224MMX-ADJ NOPB MSOP-8 MUA08A 3500 Units, Tape and Reel SEKB Pin Descriptions Pin Name Function 1 VC Compensation network connection. Connected to the output of the voltage error amplifier. 2 FB Output voltage feedback input. 3 SHDN 4 GND 5 SW Power switch input. Switch connected between SW pin and GND pin. 6 VIN Analog power input. 7 FSLCT 8 SS www.national.com Shutdown control input, active low. This pin has an internal pulldown resistor so the default condition is off. The pin must be pulled high to turn on the device. Analog and power ground. Switching frequency select input. VIN = 1.25MHz. Ground = 615kHz. Soft-start Pin. 2 LM3224 Block Diagram 20097603 inductor current then flows through the schottky diode to the load and output capacitor, cycle 2 of Figure 1 (b). The NMOS power device is then set by the oscillator at the end of the period and current flows through the NMOS power device once again. The LM3224 has dedicated protection circuitry running during normal operation to protect the IC. The Thermal Shutdown circuitry turns off the NMOS power device when the die temperature reaches excessive levels. The UVP comparator protects the NMOS power device during supply power startup and shutdown to prevent operation at voltages less than the minimum input voltage. The OVP comparator is used to prevent the output voltage from rising at no loads allowing full PWM operation over all load conditions. The LM3224 also features a shutdown mode decreasing the supply current to 0.1µA (typ.). General Description The LM3224 utilizes a PWM control scheme to regulate the output voltage over all load conditions. The operation can best be understood referring to the block diagram and Figure 1 of the Operation section. At the start of each cycle, the oscillator sets the driver logic and turns on the NMOS power device conducting current through the inductor, cycle 1 of Figure 1 (a). During this cycle, the voltage at the VC pin controls the peak inductor current. The VC voltage will increase with larger loads and decrease with smaller. This voltage is compared with the summation of the SW voltage and the ramp compensation. The ramp compensation is used in PWM architectures to eliminate the sub-harmonic oscillations that occur during duty cycles greater than 50%. Once the summation of the ramp compensation and switch voltage equals the VC voltage, the PWM comparator resets the driver logic turning off the NMOS power device. The 3 www.national.com LM3224 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Vapor Phase (60 sec.) 215˚C Infrared (15 sec.) 220˚C ESD Susceptibility (Note 5) VIN 7.5V Human Body Model SW Voltage 21V Machine Model FB Voltage (Note 2) 7V VC Voltage (Note 3) 1.26V ± 0.3V SHDN Voltage 7.5V FSLCT 7.5V Maximum Junction Temperature Operating Conditions 150˚C Power Dissipation(Note 4) Operating Junction Temperature Range (Note 6) −40˚C to +125˚C Storage Temperature −65˚C to +150˚C Supply Voltage Internally Limited Lead Temperature 2kV 200V 2.7V to 7V Maximum Output Voltage 300˚C 20V Electrical Characteristics Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40˚C to +125˚C). VIN = 2.7V, FSLCT = SHDN = VIN, and IL = 0A, unless otherwise specified. Symbol Parameter IQ Quiescent Current VFB Feedback Voltage ICL(Note 8) Switch Current Limit Conditions Min (Note 6) FB = 2V (Not Switching) VSHDN = 0V VIN = 2.7V (Note 9) Typ (Note 7) Max (Note 6) Units 1.3 2.0 mA 0.1 2.0 µA 1.2285 1.26 1.2915 V 1.9 2.45 2.8 VIN = 3V, VOUT = 8V 2.1 VIN = 3V, VOUT = 5V 2.2 2.7V ≤ VIN ≤ 7V %VFB/∆VIN Feedback Voltage Line Regulation IB FB Pin Bias Current (Note 10) ISS SS Pin Current 7.5 VSS SS Pin Voltage 1.2090 VIN Input Voltage Range 2.7 40 gm Error Amp Transconductance ∆I = 5µA AV Error Amp Voltage Gain DMAX Maximum Duty Cycle fS Switching Frequency ISHDN Shutdown Pin Current VSHDN = 2.7V VSHDN = 0.3V A 0.085 0.15 %/V 35 250 nA 11 13 µA 1.2430 1.2622 87 7 V 135 µmho 78 V/V 85 92.5 FSLCT = Ground 450 615 750 kHz % FSLCT = VIN 0.9 1.25 1.5 MHz 2.4 5.0 µA 0.3 1.2 IL Switch Leakage Current VSW = 20V 0.2 8.0 µA RDSON Switch RDSON VIN = 2.7V, ISW = 1A 0.15 0.4 Ω ThSHDN Shutdown Threshold Output High UVP On Threshold 1.2 Output Low 0.8 0.8 2.3 Off Threshold V 0.3 2.5 2.6 V V 2.7 V Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The FB pin should never exceed VIN. Note 3: Under normal operation the VC pin may go to voltages above this value. This maximum rating is for the possibility of a voltage being applied to the pin, however the VC pin should never have a voltage directly applied to it. Note 4: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. www.national.com 4 (Continued) Note 5: The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Note 6: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Note 7: Typical numbers are at 25˚C and represent the most likely norm. Note 8: Duty cycle affects current limit due to ramp generator. Note 9: Current limit at 0% duty cycle. See TYPICAL PERFORMANCE section for Switch Current Limit vs. VIN Note 10: Bias current flows into FB pin. Typical Performance Characteristics SHDN Pin Current vs. SHDN Pin Voltage SS Pin Current vs. Temperature 20097616 20097617 FSLCT Pin Current vs. FSLCT Pin Voltage FB Pin Current vs. Temperature 20097619 20097618 5 www.national.com LM3224 Electrical Characteristics LM3224 Typical Performance Characteristics (Continued) NMOS RDSON vs. Input Voltage 615kHz Non-switching IQ vs. Input Voltage 20097620 20097621 1.25MHz Non-switching IQ vs. Input Voltage 615kHz Switching IQ vs. Input Voltage 20097622 20097623 1.25MHz Switching IQ vs. Input Voltage 615kHz Switching IQ vs. Temperature 20097624 www.national.com 20097625 6 (Continued) 1.25MHz Switching IQ vs. Temperature 615kHz Switching Frequency vs. Temperature 20097626 20097627 1.25MHz Switching Frequency vs. Temperature 615kHz Maximum Duty Cycle vs. Temperature 20097628 20097629 1.25MHz Maximum Duty Cycle vs. Temperature Switch Current Limit vs. VIN 20097651 20097660 7 www.national.com LM3224 Typical Performance Characteristics LM3224 Typical Performance Characteristics (Continued) Switch Current Limit vs. Temperature Switch Current Limit vs. Temperature 20097662 20097652 1.25MHz Efficiency vs. Load Current 20097653 www.national.com 8 LM3224 Operation 20097602 FIGURE 1. Simplified Boost Converter Diagram (a) First Cycle of Operation (b) Second Cycle Of Operation CONTINUOUS CONDUCTION MODE The LM3224 is a current-mode, PWM boost regulator. A boost regulator steps the input voltage up to a higher output voltage. In continuous conduction mode (when the inductor current never reaches zero at steady state), the boost regulator operates in two cycles. In the first cycle of operation, shown in Figure 1 (a), the transistor is closed and the diode is reverse biased. Energy is collected in the inductor and the load current is supplied by COUT. The second cycle is shown in Figure 1 (b). During this cycle, the transistor is open and the diode is forward biased. The energy stored in the inductor is transferred to the load and output capacitor. The ratio of these two cycles determines the output voltage. The output voltage is defined approximately as: SOFT-START CAPACITOR The LM3224 has a soft-start pin that can be used to limit the inductor inrush current on start-up. The external SS pin is used to tailor the soft-start for a specific application but is not required for all applications and can be left open when not needed. When used, a current source charges the external soft-start capacitor, Css. The soft-start time can be estimated as: Tss = Css*1.24V/Iss THERMAL SHUTDOWN The LM3224 includes thermal shutdown protection. If the die temperature exceeds 140˚C the regulator will shut off the power switch, significantly reducing power dissipation in the device. The switch will remain off until the die temperature is reduced to approximately 120˚C. If the cause of the excess heating is not removed (excessive ambient temperature, excessive power dissipation, or both) the device will continue to cycle on and off in this manner to protect from damage. where D is the duty cycle of the switch, D and D' will be required for design calculations. SETTING THE OUTPUT VOLTAGE The output voltage is set using the feedback pin and a resistor divider connected to the output as shown in the typical operating circuit. The feedback pin voltage is 1.26V, so the ratio of the feedback resistors sets the output voltage according to the following equation: 9 www.national.com LM3224 Operation Output Capacitor ESR Compensation) and 680pF ≤ CC ≤ 10nF. Refer to the Applications Information section for recommended values for specific circuits and conditions. Refer to the Compensation section for other design requirement. (Continued) INTRODUCTION TO COMPENSATION COMPENSATION This section will present a general design procedure to help insure a stable and operational circuit. The designs in this datasheet are optimized for particular requirements. If different conversions are required, some of the components may need to be changed to ensure stability. Below is a set of general guidelines in designing a stable circuit for continuous conduction operation, in most all cases this will provide for stability during discontinuous operation as well. The power components and their effects will be determined first, then the compensation components will be chosen to produce stability. INDUCTOR AND DIODE SELECTION Although the inductor sizes mentioned earlier are fine for most applications, a more exact value can be calculated. To ensure stability at duty cycles above 50%, the inductor must have some minimum value determined by the minimum input voltage and the maximum output voltage. This equation is: 20097605 FIGURE 2. (a) Inductor current. (b) Diode current. The LM3224 is a current mode PWM boost converter. The signal flow of this control scheme has two feedback loops, one that senses switch current and one that senses output voltage. To keep a current programmed control converter stable above duty cycles of 50%, the inductor must meet certain criteria. The inductor, along with input and output voltage, will determine the slope of the current through the inductor (see Figure 2 (a)). If the slope of the inductor current is too great, the circuit will be unstable above duty cycles of 50%. A 10µH to 15µH inductor is recommended for most 615 kHz applications, while a 4.7µH to 10µH inductor may be used for most 1.25 MHz applications. If the duty cycle is approaching the maximum of 85%, it may be necessary to increase the inductance by as much as 2X. See Inductor and Diode Selection for more detailed inductor sizing. The LM3224 provides a compensation pin (VC) to customize the voltage loop feedback. It is recommended that a series combination of RC and CC be used for the compensation network, as shown in the typical application circuit. For any given application, there exists a unique combination of RC and CC that will optimize the performance of the LM3224 circuit in terms of its transient response. The series combination of RC and CC introduces a pole-zero pair according to the following equations: where fs is the switching frequency, D is the duty cycle, and RDSON is the ON resistance of the internal switch taken from the graph "NMOS RDSON vs. Input Voltage" in the Typical Performance Characteristics section. This equation is only good for duty cycles greater than 50% (D > 0.5), for duty cycles less than 50% the recommended values may be used. The corresponding inductor current ripple as shown in Figure 2 (a) is given by: The inductor ripple current is important for a few reasons. One reason is because the peak switch current will be the average inductor current (input current or ILOAD/D’) plus ∆iL. As a side note, discontinuous operation occurs when the inductor current falls to zero during a switching cycle, or ∆iL is greater than the average inductor current. Therefore, continuous conduction mode occurs when ∆iL is less than the average inductor current. Care must be taken to make sure that the switch will not reach its current limit during normal operation. The inductor must also be sized accordingly. It should have a saturation current rating higher than the peak inductor current expected. The output voltage ripple is also affected by the total ripple current. The output diode for a boost regulator must be chosen correctly depending on the output voltage and the output current. The typical current waveform for the diode in continuous conduction mode is shown in Figure 2 (b). The diode must be rated for a reverse voltage equal to or greater than the output voltage used. The average current rating must be greater than the maximum load current expected, and the peak current rating must be greater than the peak inductor current. During short circuit testing, or if short circuit conditions are possible in the application, the diode current rating where RO is the output impedance of the error amplifier, approximately 900kΩ. For most applications, performance can be optimized by choosing values within the range 5kΩ ≤ RC ≤ 100kΩ (RC can be up to 200kΩ if CC2 is used, see High www.national.com 10 source output. The size will generally need to be larger for applications where the regulator is supplying nearly the maximum rated output or if large load steps are expected. A minimum value of 10µF should be used for the less stressful condtions while a 22µF to 47µF capacitor may be required for higher power and dynamic loads. Larger values and/or lower ESR may be needed if the application requires very low ripple on the input source voltage. The choice of output capacitors is also somewhat arbitrary and depends on the design requirements for output voltage ripple. It is recommended that low ESR (Equivalent Series Resistance, denoted RESR) capacitors be used such as ceramic, polymer electrolytic, or low ESR tantalum. Higher ESR capacitors may be used but will require more compensation which will be explained later on in the section. The ESR is also important because it determines the peak to peak output voltage ripple according to the approximate equation: ∆VOUT ) 2∆iLRESR (in Volts) (Continued) must exceed the switch current limit. Using Schottky diodes with lower forward voltage drop will decrease power dissipation and increase efficiency. DC GAIN AND OPEN-LOOP GAIN Since the control stage of the converter forms a complete feedback loop with the power components, it forms a closedloop system that must be stabilized to avoid positive feedback and instability. A value for open-loop DC gain will be required, from which you can calculate, or place, poles and zeros to determine the crossover frequency and the phase margin. A high phase margin (greater than 45˚) is desired for the best stability and transient response. For the purpose of stabilizing the LM3224, choosing a crossover point well below where the right half plane zero is located will ensure sufficient phase margin. To ensure a bandwidth of 1⁄2 or less of the frequency of the RHP zero, calculate the open-loop DC gain, ADC. After this value is known, you can calculate the crossover visually by placing a −20dB/decade slope at each pole, and a +20dB/ decade slope for each zero. The point at which the gain plot crosses unity gain, or 0dB, is the crossover frequency. If the crossover frequency is less than 1⁄2 the RHP zero, the phase margin should be high enough for stability. The phase margin can also be improved by adding CC2 as discussed later in this section. The equation for ADC is given below with additional equations required for the calculation: A minimum value of 10µF is recommended and may be increased to a larger value. After choosing the output capacitor you can determine a pole-zero pair introduced into the control loop by the following equations: Where RL is the minimum load resistance corresponding to the maximum load current. The zero created by the ESR of the output capacitor is generally very high frequency if the ESR is small. If low ESR capacitors are used it can be neglected. If higher ESR capacitors are used see the High Output Capacitor ESR Compensation section. Some suitable capacitor vendors include Vishay, Taiyo-Yuden, and TDK. RIGHT HALF PLANE ZERO A current mode control boost regulator has an inherent right half plane zero (RHP zero). This zero has the effect of a zero in the gain plot, causing an imposed +20dB/decade on the rolloff, but has the effect of a pole in the phase, subtracting another 90˚ in the phase plot. This can cause undesirable effects if the control loop is influenced by this zero. To ensure the RHP zero does not cause instability issues, the control loop should be designed to have a bandwidth of less than 1⁄2 the frequency of the RHP zero. This zero occurs at a frequency of: mc ) 0.072fs (in V/s) where RL is the minimum load resistance, VIN is the minimum input voltage, gm is the error amplifier transconductance found in the Electrical Characteristics table, and RDSON is the value chosen from the graph "NMOS RDSON vs. Input Voltage" in the Typical Performance Characteristics section. where ILOAD is the maximum load current. INPUT AND OUTPUT CAPACITOR SELECTION The switching action of a boost regulator causes a triangular voltage waveform at the input. A capacitor is required to reduce the input ripple and noise for proper operation of the regulator. The size used is dependant on the application and board layout. If the regulator will be loaded uniformly, with very little load changes, and at lower current outputs, the input capacitor size can often be reduced. The size can also be reduced if the input of the regulator is very close to the SELECTING THE COMPENSATION COMPONENTS The first step in selecting the compensation components RC and CC is to set a dominant low frequency pole in the control loop. Simply choose values for RC and CC within the ranges given in the Introduction to Compensation section to set this pole in the area of 10Hz to 500Hz. The frequency of the pole created is determined by the equation: 11 www.national.com LM3224 Operation LM3224 Operation changed a little more to optimize performance if desired. This is best done in the lab on a bench, checking the load step response with different values until the ringing and overshoot on the output voltage at the edge of the load steps is minimal. This should produce a stable, high performance circuit. For improved transient response, higher values of RC should be chosen. This will improve the overall bandwidth which makes the regulator respond more quickly to transients. If more detail is required, or the most optimum performance is desired, refer to a more in depth discussion of compensating current mode DC/DC switching regulators. (Continued) where RO is the output impedance of the error amplifier, approximately 900kΩ. Since RC is generally much less than RO, it does not have much effect on the above equation and can be neglected until a value is chosen to set the zero fZC. fZC is created to cancel out the pole created by the output capacitor, fP1. The output capacitor pole will shift with different load currents as shown by the equation, so setting the zero is not exact. Determine the range of fP1 over the expected loads and then set the zero fZC to a point approximately in the middle. The frequency of this zero is determined by: POWER DISSIPATION The output power of the LM3224 is limited by its maximum power dissipation. The maximum power dissipation is determined by the formula PD = (Tjmax - TA)/θJA where Tjmax is the maximum specidfied junction temperature (125˚C), TA is the ambient temperature, and θJA is the thermal resistance of the package. Now RC can be chosen with the selected value for CC. Check to make sure that the pole fPC is still in the 10Hz to 500Hz range, change each value slightly if needed to ensure both component values are in the recommended range. LAYOUT CONSIDERATIONS The input bypass capacitor CIN, as shown in the typical operating circuit, must be placed close to the IC. This will reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 100nF bypass capacitor can be placed in parallel with CIN, close to the VIN pin, to shunt any high frequency noise to ground. The output capacitor, COUT, should also be placed close to the IC. Any copper trace connections for the COUT capacitor can increase the series resistance, which directly effects output voltage ripple. The feedback network, resistors RFB1 and RFB2, should be kept close to the FB pin, and away from the inductor, to minimize copper trace connections that can inject noise into the system. Trace connections made to the inductor and schottky diode should be minimized to reduce power dissipation and increase overall efficiency. For more detail on switching power supply layout considerations see Application Note AN-1149: Layout Guidelines for Switching Power Supplies. HIGH OUTPUT CAPACITOR ESR COMPENSATION When using an output capacitor with a high ESR value, or just to improve the overall phase margin of the control loop, another pole may be introduced to cancel the zero created by the ESR. This is accomplished by adding another capacitor, CC2, directly from the compensation pin VC to ground, in parallel with the series combination of RC and CC. The pole should be placed at the same frequency as fZ1, the ESR zero. The equation for this pole follows: To ensure this equation is valid, and that CC2 can be used without negatively impacting the effects of RC and CC, fPC2 must be greater than 10fZC. CHECKING THE DESIGN With all the poles and zeros calculated the crossover frequency can be checked as described in the section DC Gain and Open-loop Gain. The compensation values can be www.national.com 12 LM3224 Application Information 20097608 FIGURE 3. Triple Output TFT Bias (615 kHz operation) TRIPLE OUTPUT TFT BIAS The circuit in Figure 3 shows how the LM3224 can be configured to provide outputs of 8V, −8V, and 23V, convenient for biasing TFT displays. The 8V output is regulated, while the −8V and 23V outputs are unregulated. The 8V output is generated by a typical boost topology. The basic operation of the boost converter is described in the OPERATION section. The output voltage is set with RFB1 and RFB2 by: C1 charges to 8V minus a diode drop ()0.4V if using a Schottky). When the transistor opens in the first cycle, D3 conducts and C1’s polarity is reversed with respect to the output at C2, producing -8V. The 23V output is realized with a series of capacitor charge pumps. It consists of four stages: the first stage includes C4, D4, and the LM3224 switch; the second stage uses C5, D5, and D1; the third stage includes C6, D6, and the LM3224 switch; the final stage is C7 and D7. In the first stage, C4 charges to 8V when the LM3224 switch is closed, which causes D5 to conduct when the switch is open. In the second stage, the voltage across C5 is VC4 + VD1 - VD5 = VC4 ) 8V when the switch is open. However, because C5 is referenced to the 8V output, the voltage at C5 is 16V when referenced to ground. In the third stage, the 16V at C5 appears across C6 when the switch is closed. When the switch opens, C6 is referenced to the 8V output minus a diode drop, which raises the voltage at C6 with respect to ground to about 24V. Hence, in the fourth stage, C7 is charged to 24V when the switch is open. From the first stage The compensation network of RC and CC are chosen to optimally stabilize the converter. The inductor also affects the stability. When operating at 615 kHz, a 10uH inductor is recommended to insure the converter is stable at duty cycles greater than 50%. Refer to the COMPENSATION section for more information. The -8V output is derived from a diode inverter. During the second cycle, when the transistor is open, D2 conducts and 13 www.national.com LM3224 Application Information voltage closer to 24 - 3xVDIODE (about 22.8V if a 0.4V forward drop is assumed). (Continued) to the last, there are three diode drops that make the output 20097649 FIGURE 4. PWM White LED Flash/Torch Driver 20097650 FIGURE 5. Continuously Operating White LED Flash/Torch Driver www.national.com 14 flash enable FET is turned on to increase the current for the amount of time desired. The minimum guaranteed maximum output current for this circuit is the same as for Figure 4. (Continued) The LM3224 can be configured to drive high current white LEDs for the flash and torch functions of a digital camera, camera phone, or any other similar light source. The flash/ torch can be set up with the circuit in Figure 4 by using the resistor RSET to determine the amount of current that will flow through the LED using the equation: ILED = VFB/RSET If the flash and torch modes will both be used the resistor RSET can be chosen for the higher current flash value. To flash the circuit pull the SHDN high for the time duration needed for the flash. To enable a lower current torch mode a PWM signal can be applied to the SHDN pin. The torch current would then be approximately the percent ON time of the PWM signal multiplied by the flash (or maximum) current. The optional disconnect FET can be used to eliminate leakage current through the LEDs when the part is off and also to disconnect the LED when the input voltage exceeds the forward voltage drop of the LED. The maximum output current the LM3224 can supply in this configuration is shown in Table 1. Figure 5 is another method of driving a high current white LED. This circuit has a higher component count but allows the switcher to remain on continuously for torch mode reducing stress on the supply. The two FETs also double for a disconnect function as described above. In this circuit the device and the torch enable FET are turned on setting a lower current through the LED. When flash is needed the TABLE 1. Maximum LED Drive current (FSW=1.25MHz, L=4.7µH, LED VFMAX=4V (VOUT=5.26V) VIN LED Drive Current (mA) 4.2 1077 4.1 1047 4.0 1017 3.9 987 3.8 958 3.7 929 3.6 900 3.5 871 3.4 842 3.3 814 3.2 785 3.1 757 3.0 729 2.9 701 2.8 673 2.7 646 Some Recommended Inductors (Others May Be Used) Manufacturer Inductor Contact Information Coilcraft DO3316 and DT3316 series www.coilcraft.com 800-3222645 TDK SLF10145 series www.component.tdk.com 847-803-6100 Pulse P0751 and P0762 series www.pulseeng.com Sumida CDRH8D28 and CDRH8D43 series www.sumida.com Some Recommended Input And Output Capacitors (Others May Be Used) Manufacturer Capacitor Contact Information Vishay Sprague 293D, 592D, and 595D series tantalum www.vishay.com 407-324-4140 Taiyo Yuden High capacitance MLCC ceramic www.t-yuden.com 408-573-4150 Cornell Dubilier ESRD seriec Polymer Aluminum Electrolytic SPV and AFK series V-chip series www.cde.com MuRata High capacitance MLCC ceramic www.murata.com 15 www.national.com LM3224 Application Information LM3224 Application Information (Continued) 20097661 FIGURE 6. 1.25MHz, 5V Output 20097663 FIGURE 7. 1.25MHz, 8V Output www.national.com 16 LM3224 Application Information (Continued) 20097664 FIGURE 8. 1.25MHz, 12V Output 20097665 FIGURE 9. 1.25MHz, 15V Output 17 www.national.com LM3224 615kHz/1.25MHz Step-up PWM DC/DC Converter Physical Dimensions inches (millimeters) unless otherwise noted National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. 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