MM54C941/MM74C941 Octal Buffers/Line Receivers/ Line Drivers with TRI-STATEÉ Outputs General Description Features These octal buffers and line drivers are monolithic complementary MOS (CMOS) integrated circuits with TRI-STATE outputs. These outputs have been specially designed to drive highly capacitive loads such as bus-oriented systems. These devices have a fan-out of 6 low power Schottky loads. When VCC e 5V, inputs can accept true TTL high and low logic levels. Y Y Y Y Y Y Y Y Wide supply voltage range (3V to 15V) Low power consumption TTL compatibility (Improved on the inputs) High capacitive load TRI-STATE outputs Input protection 20-pin dual-in-line package High output drive Connection and Logic Diagrams Dual-In-Line Package TL/F/5923 – 1 Top View Order Number MM54C941 or MM74C941 TL/F/5923 – 2 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/5923 RRD-B30M105/Printed in U. S. A. MM54C941/MM74C941 Octal Buffers/Line Receivers/Line Drivers with TRI-STATE Outputs February 1988 Absolute Maximum Ratings (Note 1) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Operating VCC Range If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Voltage at Any Pin 0.3V to VCC a 0.3V Operating Temperature Range (TA) MM54C941 MM74C941 b 55§ C to a 125§ C b 40§ C to a 85§ C b 65§ C to a 150§ C 700 mW 500 mW 3V to 15V 18V VCC Lead Temperature (TL) (Soldering, 10 seconds) 260§ C DC Electrical Characteristics Min/Max limits apply across temperature range, unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) Logical ‘‘1’’ Input Voltage VCC e 5.0V VCC e 10V 2.5 8.0 VIN(0) Logical ‘‘0’’ Input Voltage VCC e 5.0V VCC e 10V VOUT(1) Logical ‘‘1’’ Output Voltage VCC e 5.0V, IO e b10mA VCC e 10V, IO e b10mA VOUT(0) Logical ‘‘0’’ Output Voltage VCC e 5.0V, IO e 10 mA VCC e 10V, IO e 10 mA IIN(1) Logical ‘‘1’’ Input Current VCC e 15V, VIN e 15V IIN(0) Logical ‘‘0’’ Input Current VCC e 15V, VIN e 0V ICC Supply Current VCC e 15V IOZ TRI-STATE Leakage VCC e 15V, VOUT e 0V or 15V V V 0.8 2.0 4.5 9.0 V V 0.005 b 1.0 V V 0.5 1.0 V V 1.0 mA b 0.005 0.05 mA 300 mA g 10 mA CMOS/TTL INTERFACE VIN(1) Logical ‘‘1’’ Input Voltage 54C, VCC e 4.5V 74C, VCC e 4.75V VIN(0) Logical ‘‘0’’ Input Voltage 54C, VCC e 4.5V 74C, VCC e 4.75V VOUT(1) Logical ‘‘1’’ Output Voltage 54C, VCC 74C, VCC 54C, VCC 74C, VCC VOUT(0) Logical ‘‘0’’ Output Voltage 54C, VCC e 4.5V, IO e 2.2 mA 74C, VCC e 4.75V, IO e 2.2 mA e e e e 4.5V, IO e b450 mA 4.75V, IO e b450 mA 4.5V, IO e b2.2 mA 4.75V, IO e b2.2 mA VCCb2.5 VCCb2.5 V V 0.8 0.8 VCCb0.4 VCCb0.4 2.4 2.4 V V V V V V 0.4 0.4 V V OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) ISOURCE Output Source Current (P-Channel) VCC e 5.0V, VOUT e 0V TA e 25§ C b 14.0 b 30.0 mA ISOURCE Output Source Current (P-Channel) VCC e 10V, VOUT e 0V TA e 25§ C b 36.0 b 70.0 mA ISINK Output Sink Current (N-Channel) VCC e 5.0V, VOUT e VCC TA e 25§ C 12.0 20.0 mA ISINK Output Sink Current (N-Channel) VCC e 10V, VOUT e VCC TA e 25§ C 48.0 70 mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. 2 AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise specified Symbol Parameter Conditions Typ Max Units 70 35 90 45 140 70 160 90 ns ns ns ns RL e 1 kX, CL e 50 pF VCC e 5.0V VCC e 210V 100 55 200 110 ns ns Propagation Delay Output Disable to Logic Level (from High Impedance State) RL e 1 kX, CL e 50 pF VCC e 5.0V VCC e 10V 100 55 200 110 ns ns tTHL, tTLH Transition Time VCC VCC VCC VCC 50 30 80 50 100 60 160 100 ns ns ns ns CPD Power Dissipation Capacitance (Output Enabled per Buffer) (Output Disabled per Buffer) (Note 3) Input Capacitance (Any Input) (Output Capacitance) (Output Disabled) tpd1, tpd0 Propagation Delay (Data IN to OUT) VCC VCC VCC VCC tIH, tOH Propagation Delay Output Disable to Logic Level (from High Impedance State) (from a Logic Level) tH1,tH0 CIN CO e e e e e e e e Min 5.0V, CL e 50 pF 10V, CL e 50 pF 5.0V, CL e 150 pF 10V, CL e 150 pF 5.0V, CL e 50 pF 10V, CL e 50 pF 5.0V, CL e 150 pF 10V, CL e 150 pF 100 10 pF pF (Note 2) VIN e 0V, f e 1 MHz, TA e 25§ C 10 pF VIN e 0V, f e 1 MHz, TA e 25§ C 10 pF *AC Parameters are guaranteed by DC correlated testing. Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Capacitance is guaranteed by periodic testing. Note 3: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics Application Note, AN-90. Truth Table OD1 OD2 Input Output 0 0 0 1 1 0 0 1 0 1 0 1 X X X 0 1 Z Z Z 1 e High 0 e Low X e Don’t Care Z e TRI-STATE 3 Typical Performance Characteristics N-Channel Output Drive @ 25§ C P-Channel Output Drive @ 25§ C TL/F/5923 – 3 TL/F/5923 – 4 DtPD per pF of Load Capacitance Propagation Delay vs Load Capacitance TL/F/5923 – 5 TL/F/5923 – 6 Typical Application TL/F/5923 – 7 4 AC Test Circuits and Switching Time Waveforms tpd0, tpd1 CMOS to CMOS TL/F/5923–8 TL/F/5923 – 9 t1H and tH1 t1H tH1 TL/F/5923–10 TL/F/5923 – 11 Note: VOH is defined as the DC output high voltage when the device is loaded with a 1 kX resistor to ground. t0H and tH0 t0H TL/F/5923 – 13 TL/F/5923–12 Note: Delays measured with input tr, tf s 20 ns. tH0 Note: VOL is defined as the DC output low voltage when the device is loaded with a 1 kX resistor to VCC. 5 MM54C941/MM74C941 Octal Buffers/Line Receivers/Line Drivers with TRI-STATE Outputs Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C941J or MM74C941J NS Package Number J20A Molded Dual-In-Line Package (N) Order Number MM54C941N or MM74C941N NS Package Number N20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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