Revised July 1999 MM74C240 • MM74C244 Inverting • Non-Inverting Octal Buffer and Line Driver with 3-STATE Outputs General Description Features The MM74C240 and MM74C244 octal buffers and line drivers are monolithic complementary MOS (CMOS) integrated circuits with 3-STATE outputs. These outputs have been specially designed to drive highly capacitive loads such as bus-oriented systems. These devices have a fan out of 6 low power Schottky loads. A high logic level on the output disable control input G makes the outputs go into the high impedance state. ■ Wide supply voltage range (3V to 15V) ■ High noise immunity (0.45 VCC typ) ■ Low power consumption ■ High capacitive load drive capability ■ 3-STATE outputs ■ Input protection ■ TTL compatibility ■ 20-pin dual-in-line package ■ High speed 25 ns (typ.) @ 10V, 50 pF (MM74C244) Ordering Code: Order Number MM74C240WM Package Number Package Description M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body MM74C240N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide MM74C244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body MM74C244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagrams Pin Assignments for DIP and SOIC MM74C240 MM74C244 (Top View) (Top View) © 1999 Fairchild Semiconductor Corporation DS005905 www.fairchildsemi.com MM74C240 • MM74C244 Inverting • Non-Inverting Octal Buffer and Line Driver with 3-STATE Outputs October 1987 MM74C240 • MM74C244 Logic Diagrams MM74C240 MM74C244 Truth Tables MM74C240 MM74C244 ODA IA OA ODA IA OA 1 X Z 1 X Z 1 X Z 1 X Z 0 0 1 0 0 0 0 1 0 0 1 1 ODB IB OB ODB IB OB 1 X Z 1 X Z 1 X Z 1 X Z 0 0 1 0 0 0 0 1 0 0 1 1 1 = HIGH 0 = LOW X = Don’t Care Z = 3-STATE www.fairchildsemi.com 2 Absolute Maximum VCC −0.3V to VCC + 0.3V Voltage at Any Pin Operating Temperature Range Storage Temperature Range 18V Lead Temperature (Soldering, 10 seconds) 260°C −40°C to +85°C −65°C to +150°C Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics table provides conditions for actual device operation. Power Dissipation Dual-In-Line 700 mW Small Outline 500 mW Operating VCC Range 3V to 15V DC Electrical Characteristics Min/Max limits apply across temperature range, unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) Logical “1” Input Voltage Logical “0” Input Voltage Logical “1” Output Voltage Logical “0” Output Voltage VCC = 5V 3.5 V VCC = 10V 8.0 V VCC = 5V 1.5 V VCC = 10V 2.0 V VCC = 5V, I O = −10 µA 4.5 VCC = 10V, IO = −10 µA 9.0 V V VCC = 5V, I O = 10 µA 0.5 V VCC = 10V, IO = 10 µA 1.0 V IOZ 3-STATE Output Current VCC = 10V, OD = VIH IIN(1) Logical “1” Input Current VCC = 15V, VIN = 15V IIN(0) Logical “0” Input Current VCC = 15V, VIN = 0V ICC Supply Current VCC = 15V 0.005 −1.0 ±10 µA 1.0 µA −0.005 0.05 µA 300 µA 0.8 V CMOS/LPTTL INTERFACE VIN(1) Logical “1” Input Voltage VCC = 4.75V VIN(0) Logical “0” Input Voltage VCC = 4.75V VOUT(1) Logical “1” Output Voltage VCC = 4.75V, IO = −450 µA VCC − 0.4 V VCC = 4.75V, IO = −2.2 mA 2.4 V VOUT(0) Logical “0” Output Voltage VCC − 1.5 V VCC = 4.75V, IO = 2.2 mA 0.4 V OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current) ISOURCE Output Source Current VCC = 5V, V OUT = 0V (P-Channel) TA = 25°C VCC = 10V, VOUT = 0V −14 −30 mA −36 −70 mA 12 20 mA 48 70 mA TA = 25°C ISINK Output Sink Current VCC = 5V, V OUT = VCC (N-Channel) TA = 25°C VCC = 10V, VOUT = VCC TA = 25°C 3 www.fairchildsemi.com MM74C240 • MM74C244 Absolute Maximum Ratings(Note 1) MM74C240 • MM74C244 AC Electrical Characteristics (Note 2) TA = 25°C, CL = 50 pF, unless otherwise specified Symbol tPD(1), tPD(0) Parameter Conditions Min Typ Max Units ns Propagation Delay (Data In to Out) MM74C240 MM74C244 t1H, t0H tH1, tH0 60 90 40 70 ns V CC = 5V, CL = 150 pF 80 110 ns VCC = 10V, CL = 150 pF 60 90 ns V CC = 5V, CL = 50 pF 45 70 ns VCC = 10V, CL = 50 pF 25 50 ns VCC = 5V, CL = 150 pF 60 90 ns VCC = 10V, CL = 150 pF 40 70 ns Propagation Delay Output RL = 1k, CL = 50 pF Disable to High Impedance VCC = 5V 45 80 ns State (from a Logic Level) VCC = 10V 35 60 ns Propagation Delay Output RL = 1k, CL = 50 pF Disable to Logic Level VCC = 5V 50 90 ns (from High Impedance State) VCC = 10V 30 60 ns VCC = 5V, CL = 50 pF 45 80 ns VCC = 10V, CL = 50 pF 30 60 ns VCC = 5V, CL = 150 pF 75 140 ns VCC = 10V, CL = 150 pF 50 100 ns tT(HL), tT(LH) Transition Time CPD VCC = 5V, CL = 50 pF VCC = 10V, CL = 50 pF Power Dissipation (Note 3) Capacitance (Output Enabled per Buffer) MM74C240 100 pF MM74C244 100 pF (Output Disabled per Buffer) CIN MM74C240 10 pF MM74C244 0 pF VIN = 0V, f = 1 MHz, TA = 25°C 10 pF VIN = 0V, f = 1 MHz, TA = 25°C 10 pF Input Capacitance (Note 4) (Any Input) CO Output Capacitance (Note 4) (Output Disabled) Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note, AN-90. Note 4: Capacitance is guaranteed by periodic testing. www.fairchildsemi.com 4 MM74C240 • MM74C244 Typical Application Typical Performance Characteristics N-Channel Output Drive at 25°C P-Channel Output Drive at 25°C MM74C240 Propagation Delay vs. Load Capacitance MM74C244 Propagation Delay vs. Load Capacitance 5 www.fairchildsemi.com MM74C240 • MM74C244 AC Test Circuits and Switching Time Waveforms tpd0, tpd1 t1H and tH1 t0H and tH0 Note: Delays measured with input tr, tf ≤ 20 ns. CMOS to CMOS t1H and tH1 Note: VOH is defined as the DC output high voltage when the device is loaded with a 1 kΩ resistor to ground. tOH and tH0 Note: VOL is defined as the DC output low voltage when the device is loaded with a 1 kΩ resistor to VCC. www.fairchildsemi.com 6 MM74C240 • MM74C244 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body Package Number M20B 7 www.fairchildsemi.com MM74C240 • MM74C244 Inverting • Non-Inverting Octal Buffer and Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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