LMH6321 300 mA High Speed Buffer with Adjustable Current Limit General Description Features The LMH6321 is a high speed unity gain buffer that slews at 1800 V/µs and has a small signal bandwidth of 110 MHz while driving a 50Ω load. It can drive ±300 mA continuously and will not oscillate while driving large capacitive loads. The LMH6321 features an adjustable current limit. The current limit is continuously adjustable from 10 mA to 300 ma with a ±5 mA ±5% accuracy. The current limit is set by adjusting an external reference current with a resistor. The current can be easily and instantly adjusted, as needed by connecting the resistor to a DAC to form the reference current. The sourcing and sinking currents share the same current limit. The LMH6321 is available in a space saving 8-pin PSOP or a 7-pin TO-263 power package. The PSOP package features an exposed pad on the bottom of the package to increase its heat sinking capability. The LMH6321 can be used within the feedback loop of an operational amplifier to boost the current output or as a stand alone buffer. ■ ■ ■ ■ ■ ■ ■ ■ ■ High slew rate Wide bandwidth Continuous output current Output current limit tolerance Wide supply voltage range Wide temperature range Adjustable current limit High capacitive load drive Thermal shutdown error flag 1800 V/μs 110 MHz ±300 mA ±5 mA ±5% 5V to ±15V −40°C to +125°C Applications ■ ■ ■ ■ Line driver Pin driver Sonar driver Motor control Connection Diagrams 8-Pin PSOP 7-Pin TO-263 20138626 20138625 Note: V− pin is connected to tab on back of each package © 2007 National Semiconductor Corporation 201386 www.national.com LMH6321 300 mA High Speed Buffer with Adjustable Current Limit April 2007 LMH6321 (Soldering, 10 seconds) Power Dissipation CL Pin to GND Voltage Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model Machine Model Supply Voltage Input to Output Voltage (Note 3) Input Voltage Output Short-Circuit to GND (Note 4) Storage Temperature Range Junction Temperature (TJMAX) Lead Temperature 260°C (Note 8) ±1.2V Operating Ratings Operating Temperature Range Operating Supply Range 2.5 kV 250V 36V (±18V) ±5V ±VSUPPLY Continuous −65°C to +150°C +150°C −40°C to +125°C 5V to ±16V Thermal Resistance (θJA), PSOP Package (Note 6) 180°C/W Thermal Resistance (θJC) TO-263 Package 4°C/W Thermal Resistance (θJA) TO-263 Package 80°C/W ±15V Electrical Characteristics The following specifications apply for Supply Voltage = ±15V, VCM = 0, RL ≥ 100 kΩ and RS = 50Ω, CL open, unless otherwise noted. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C. Symbol AV Parameter Voltage Gain Min Typ RL = 1 kΩ, VIN = ±10V Conditions 0.99 0.98 0.995 RL = 50Ω, VIN = ±10V 0.86 0.84 0.92 Max Units V/V V/V VOS Input Offset Voltage RL = 1 kΩ, RS = 0V ±4 ±35 ±52 mV IB Input Bias Current VIN = 0V, RL = 1 kΩ, RS = 0V ±2 ±15 ±17 μA R.IN Input Resistance R.L = 50Ω 250 kΩ CIN Input Capacitance 3.5 pF RO Output Resistance IO = ±10 mA 5 Ω IS Power Supply Current RL = ∞, VIN = 0 11 14.5 16.5 14.9 18.5 20.5 750 µA into CL Pin VO1 VO2 VO3 VEF TSH Positive Output Swing IO = 300 mA, RS = 0V, VIN = ±VS Negative Output Swing IO = 300 mA, RS = 0V, VIN = ±VS Positive Output Swing RL = 1 kΩ, RS = 0V, VIN = ±VS Negative Output Swing RL = 1 kΩ, RS = 0V, VIN = ±VS Positive Output Swing RL = 50Ω, RS = 0V, VIN = ±VS Negative Output Swing RL = 50Ω, RS = 0V, VIN = ±VS Error Flag Output Voltage RL = ∞, VIN = 0, Normal 5.00 EF pulled up with 5 kΩ to +5V During Thermal Shutdown 0.25 Thermal Shutdown Temperature www.national.com 11.2 10.8 11.9 −11.3 13.1 12.9 V −12.9 −12.6 V 12.2 −11.9 Measure Quantity is Die (Junction) Temperature 168 Hysteresis 10 2 −10.3 −9.8 13.4 −13.4 11.6 11.2 mA −10.9 −10.6 V V °C Parameter Conditions Min ISH Supply Current at Thermal Shutdown EF pulled up with 5 kΩ to +5V PSSR Power Supply Rejection Ratio RL = 1 kΩ, VIN = 0V, VS = ±5V to ±15V SR Slew Rate Typ Max 3 Positive 58 54 66 Negative 58 54 64 VIN = ±11V, RL = 1 kΩ 2900 VIN = ±11V, RL = 50Ω 1800 Units mA dB V/μs BW −3 dB Bandwidth VIN = ±20 mVPP, RL = 50Ω 110 MHz LSBW Large Signal Bandwidth VIN = 2 VPP, RL = 50Ω 48 MHz HD2 2nd Harmonic Distortion VO = 2 VPP, f = 100 kHz VO = 2 VPP, f = 1 MHz HD3 3rd Harmonic Distortion VO = 2 VPP, f = 100 kHz VO = 2 VPP, f = 1 MHz RL = 50Ω −59 RL = 100Ω −70 RL = 50Ω −57 RL = 100Ω −68 RL = 50Ω −59 RL = 100Ω −70 RL = 50Ω −62 RL = 100Ω −73 dBc dBc en Input Voltage Noise f ≥ 10 kHz 2.8 in Input Current Noise f ≥ 10 kHz 2.4 ISC1 Output Short Circuit Current Source (Note 7) VO = 0V, Program Current into CL = 25 µA Sourcing VIN = +3V 4.5 4.5 10 15.5 15.5 Sinking VIN = −3V 4.5 4.5 10 15.5 15.5 VO = 0V Program Current into CL = 750 µA Sourcing VIN = +3V 280 273 295 308 325 Sinking VIN = −3V 280 275 295 310 325 RS = 0V, VIN = +3V (Notes 5, 7) 320 300 570 750 920 Output Short Circuit Current Sink RS = 0V, VIN = −3V (Notes 5, 7) 300 305 515 750 910 ±0.5 ±4.0 ±8.0 ISC2 Output Short Circuit Current Source nV/ pA/ mA mA mA V/I Section CLVOS Current Limit Input Offset Voltage RL = 1 kΩ, GND = 0V CLIB Current Limit Input Bias Current RL = 1 kΩ CL CMRR Current Limit Common Mode Rejection Ratio RL = 1 kΩ, GND = −13 to +14V 3 −0.5 −0.8 −0.2 60 56 69 mV μA dB www.national.com LMH6321 Symbol LMH6321 ±5V Electrical Characteristics The following specifications apply for Supply Voltage = ±5V, VCM = 0, RL ≥ 100 kΩ and RS = 50Ω, CL Open, unless otherwise noted. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C. Symbol AV Parameter Voltage Gain Conditions Min Typ RL = 1 kΩ, VIN = ±3V 0.99 0.98 0.994 RL = 50Ω, VIN = ±3V 0.86 0.84 0.92 Max V/V VOS Offset Voltage RL = 1 kΩ, RS = 0V IB Input Bias Current RIN Input Resistance CIN Input Capacitance RO Output Resistance IOUT = ±10 mA 5 IS Power Supply Current RL = ∞, VIN = 0V 10 13.5 14.7 ±2.5 ±35 ±50 mV VIN = 0V, RL = 1 kΩ, RS = 0V ±2 ±15 ±17 μA RL = 50Ω 250 kΩ 3.5 pF 14 17.5 19.5 750 μA into CL Pin VO1 VO2 VO3 PSSR ISC1 ISC2 SR Positive Output Swing IO = 300 mA, RS = 0V, VIN = ±VS Negative Output Swing IO = 300 mA, RS = 0V, VIN = ±VS Positive Output Swing RL = 1 kΩ, RS = 0V, VIN = ±VS Negative Output Swing RL = 1 kΩ, RS = 0V, VIN = ±VS Positive Output Swing RL = 50Ω, RS = 0V, VIN = ±VS Negative Output Swing RL = 50Ω, RS = 0V, VIN = ±VS Power Supply Rejection Ratio RL = 1 kΩ, VIN = 0, VS = ±5V to ±15V 1.3 0.9 1.9 −1.3 3.2 2.9 −0.5 −0.1 3.5 −3.5 2.8 2.5 Ω −3.1 −2.9 3.1 −3.0 −2.6 −2.4 66 Negative 58 54 64 VO = 0V, Program Current Sourcing VIN = +3V into CL = 25 μA 4.5 4.5 9 14.0 15.5 Sinking VIN = −3V 4.5 4.5 9 14.0 15.5 VO = 0V, Program Current Sourcing VIN = +3V into CL = 750 μA 275 270 290 305 320 Sinking VIN = −3V 275 270 290 310 320 RS = 0V, VIN = +3V (Notes 5, 7) 300 470 Output Short Circuit Current Sink RS = 0V, VIN = −3V (Notes 5, 7) 300 400 Slew Rate VIN = ±2 VPP, RL = 1 kΩ 450 VIN = ±2 VPP, RL = 50Ω 210 V V 58 54 Output Short Circuit Current Source V V Positive Output Short Circuit Current Units V dB mA mA V/μs BW −3 dB Bandwidth VIN = ±20 mVPP, RL = 50Ω 90 MHz LSBW Large Signal Bandwidth VIN = 2 VPP, RL = 50Ω 39 MHz www.national.com 4 TSD Parameter Thermal Shutdown Conditions Min Typ Temperature 170 Hysteresis 10 RL = 1 kΩ, GND = 0V 2.7 Max Units °C V/I Section CLVOS Current Limit Input Offset Voltage CLIB Current Limit Input Bias Current RL = 1 kΩ, CL = 0V CL CMRR Current Limit Common Mode Rejection Ratio RL = 1 kΩ, GND = −3V to +4V −0.5 −0.6 −0.2 60 56 65 +5 ±5.0 mV μA dB Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Table. Note 2: Human Body Model is 1.5 kΩ in series with 100 pF. Machine Model is 0Ω in series with 200 pF. Note 3: If the input-output voltage differential exceeds ±5V, internal clamping diodes will turn on. The current through these diodes should be limited to 5 mA max. Thus for an input voltage of ±15V and the output shorted to ground, a minimum of 2 kΩ should be placed in series with the input. Note 4: The maximum continuous current must be limited to 300 mA. See the Application section for more details. Note 5: For the condition where the CL pin is left open the output current should not be continuous, but instead, should be limited to low duty cycle pulse mode such that the RMS output current is less than or equal to 300 mA. Note 6: Soldered to PC board with copper foot print equal to DAP size. Natural convection (no air flow). Board material is FR-4. Note 7: VIN = + or −4V at TJ = −40°C. Note 8: The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = TJ(MAX)–TA)/θJA. See Thermal Management section of the Application Hints. Ordering Information Package 8-Pin PSOP 7-Pin TO-263 Part Number LMH6321MR LMH6321MRX LMH6321TS LMH6321TSX Package Marking Transport Media 95 Units/Rail LMH6321MR 2.5k Units Tape and Reel 45 Units/Rail LMH6321TS 500 Units Tape and Reel 5 NSC Drawing MRA08A TS7B www.national.com LMH6321 Symbol LMH6321 Typical Performance Characteristics Overshoot vs. Capacitive Load Slew Rate 20138634 20138665 Slew Rate Small Signal Step Response 20138644 20138635 Small Signal Step Response Input Offset Voltage of Amplifier vs. Supply Voltage 20138643 20138660 www.national.com 6 LMH6321 Small Signal Step Response Small Signal Step Response 20138645 20138646 Large Signal Step Response—Leading Edge Large Signal Step Response—Leading Edge 20138639 20138641 Large Signal Step Response — Trailing Edge Large Signal Step Response — Trailing Edge 20138640 20138642 7 www.national.com LMH6321 Large Signal Step Response Large Signal Step Response 20138648 20138647 Large Signal Step Response Large Signal Step Response 20138649 20138650 Harmonic Distortion with 50Ω Load Harmonic Distortion with 100Ω Load 20138637 20138638 www.national.com 8 LMH6321 Noise vs. Frequency Harmonic Distortion with 50Ω Load 20138615 20138651 Gain vs. Frequency Gain vs. Frequency 20138618 20138616 Gain vs. Frequency Gain vs. Frequency 20138617 20138619 9 www.national.com LMH6321 Supply Current vs. Supply Voltage Output Impedance vs. Sourcing Current 20138653 20138654 Output Impedance vs. Sinking Current Output Impedance vs. Sourcing Current 20138620 20138622 Output Impedance vs. Sinking Current Output Short Circuit Current—Sourcing vs. Program Current 20138621 20138657 www.national.com 10 Output Short Circuit Current—Sourcing vs. Program Current 20138661 20138655 Output Short Circuit Current—Sinking vs. Program Current Positive Output Swing vs. Sourcing Current 20138623 20138659 Negative Output Swing vs. Sinking Current Positive Output Swing vs. Sourcing Current 20138656 20138624 11 www.national.com LMH6321 Output Short Circuit Current—Sinking vs. Program Current LMH6321 Negative Output Swing vs. Sinking Current Output Short Circuit Current—Sourcing vs. Supply Voltage 20138658 20138664 Output Short Circuit Current—Sinking vs. Supply Voltage Positive Output Swing vs. Supply Voltage 20138667 20138663 Positive Output Swing vs. Supply Voltage Negative Output Swing vs. Supply Voltage 20138666 www.national.com 20138669 12 LMH6321 Negative Output Swing vs. Supply Voltage Input Offset Voltage of Amplifier vs. Common Mode Voltage 20138668 20138672 Input Offset Voltage of Amplifier vs. Common Mode Voltage Input Bias Current of Amplifier vs. Supply Voltage 20138662 20138670 Input Offset Voltage of V/I Section vs. Common Mode Voltage Input Offset Voltage of V/I Section vs. Common Mode Voltage 20138671 20138673 13 www.national.com LMH6321 low impedance load, since a high Z source can’t supply the needed current to the load. For example, in the case where the signal source to an analog to digital converter is a sensor, it is recommended that the sensor be isolated from the A/D converter. The use of a buffer ensures a low output impedance and delivery of a stable output to the converter. In A/D converter applications buffers need to drive varying and complex reactive loads. Buffers come in two flavors: Open Loop and Closed Loop. While sacrificing the precision of some DC characteristics, and generally displaying poorer gain linearity, open loop buffers offer lower cost and increased bandwidth, along with less phase shift and propagation delay than do closed loop buffers. The LMH6321 is of the open loop variety. Figure 1 shows a simplified diagram of the LMH6321 topology, revealing the open loop complementary follower design approach. Figure 2 shows the LMH6321 in a typical application, in this case, a 50Ω coaxial cable driver. Application Hints BUFFERS Buffers are often called voltage followers because they have largely unity voltage gain, thus the name has generally come to mean a device that supplies current gain but no voltage gain. Buffers serve in applications requiring isolation of source and load, i.e., high input impedance, low output impedance (high output current drive). In addition, they offer gain flatness and wide bandwidth. Most operational amplifiers, that meet the other given requirements in a particular application, can be configured as buffers, though they are generally more complex and are, by and large, not optimized for unity gain operation. The commercial buffer is a cost effective substitute for an op amp. Buffers serve several useful functions, either in tandem with op amps or in standalone applications. As mentioned, their primary function is to isolate a high impedance source from a 20138627 FIGURE 1. Simplified Schematic typically at 1000 V/μs. Therefore, under a 50Ω load condition the load can demand current at a rate, di/dt, of 20 A/μs. This current flowing in an inductance of 50 nH (approximately 1.5” of 22 gage wire) will produce a 1V transient. Thus, it is recommended that solid tantalum capacitors of 5 μF to 10 μF, in parallel with a ceramic 0.1 μF capacitor be added as close as possible to the device supply pins. SUPPLY BYPASSING The method of supply bypassing is not critical for frequency stability of the buffer, and, for light loads, capacitor values in the neighborhood of 1 nF to 10 nF are adequate. However, under fast slewing and large loads, large transient currents are demanded of the power supplies, and when combined with any significant wiring inductance, these currents can produce voltage transients. For example, the LMH6321 can slew www.national.com 14 LMH6321 20138628 FIGURE 2. 50Ω Coaxial Cable Driver with Dual Supplies For values of capacitors in the 10 μF to 100 μF range, ceramics are usually larger and more costly than tantalums but give superior AC performance for bypassing high frequency noise because of their very low ESR (typically less than 10 MΩ) and low ESL. the Abs Max value is under a short circuit condition to ground while driving the input with up to ±15V. However, in the LMH6321 the maximum output current is set by the programmable Current Limit pin (CL). The value set by this pin is guaranteed to be accurate to 5 mA ±5%. If the input/output differential exceeds 5V while the output is trying to supply the maximum set current to a shorted condition or to a very low resistance load, a portion of that current will flow through the clamp diodes, thus creating an error in the total load current. If the input resistor is too low, the error current can exceed the 5 mA ±5% budget. LOAD IMPEDANCE The LMH6321 is stable under any capacitive load when driven by a 50Ω source. As shown by the Overshoot vs. Capacitive Load graph in the Typical Performance Characteristics, worst case overshoot is for a purely capacitive load of about 1 nF. Shunting the load capacitance with a resistor will reduce the overshoot. BANDWIDTH AND STABILITY As can be seen in the schematic of Figure 2, a small capacitor is inserted in parallel with the series input resistors. The reason for this is to compensate for the natural band-limiting effect of the 1st order filter formed by this resistor and the input capacitance of the buffer. With a typical CIN of 3.5 pF (Figure 2), a pole is created at SOURCE INDUCTANCE Like any high frequency buffer, the LMH6321 can oscillate with high values of source inductance. The worst case condition occurs with no input resistor, and a purely capacitive load of 50 pF, where up to 100 nH of source inductance can be tolerated. With a 50Ω load, this goes up to 200 nH. However, a 100Ω resistor placed in series with the buffer input will ensure stability with a source inductances up to 400 nH with any load. fp2 = 1/(2πR1CIN) = 4.5 MHz (1) This will band-limit the buffer and produce further phase lag. If used in an op amp-loop application with an amplifier that has the same order of magnitude of unity gain crossing as fp2, this additional phase lag will produce oscillation. The solution is to add a small feed-forward capacitor (phase lead) around the input resistor, as shown in Figure 2. The value of this capacitor is not critical but should be such that the time constant formed by it and the input resistor that it is in parallel with (RIN) be at least five times the time constant of RINCIN. Therefore, OVERVOLTAGE PROTECTION (Refer to the simplified schematic in Figure 1). If the input-to-output differential voltage were allowed to exceed the Absolute Maximum Rating of 5V, an internal diode clamp would turn on and divert the current around the compound emitter followers of Q1/Q3 (D1 – D11 for positive input), or around Q2/Q4 (D2 – D12 for negative inputs). Without this clamp, the input transistors Q1 – Q4 would zener, thereby damaging the buffer. To limit the current through this clamp, a series resistor should be added to the buffer input (see R1 in Figure 2). Although the allowed current in the clamp can be as high as 5 mA, which would suggest a 2 kΩ resistor from a 15V source, it is recommended that the current be limited to about 1 mA, hence the 10 kΩ shown. The reason for this larger resistor is explained in the following: One way that the input/output voltage differential can exceed C1 = (5RIN/R1)(CIN) (2) from the Electrical Characteristics, RIN is 250 kΩ. In the case of the example in Figure 2, RINCIN produces a time-constant of 870 ns, so C1 should be chosen to be a minimum of 4.4 μs, or 438 pF. The value of C1 (1000 pF) shown in Figure 2 gives 10 μs. 15 www.national.com LMH6321 IEXT = VPROG/REXT OUTPUT CURRENT AND SHORT CIRCUIT PROTECTION The LMH6321 is designed to deliver a maximum continuous output current of 300 mA. However, the maximum available current, set by internal circuitry, is about 700 mA at room temperature. The output current is programmable up to 300 mA by a single external resistor and voltage source. The LMH6321 is not designed to safely output 700 mA continuously and should not be used this way. However, the available maximum continuous current will likely be limited by the particular application and by the package type chosen, which together set the thermal conditions for the buffer (see Thermal Management section) and could require less than 300 mA. The programming of both the sourcing and sinking currents into the load is accomplished with a single resistor. Figure 3 shows a simplified diagram of the V to I converter and ISC protection circuitry that, together, perform this task. Referring to Figure 3, the two simplified functional blocks, labeled V/I Converter and Short Circuit Protection, comprise the circuitry of the Current Limit Control. The V/I converter consists of error amplifier A1 driving two PNP transistors in a Darlington configuration. The two input connections to this amplifier are VCL (inverting input) and GND (non-inverting input). If GND is connected to zero volts, then the high open loop gain of A1, as well as the feedback through the Darlington, will force CL, and thus one end REXT to be at zero volts also. Therefore, a voltage applied to the other end of REXT will force a current (3) into this pin. Via this pin, IOUT is programmable from 10 mA to 300 mA by setting IEXT from 25 μA to 750 µA by means of a fixed REXT of 10 kΩ and making VCL variable from 0.25V to 7.5V. Thus, an input voltage VCL is converted to a current IEXT. This current is the output from the V/I converter. It is gained up by a factor of two and sent to the Short Circuit Protection block as IPROG. IPROG sets a voltage drop across RSC which is applied to the non-inverting input of error amp A2. The other input is across RSENSE. The current through RSENSE, and hence the voltage drop across it, is proportional to the load current, via the current sense transistor QSENSE. The output of A2 controls the drive (IDRIVE) to the base of the NPN output transistor, Q3 which is, proportional to the amount and polarity of the voltage differential (VDIFF ) between AMP2 inputs, that is, how much the voltage across RSENSE is greater than or less than the voltage across RSC. This loop gains IEXT up by another 200, thus ISC = 2 x 200 (IEXT) = 400 IEXT Therefore, combining Equations (3) and (4), and solving for REXT , we get REXT = 400 VPROG/ISC (5) If the VCL pin is left open, the output short circuit current will default to about 700 mA. At elevated temperatures this current will decrease. 20138629 Only the NPN output ISC protection is shown. Depending on the polarity of VDIFF, AMP2 will turn IDRIVE either on or off. FIGURE 3. Simplified Diagram of Current Limit Control www.national.com (4) 16 Heatsinking For some applications, a heat sink may be required with the LMH6321. This depends on the maximum power dissipation and maximum ambient temperature of the application. To accomplish heat sinking, the tabs on TO-263 and PSOP package may be soldered to the copper plane of a PCB for heatsinking (note that these tabs are electrically connected to the most negative point in the circuit, i. e.,V−). Heat escapes from the device in all directions, mainly through the mechanisms of convection to the air above it and conduction to the circuit board below it and then from the board to the air. Natural convection depends on the amount of surface area that is in contact with the air. If a conductive plate serving as a heatsink is thick enough to ensure perfect thermal conduction (heat spreading) into the far recesses of the plate, the temperature rise would be simply inversely proportional to the total exposed area. PCB copper planes are, in that sense, an aid to convection, the difference being that they are not thick enough to ensure perfect conduction. Therefore, eventually we will reach a point of diminishing returns (as seen in Figure 5). Very large increases in the copper area will produce smaller and smaller improvement in thermal resistance. This occurs, roughly, for a 1 inch square of 1 oz copper board. Some improvement continues until about 3 square inches, especially for 2 oz boards and better, but beyond that, external heatsinks are required. Ultimately, a reasonable practical value attainable for the junction to ambient thermal resistance is about 30 °C/W under zero air flow. A copper plane of appropriate size may be placed directly beneath the tab or on the other side of the board. If the conductive plane is placed on the back side of the PCB, it is recommended that thermal vias be used per JEDEC Standard JESD51-5. θJA = (TJ(MAX) - TA(MAX) )/ PD(MAX) (6) where: TJ(MAX) = the maximum recommended junction temperature TA(MAX) = the maximum ambient temperature in the user’s environment PD(MAX) = the maximum recommended power dissipation Note: The allowable thermal resistance is determined by the maximum allowable heat rise , TRISE = TJ(MAX) - TA(MAX) = (θJA) (PD(MAX)). Thus, if ambient temperature extremes force TRISE to exceed the design maximum, the part must be de-rated by either decreasing PD to a safe level, reducing θJA, further, or, if available, using a larger copper area. Procedure 1. First determine the maximum power dissipated by the buffer, PD(MAX). For the simple case of the buffer driving a resistive load, and assuming equal supplies, PD(MAX) is given by PD(MAX) = IS (2V+) + V+2/4RL 2. (7) where: IS = quiescent supply current Determine the maximum allowable die temperature rise, 3. TR(MAX) = TJ(MAX)-TA(MAX) = PD(MAX)θJA (8) Using the calculated value of TR(MAX) and PD(MAX) the required value for junction to ambient thermal resistance can be found: 4. θJA = TR(MAX)/PD(MAX) (9) Finally, using this value for θJA choose the minimum value of copper area from Figure 4. Example Assume the following conditions: V+ = V− = 15V, RL = 50Ω, IS = 15 mA TJ(MAX) = 125°C, TA (MAX) = 85°C. 1. From (7) PD(MAX) = IS (2V+) + V+2/4RL = (15 mA)(30V) + 225V2/200Ω = 1.58W 2. From (8) TR(MAX) = 125°C - 85°C = 40°C 3. From (9) θJA = 40°C/1.58W = 25.3°C/W Examining the plot of Copper Area vs. θJA, we see that we cannot attain this low of a thermal resistance for one layer of 1 oz copper. It will be necessary to derate the part by decreasing either the ambient temperature or the power dissipation. Other solutions are to use two layers of 1 oz foil, or use 2 oz copper (see Table 1), or to provide forced air flow. One should allow about an extra 15% heat sinking capability for safety margin. Determining Copper Area One can determine the required copper area by following a few basic guidelines: 1. Determine the value of the circuit’s power dissipation, PD 2. Specify a maximum operating ambient temperature, TA (MAX). Note that when specifying this parameter, it must be kept in mind that, because of internal temperature rise due to power dissipation, the die temperature, TJ, will be higher than TA by an amount that is dependent on the thermal resistance from junction to ambient, θJA. Therefore, TA must be specified such that TJ does not exceed the absolute maximum die temperature of 150° C. 3. Specify a maximum allowable junction temperature, TJ (MAX), which is the temperature of the chip at maximum operating current. Although no strict rules exist, typically one should design for a maximum continuous junction temperature of 100°C to 130°C, but no higher than 150° C which is the absolute maximum rating for the part. 4. Calculate the value of junction to ambient thermal resistance, θJA 5. Choose a copper area that will guarantee the specified TJ(MAX) for the calculated θJA. θJA as a function of copper area in square inches is shown in Figure 4. 17 www.national.com LMH6321 The maximum value of thermal resistance, junction to ambient θJA, is defined as: THERMAL MANAGEMENT LMH6321 As seen in the previous example, buffer dissipation in DC circuit applications is easily computed. However, in AC circuits, signal wave shapes and the nature of the load (reactive, nonreactive) determine dissipation. Peak dissipation can be several times the average with reactive loads. It is particularly important to determine dissipation when driving large load capacitance. A selection of thermal data for the PSOP package is shown in Table 2. The table summarized θJA for both 0.5 watts and 0.75 watts. Note that the thermal resistance, for both the TO-263 and the PSOP package is lower for the higher power dissipation levels. This phenomenon is a result of the principle of Newtons Law of Cooling. Restated in term of heatsink cooling, this principle says that the rate of cooling and hence the thermal conduction, is proportional to the temperature difference between the junction and the outside environment (ambient). This difference increases with increasing power levels, thereby producing higher die temperatures with more rapid cooling. 20138630 FIGURE 4. Thermal Resistance (typ) for 7-L TO-263 Package Mounted on 1 oz. (0.036 mm) PC Board Foil TABLE 2. θJA vs. Copper Area and PD for PSOP. 1.0 oz cu Board. No Airflow. Ambient Temperature = 22°C 20138631 FIGURE 5. Derating Curve for TO-263 package. No Air Flow θJA @ 1.0W (°C/W) θJA @ 2.0W (°C/W) 1 Layer = 1”x2” cu Bottom 62.4 54.7 2 Layer = 1”x2” cu Top & Bottom 36.4 32.1 2 Layer = 2”x2” cu Top & Bottom 23.5 22.0 2 Layer = 2”x4” cu Top & Bottom 19.8 17.2 θJA @ 0.5W (°C/W) θJA @ 0.75W (°C/W) 1 Layer = 0.05 sq. in. (Bottom) + 3 Via Pads 141.4 138.2 1 Layer = 0.1 sq. in. (Bottom) + 3 Via Pads 134.4 131.2 1 Layer = 0.25 sq. in. (Bottom) + 3 Via Pads 115.4 113.9 1 Layer = 0.5 sq. in. (Bottom) + 3 Via Pads 105.4 104.7 1 Layer = 1.0 sq. in. (Bottom) + 3 Via Pads 100.5 100.2 2 Layer = 0.5 sq. in. (Top)/ 0.5 sq. in. (Bottom) + 33 Via Pads 93.7 92.5 2 Layer = 1.0 sq. in. (Top)/ 1.0 sq. in. (Bottom) + 53 Via Pads 82.7 82.2 ERROR FLAG OPERATION The LMH6321 provides an open collector output at the EF pin that produces a low voltage when the Thermal Shutdown Protection is engaged, due to a fault condition. Under normal operation, the Error Flag pin is pulled up to V+ by an external resistor. When a fault occurs, the EF pin drops to a low voltage and then returns to V+ when the fault disappears. This voltage change can be used as a diagnostic signal to alert a microprocessor of a system fault condition. If the function is not used, the EF pin can be either tied to ground or left open. If this function is used, a 10 kΩ, or larger, pull-up resistor (R2 in Figure 2) is recommended. The larger the resistor the lower the voltage will be at this pin under thermal shutdown. Table 3 shows some typical values of VEF for 10 kΩ and 100 kΩ. TABLE 1. θJA vs. Copper Area and PD for TO-263. 1.0 oz cu Board. No Air Flow. Ambient Temperature = 24°C Copper Area Copper Area/Vias TABLE 3. VEF vs. R2 Figure 2 R2 www.national.com 18 @ V+ = 5V @V+ = 15V 10 kΩ 0.24V 0.55V 100 KΩ 0.036V 0.072V LMH6321 SINGLE SUPPLY OPERATION If dual supplies are used, then the GND pin can be connected to a hard ground (0V) (as shown in Figure 2). However, if only a single supply is used, this pin must be set to a voltage of one VBE (∼0.7V) or greater, or more commonly, mid rail, by a stiff, low impedance source. This precludes applying a resistive voltage divider to the GND pin for this purpose. Figure 6 shows one way that this can be done. 20138635 FIGURE 7. Slew Rate vs. Peak-to-Peak Input Voltage However, when driving capacitive loads, the slew rate may be limited by the available peak output current according to the following expression. dv/dt = IPK/CL (10) and rapidly changing output voltages will require large output load currents. For example if the part is required to slew at 1000 V/μs with a load capacitance of 1 nF the current demand from the LMH6321 would be 1A. Therefore, fast slew rate is incompatible with large CL. Also, since CL is in parallel with the load, the peak current available to the load decreases as CL increases. Figure 8 illustrates the effect of the load capacitance on slew rate. Slew rate tests are specified for resistive loads and/or very small capacitive loads, otherwise the slew rate test would be a measure of the available output current. For the highest slew rate, it is obvious that stray load capacitance should be minimized. Peak output current should be kept below 500 mA. This translates to a maximum stray capacitance of 500 pF for a slew rate of 1000 V/μs. 20138632 FIGURE 6. Using an Op Amp to Bias the GND Pin to ½ V + for Single Supply Operation In Figure 6, the op amp circuit pre-biases the GND pin of the buffer for single supply operation. The GND pin can be driven by an op amp configured as a constant voltage source, with the output voltage set by the resistor voltage divider, R1 and R2. It is recommended that These resistors be chosen so as to set the GND pin to V+/2, for maximum common mode range. SLEW RATE Slew rate is the rate of change of output voltage for largesignal step input changes. For resistive load, slew rate is limited by internal circuit capacitance and operating current (in general, the higher the operating current for a given internal capacitance, the faster is the slew rate). Figure 7 shows the slew capabilities of the LMH6321 under large signal input conditions, using a resistive load. 20138636 FIGURE 8. Slew Rate vs. Load Capacitance 19 www.national.com LMH6321 Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin PSOP NS Package Number MRA08B 7-Pin TO-263 NS Package Number TS7B www.national.com 20 LMH6321 Notes 21 www.national.com LMH6321 300 mA High Speed Buffer with Adjustable Current Limit Notes THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. 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