TI LF147QML

LF147QML
LF147QML Wide Bandwidth Quad JFET Input Operational Amplifier
Literature Number: SNOSAI1
LF147QML
Wide Bandwidth Quad JFET Input Operational Amplifier
General Description
Features
The LF147 is a low cost, high speed quad JFET input
operational amplifier with an internally trimmed input offset
voltage (BI-FET II™ technology). The device requires a low
supply current and yet maintains a large gain bandwidth
product and a fast slew rate. In addition, well matched high
voltage JFET input devices provide very low input bias and
offset currents. The LF147 is pin compatible with the standard LM148. This feature allows designers to immediately
upgrade the overall performance of existing LF148 and
LM124 designs.
The LF147 may be used in applications such as high speed
integrators, fast D/A converters, sample-and-hold circuits
and many other circuits requiring low input offset voltage,
low input bias current, high input impedance, high slew rate
and wide bandwidth. The device has low noise and offset
voltage drift.
j Internally trimmed offset voltage:
5 mV max
j Low input bias current:
50 pA Typ.
0.01 pA/√Hz Typ.
j Low input noise current:
j Wide gain bandwidth:
4 MHz Typ.
j High slew rate:
13 V/µs Typ.
j Low supply current:
7.2 mA Typ.
1012Ω Typ.
j High input impedance:
j Low total harmonic distortion:
AV = 10, RL = 10KΩ, VO = 20VP-P
BW = 20Hz – 20KHz
≤0.02% Typ.
j Low 1/f noise corner:
50 Hz Typ.
j Fast settling time to 0.01%:
2 µs Typ.
Ordering Information
NS Part Number
SMD Part Number
LF147J/883
LF147J-SMD
8102306CA
NS Package Number
Package Description
J14A
14LD CERDIP
J14A
14LD CERDIP
Connection Diagram
Dual-In-Line Package
20122601
Top View
See NS Package Number J14A
BI-FET II™ is a trademark of National Semiconductor Corporation.
© 2005 National Semiconductor Corporation
DS201226
www.national.com
LF147QML Wide Bandwidth Quad JFET Input Operational Amplifier
April 2005
LF147QML
Simplified Schematic
⁄ Quad
14
20122613
Detailed Schematic
20122609
www.national.com
2
LF147QML
Absolute Maximum Ratings (Note 1)
± 22V
± 38V
± 19V
Supply Voltage
Differential Input Voltage
Input Voltage Range
(Note 2)
Output Short Circuit Duration (Note 3)
Continuous
Power Dissipation (Notes 4, 5)
900 mW
TJ max
150˚C
θJA CERDIP
70˚C/W
Operating Temperature Range
−55˚C ≤ TA ≤ 125˚C
Storage Temperature Range
−65˚C ≤ TA ≤ 150˚C
Lead Temperature (Soldering, 10 sec.)
260˚C
ESD (Note 6)
900V
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup
Description
Temp (˚C)
1
Static tests at
25
2
Static tests at
125
3
Static tests at
-55
4
Dynamic tests at
25
5
Dynamic tests at
125
6
Dynamic tests at
-55
7
Functional tests at
25
8A
Functional tests at
125
8B
Functional tests at
-55
9
Switching tests at
25
10
Switching tests at
125
11
Switching tests at
-55
LF147 883 Electrical Characteristics
DC Parameters
The following conditions apply, unless otherwise specified:
Symbol
Parameter
Conditions
VIO
Input Offset Voltage
RS = 10KΩ
IIO
Input Offset Current
RL = 10KΩ
± IIB
Input Bias Current
VCM
Input Common Mode Voltage
Range
VS = ± 20V, VCM = 0V, RS = 50Ω
Notes
RL =10KΩ
(Note 7)
CMRR
Common Mode Rejection Ratio RS ≤ 10KΩ, VCM = ± 16V
PSRR
Power Supply Rejection Ratio
IS
Supply Current
IOS
Output Short Circuit
Min
Subgroups
Max
Unit
5
mV
1
8
mV
2, 3
0.1
nA
1
25
nA
2, 3
-0.2
0.2
nA
1
-50
50
nA
2, 3
-16
16
V
1, 2, 3
80
dB
1, 2, 3
VS = ± 20V to VS = ± 5V
80
dB
1, 2, 3
11
mA
1, 2, 3
VS = ± 15V, VI = +1V,
Output short to GND
-57
-13
mA
1, 3
-40
-6
mA
2
VS = ± 15V, VI = -1V,
13
57
mA
1, 3
Output short to GND
6
40
mA
2
3
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LF147QML
LF147
883 Electrical Characteristics
(Continued)
DC Parameters
(Continued)
The following conditions apply, unless otherwise specified:
Symbol
Parameter
Conditions
AVS
Large Signal Voltage Gain
VO
Output Voltage Swing
VS = ± 20V, VCM = 0V, RS = 50Ω
Min
VS = ± 15V, VO = 0 to +10V,
RL = 2KΩ, RS = 10KΩ
(Note 8)
50
V/mV
4
(Note 8)
25
V/mV
5, 6
VS = ± 15V, VO = 0 to -10V
RL = 2 KΩ, RS=10KΩ
(Note 8)
50
V/mV
4
(Note 8)
25
V/mV
5, 6
12
V
4, 5, 6
V
4, 5, 6
VS = ± 15V, RL = 10KΩ,
VI = +1V
VS = ± 15V, RL = 10KΩ,
VI = -1V
Max
-12
VS = ± 15V, RL = 2KΩ, VI = +1V
10
VS = ± 15V, RL = 2KΩ, VI = -1V
Unit
Subgroups
Notes
V
4, 5, 6
-10
V
4, 5, 6
Max
Unit
Subgroups
V/µs
7
8A, 8B
AC Parameters
The following conditions apply, unless otherwise specified:
VS = ± 20V, VCM = 0V, RS = 50Ω
Symbol
Parameter
Conditions
SR
Slew Rate
VI = -5V to +5V, AV=1
RL = 2KΩ, CL = 100pF
8
5
V/µs
VI = +5V to -5V, AV = 1
RL = 2KΩ, CL = 100pF
8
V/µS
7
5
V/µS
8A, 8B
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Notes
4
Min
LF147QML
LF147 SMD Electrical Characteristics
DC Parameters
The following conditions apply, unless otherwise specified:
Symbol
VIO
Parameter
Input Offset Voltage
VS = ± 15V, VCM = 0V, RS = 0Ω, RL = Open
Conditions
Notes
Vcc = ± 15V
Vcc = ± 9V
Min
Max
Unit
Subgroups
-9
9
mV
1
-15
15
mV
2, 3
-9
9
mV
1
IIO
Input Offset Current
-0.1
0.1
nA
1
-20
20
nA
2
± IIB
Input Bias Current
-0.2
0.2
nA
1
-50
50
AVS
Large Signal Voltage Gain
nA
2
VS = ± 15V, VO = 0 to +10V,
RL = 2KΩ
35
V/mV
4
15
V/mV
5, 6
VS = ± 15V, VO = 0 to -10V,
RL = 2KΩ
35
V/mV
4
15
V/mV
5, 6
Output Voltage Swing
VS = ± 15V, RL = 10KΩ
12
V
4, 5, 6
10
-VO
Output Voltage Swing
VS = ± 15V, RL = 2KΩ
VS = ± 15V, RL = 10KΩ
VS = ± 15V, RL = 2KΩ
VCM
Input Common Mode Voltage
Range
+VO
(Note 7)
V
4, 5, 6
-12
V
4, 5, 6
-10
V
4, 5, 6
V
1, 2, 3
± 11
CMRR
Common Mode Rejection Ratio VCM = ± 11V
80
dB
1
+PSRR
Power Supply Rejection Ratio
+VS = 15 to 9V, -VS = -15V
80
dB
1
-PSRR
Power Supply Rejection Ratio
+VS = 15V, -VS = -15 to -9V
80
dB
1
+IS
Supply Current
-IS
Supply Current
+IOS
Output Short Circuit Current
-IOS
Output Short Circuit Current
14
-14
VS = ± 15V
VS = ± 15V
mA
1
mA
1
-57
-13
mA
1, 3
-40
-6
mA
2
13
57
mA
1, 3
6
40
mA
2
Unit
Subgroups
V/µs
7
8A, 8B
AC Parameters
The following conditions apply, unless otherwise specified:
Symbol
SR
Parameter
Slew Rate
VS = ± 15V, VCM = 0V, RS = 0Ω, RL = Open
Conditions
Notes
Min
Max
VI = -5V to +5V, AV=1
RL = 2KΩ, CL = 100pF
8
5
V/µs
VI = +5V to -5V, AV=1
RL = 2KΩ, CL = 100pF
8
V/µS
7
5
V/µS
8A, 8B
5
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LF147QML
Notes:
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 3: Any of the amplifier outputs can be shorted to ground indefinitely, however, more than one should not be simultaneously shorted as the maximum junction
temperature will be exceeded.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (Package junction
to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax — TA) / θJA or the
number given in the Absolute Maximum Ratings, whichever is lower.
Note 5: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside
guaranteed limits.
Note 6: Human body model, 1.5 kΩ in series with 100 pF.
Note 7: Guaranteed by CMRR test
Note 8: V/mV in units column is equivalent to K in datalog
Typical Performance Characteristics
Input Bias Current
Input Bias Current
20122614
20122615
Positive Common-Mode
Input Voltage Limit
Supply Current
20122616
20122617
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6
LF147QML
Typical Performance Characteristics
(Continued)
Negative Common-Mode
Input Voltage Limit
Positive Current Limit
20122619
20122618
Negative Current Limit
Output Voltage Swing
20122620
20122621
Output Voltage Swing
Gain Bandwidth
20122623
20122622
7
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LF147QML
Typical Performance Characteristics
(Continued)
Bode Plot
Slew Rate
20122624
20122625
Undistorted Output Voltage
Swing
Distortion vs Frequency
20122626
20122627
Open Loop Frequency
Response
Common-Mode Rejection
Ratio
20122629
20122628
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8
LF147QML
Typical Performance Characteristics
(Continued)
Power Supply Rejection
Ratio
Equivalent Input Noise
Voltage
20122630
20122631
Open Loop Voltage Gain
Output Impedance
20122633
20122632
Inverter Settling Time
20122634
9
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LF147QML
Pulse Response
RL=2 kΩ, CL=10 pF
Large Signal Inverting
Small Signal Inverting
20122606
Large Signal Non-Inverting
20122604
Small Signal Non-Inverting
20122607
20122605
Current Limit (RL=100Ω)
20122608
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10
The LF147 is an op amp with an internally trimmed input
offset voltage and JFET input devices (BI-FET II). These
JFETs have large reverse breakdown voltages from gate to
source and drain eliminating the need for clamps across the
inputs. Therefore, large differential input voltages can easily
be accommodated without a large increase in input current.
The maximum differential input voltage is independent of the
supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
cause large currents to flow which can result in a destroyed
unit.
Precautions should be taken to ensure that the power supply
for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed backwards in a
socket as an unlimited current surge through the resulting
forward diode within the IC could cause fusing of the internal
conductors and result in a destroyed unit.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order
to ensure stability. For example, resistors from the output to
an input should be placed with the body close to the input to
minimize “pick-up” and maximize the frequency of the feedback pole by minimizing the capacitance from the input to
ground.
Exceeding the negative common-mode limit on either input
will force the output to a high state, potentially causing a
reversal of phase to the output. Exceeding the negative
common-mode limit on both inputs will force the amplifier
output to a high state. In neither case does a latch occur
since raising the input back within the common-mode range
again puts the input stage and thus the amplifier in a normal
operating mode.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance
from the input of the device (usually the inverting input) to AC
ground set the frequency of the pole. In many instances the
frequency of this pole is much greater than the expected 3
dB frequency of the closed loop gain and consequently there
is negligible effect on stability margin. However, if the feedback pole is less than approximately 6 times the expected 3
dB frequency a lead capacitor should be placed from the
output to the input of the op amp. The value of the added
capacitor should be such that the RC time constant of this
capacitor and the resistance it parallels is greater than or
equal to the original feedback pole time constant.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
Each amplifier is individually biased by a zener reference
which allows normal circuit operation on ± 4.5V power supplies. Supply voltages less than these may result in lower
gain bandwidth and slew rate.
11
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LF147QML
The LF147 will drive a 2 kΩ load resistance to ± 10V over the
full temperature range. If the amplifier is forced to drive
heavier load currents, however, an increase in input offset
voltage may occur on the negative voltage swing and finally
reach an active current limit on both positive and negative
swings.
Application Hints
LF147QML
Typical Applications
Digitally Selectable Precision Attenuator
20122610
All resistors 1% tolerance
• Accuracy of better than 0.4% with standard 1% value resistors
No offset adjustment necessary
• Expandable to any number of stages
• Very high input impedance
A1
A2
A3
VO
0
0
0
0
0
0
1
−1 dB
0
1
0
−2 dB
0
1
1
−3 dB
1
0
0
−4 dB
1
0
1
−5 dB
1
1
0
−6 dB
1
1
1
−7 dB
Attenuation
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12
LF147QML
Typical Applications
(Continued)
Long Time Integrator with Reset, Hold and Starting Threshold Adjustment
20122611
• VOUT starts from zero and is equal to the integral of the input voltage with respect to the threshold voltage:
• Output starts when VIN ≥V TH
• Switch S1 permits stopping and holding any output value
• Switch S2 resets system to zero
13
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LF147QML
Typical Applications
(Continued)
Universal State Variable Filter
20122612
For circuit shown:
fO=3 kHz, fNOTCH=9.5 kHz
Q=3.4
Passband gain:
Highpass — 0.1
Bandpass — 1
Lowpass — 1
Notch — 10
• foxQ≤200 kHz
• 10V peak sinusoidal output swing without slew limiting to 200 kHz
• See LM148 data sheet for design equations
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14
Revision
04/18/05
A
Section
Originator
New Release into corporate format
15
L. Lytle
Changes
2 MDS datasheets converted into one Corp.
datasheet format. MNLF147–X Rev. 0A2
and MDLF147–X Rev. 0A1, data sheets will
be Archived
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LF147QML
Date
Released
LF147QML Wide Bandwidth Quad JFET Input Operational Amplifier
Physical Dimensions
inches (millimeters) unless otherwise noted
Ceramic Dual-In-Line Package (J)
NS Package Number J14A
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the right at any time without notice to change said circuitry and specifications.
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