MM54C221/MM74C221 Dual Monostable Multivibrator General Description The MM54C221/MM74C221 dual monostable multivibrator is a monolithic complementary MOS integrated circuit. Each multivibrator features a negative-transition-triggered input and a positive-transition-triggered input, either of which can be used as an inhibit input, and a clear input. Once fired, the output pulses are independent of further transitions of the A and B inputs and are a function of the external timing components CEXT and REXT. The pulse width is stable over a wide range of temperature and VCC. Pulse stability will be limited by the accuracy of external timing components. The pulse width is approximately defined by the relationship tW(OUT) & CEXT REXT. For further information and applications, see AN-138. Features Y Y Y Y Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL compatibility 4.5V to 15V 1.0V 0.45 VCC (typ.) fan out of 2 driving 74L Connection Diagrams Timing Component Dual-In-Line Package TL/F/5904 – 1 TL/F/5904 – 2 Top View Order Number MM54C221 or MM74C221 Truth Table Inputs Outputs Clear A B Q Q L X X L H X H X L H X X L L H H L u É ß H v H É ß C1995 National Semiconductor Corporation TL/F/5904 H L e e e e É e ß e e X u v High level Low level Transition from low to high Transition from high to low One high level pulse One low level pulse Irrelevant RRD-B30M105/Printed in U. S. A. MM54C221/MM74C221 Dual Monostable Multivibrator February 1988 Absolute Maximum Ratings (Note 1) Power Dissipation Dual-In-Line Small Outline If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Voltage at Any Pin Operating VCC Range b 0.3V to VCC a 0.3V Operating Temperature Range MM54C221 MM74C221 b 55§ C to a 125§ C b 40§ C to a 85§ C Storage Temperature Range b 65§ C to a 150§ C 700 mW 500 mW Absolute Maximum VCC REXT t 80 VCC (X) Lead Temperature (Soldering, 10 seconds) 4.5V to 15V 18V 260§ C DC Electrical Characteristics Max/min limits apply across temperature range, unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS to CMOS VIN(1) Logical ‘‘1’’ Input Voltage VCC e 5V VCC e 10V VIN(0) Logical ‘‘0’’ Input Voltage VCC e 5V VCC e 10V VOUT(1) Logical ‘‘1’’ Output Voltage VCC e 5V, IO e b10 mA VCC e 10V, IO e b10 mA VOUT(0) Logical ‘‘0’’ Output Voltage VCC e 5V, IO e a 10 mA VCC e 10V, IO e a 10 mA IIN(1) Logical ‘‘1’’ Input Current VCC e 15V, VIN e 15V IIN(0) Logical ‘‘0’’ Input Current VCC e 15V, VIN e 0V ICC Supply Current (Standby) VCC e 15V, REXT e % , Q1, Q2 e Logic ‘‘0’’ (Note 3) 0.05 ICC Supply Current (During Output Pulse) VCC e 15V, Q1 e Logic ‘‘1’’, Q2 e Logic ‘‘0’’ (Figure 4) 15 mA VCC e 5V, Q1 e Logic ‘‘1’’, Q2 e Logic ‘‘0’’ (Figure 4) 2 mA Leakage Current at R/CEXT Pin 3.5 8.0 V V 1.5 2.0 4.5 9.0 V V 0.5 1 0.005 b 1.0 VCC e 15V, VCEXT e 5V V V 1.0 b 0.005 0.01 V V mA mA 300 3.0 mA mA CMOS/LPTTL Interface VIN(1) Logical ‘‘1’’ Input Voltage 54C VCC e 4.5V 74C VCC e 4.75V VIN(0) Logical ‘‘0’’ Input Voltage 54C VCC e 4.5V 74C VCC e 4.75V VOUT(1) Logical ‘‘1’’ Output Voltage 54C VCC e 4.5V, IO e b360 mA 74C VCC e 4.75V, IO e b360 mA VOUT(0) Logical ‘‘0’’ Output Voltage 54C VCC e 4.5V, IO e 360 mA 74C VCC e 4.75V, IO e 360 mA VCC b 1.5 VCC b 1.5 V V 0.8 0.8 2.4 2.4 V V V V 0.4 0.4 V V Output Drive (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current) ISOURCE Output Source Current (P-Channel) VCC e 5V TA e 25§ C, VOUT e 0V b 1.75 mA ISOURCE Output Source Current (P-Channel) VCC e 10V TA e 25§ C, VOUT e 0V b8 mA ISINK Output Sink Current (N-Channel) VCC e 5V TA e 25§ C, VOUT e VCC 1.75 mA ISINK Output Sink Current (N-Channel) VCC e 10V TA e 25§ C, VOUT e VCC 8 mA 2 AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise noted Symbol Parameter Typ Max Units tpd A, B Propagation Delay from Trigger Input (A, B) to Output Q, Q VCC e 5V VCC e 10V 250 120 500 250 ns ns tpd CL Propagation Delay from Clear Input (CL) to Output Q, Q VCC e 5V VCC e 10V 250 120 500 250 ns ns tS Time Prior to Trigger Input (A, B) that Clear must be Set VCC e 5V VCC e 10V 150 60 50 20 ns ns tW(A, B) Trigger Input (A, B) Pulse Width VCC e 5V VCC e 10V 150 70 50 30 ns ns tW(CL) Clear Input (CL) Pulse Width VCC e 5V VCC e 10V 150 70 50 30 ns ns tW(OUT) Q or Q Output Pulse Width VCC e 5V, REXT e 10k, CEXT e 0 pF 900 ns VCC e 10V, REXT e 10k, CEXT e 0 pF 350 ns VCC e 15V, REXT e 10k, CEXT e 0 pF 320 ns RON CIN Conditions Min VCC e 5V, REXT e 10k, CEXT e 1000 pF (Figure 1) 9.0 10.6 12.2 ms VCC e 10V, REXT e 10k, CEXT e 1000 pF (Figure 1) 9.0 10 11 ms VCC e 15V, REXT e 10k, CEXT e 1000 pF (Figure 1) 8.9 9.8 10.8 ms VCC e 5V, REXT e 10k, CEXT e 0.1 mF (Figure 2) 900 1020 1200 ms VCC e 10V, REXT e 10k, CEXT e 0.1 mF (Figure 2) 900 1000 1100 ms VCC e 15V, REXT e 10k, CEXT e 0.1 mF (Figure 2) 900 990 1100 ms 50 25 16.7 150 65 45 X X X 90 90 % % 25 pF pF ON Resistance of Transistor between R/CEXT to CEXT VCC e 5V (Note 4) VCC e 10V (Note 4) VCC e 15V (Note 4) Output Duty Cycle R e 10k, C e 1000 pF R e 10k, C e 0.1 mF (Note 5) Input Capacitance R/CEXT Input (Note 2) Any Other Input (Note 2) 15 5 *AC Parameters are guaranteed by DC correlated testing. Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Capacitance is guaranteed by periodic testing. Note 3: In Standby (Q e Logic ‘‘0’’) the power dissipated equals the leakage current plus VCC/REXT. Note 4: See AN-138 for detailed explanation RON. Note 5: Maximum output duty cycle e REXT/REXT a 1000. 3 Typical Performance Characteristics 0% Point pulse width: At At At VCC e 5V, TW e 10.6 ms VCC e 10V, TW e 10 ms VCC e 15V, TW e 9.8 ms Percentage of units within a 4%: At At At VCC e 5V, 90% of units VCC e 10V, 95% of units VCC e 15V, 98% of units TL/F/5904 – 3 FIGURE 1. Typical Distribution of Units for Output Pulse Width 0% Point pulse width: At At At VCC e 5V, TW e 1020 ms VCC e 10V, TW e 1000 ms VCC e 15V, TW e 982 ms Percentage of units within a 4%: At At At VCC e 5V, 95% of units VCC e 10V, 97% of units VCC e 15V, 98% of units TL/F/5904 – 4 FIGURE 2. Typical Distribution of Units for Output Pulse Width TL/F/5904 – 5 TL/F/5904 – 6 FIGURE 3. Typical Variation in Output Pulse Width vs Temperature FIGURE 4. Typical Power Dissipation per Package 4 Switching Time Waveforms tr e tf e 20 ns TL/F/5904 – 7 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C221J or MM74C221C NS Package Number J16A 5 MM54C221/MM74C221 Dual Monostable Multivibrator Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number MM54C221N or MM74C221N NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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