NSC LM4853

LM4853
Mono 1.5 W / Stereo 300mW Power Amplifier
General Description
Key Specifications
The LM4853 is an audio power amplifier capable of delivering 1.5W (typ) of continuous average power into a mono 4Ω
bridged-tied load (BTL) with 1% THD+N or 95mW per channel of continuous average power into stereo 32Ω singleended (SE) loads with 1% THD+N, using a 5V power supply.
The LM4853 can automatically switch between mono BTL
and stereo SE modes utilizing a headphone sense pin. It is
ideal for any system that provides both a monaural speaker
output and a stereo line or headphone output
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Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. Since the LM4853 does not require
bootstrap capacitors or snubber networks, it is optimally
suited for low-power portable systems.
The LM4853 features an externally controlled, micropower
consumption shutdown mode and thermal shutdown protection. The unity-gain stable LM4853’s gain is set by external
gain-setting resistors
Output Power at 1% THD+N, 1kHz:
LM4853LD 3Ω BTL
LM4853LD 4Ω BTL
LM4853MM 4Ω BTL
LM4853MM,LD 8Ω BTL
LM4853MM,LD 8Ω SE
LM4853MM,LD 32Ω SE
THD+N at 1kHz, 95mW into 32Ω SE
Single Supply Operation
Shutdown Current
1.9W (typ)
1.7W (typ)
1.5W (typ)
1.1W (typ)
300mW (typ)
95mW (typ)
1% (typ)
2.4 to 5.5V
18µA (typ)
Features
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Mono 1.5W BTL or stereo 300mW output
Headphone sense
“Click and pop” suppression circuitry
No bootstrap capacitors required
Thermal shutdown protection
Unity-gain stable
Available in space-saving MSOP and LLP packaging
Applications
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Portable computers
Desktop computers
PDA’s
Handheld games
Connection Diagrams
20033429
Top View
10 Lead MSOP
Order Number LM4853MM
See NS Package Number MUB10A
20033428
Top View
14 Lead LLP
Order Number LM4853LD
See NS Package Number LDA14A
Boomer ® is a registered trademark of National Semiconductor Corporation.
© 2003 National Semiconductor Corporation
DS200334
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LM4853 Mono 1.5 W / Stereo 300mW Power Amplifier
January 2003
LM4853
Typical Application
20033431
FIGURE 1. Typical Audio Amplifier Application Circuit
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2
Thermal Resistance
(Note 2)
θJA (typ) — MUB10A
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
6.0V
Storage Temperature
52˚C/W
θJA (typ) — LDA14A (Note 10)
56˚C/W
θJC (typ) — LDA14A
4.3˚C/W
−65˚C to +150˚C
ESD Susceptibility (Note 4)
3.5kV
ESD Machine model (Note 7)
250V
Junction Temperature (TJ)
194˚C/W
θJC (typ) — MUB10A
Operating Ratings (Note 2)
Temperature Range
150˚C
−40˚C ≤ to 85˚C
Solder Information (Note 1)
2.4V ≤ VDD ≤ 5.5V
Supply Voltage VDD
Small Outline Package
Vapor Phase (60 sec.)
215˚C
Infrared (15 sec.)
220˚C
Note 1: See AN-450 "Surface Mounting and their effects on Product Reliability" for other methods of soldering surface mount devices.
Electrical Characteristics (Notes 2, 8)
The following specifications apply for VDD= 5.0V, TA= 25˚C unless otherwise specified.
Symbol
Parameter
Conditions
LM4853
Typical
(Note 5)
VDD
Supply Voltage
Limit
(Note 6)
Units
(Limits)
2.4
V (min)
5.5
V (max)
IDD
Supply Current
BTL Mode; VIN = 0V; IO = 0A
2.4
7.0
mA
SE Mode; VIN = 0V; IO = 0A
2.4
7.0
mA
ISD
Shutdown Current
SD Mode; VSHUTDOWN = VDD
18
VOS
Output Offset Voltage
BTL Mode; AV = 2
BTL OUT+ to BTL OUT−
5.0
40
mV
PO
Output Power
BTL Mode; RL = 3Ω
THD+N = 1%; LM4853LD
1.9
W
BTL Mode; RL = 4Ω
THD+N = 1%; LM4853LD
1.7
W
BTL Mode; RL = 4Ω
THD+N = 1%; LM4853MM
1.5
W
BTL Mode; RL = 8Ω
THD+N = 1%; LM4853MM, LD
1.1
W
SE Mode; RL = 8Ω
THD+N = 1%; LM4853MM, LD
300
mW
SE Mode; RL = 32Ω
THD+N = 1%; LM4853MM, LD
95
mW
µA
VIH
Shutdown Input Voltage High
Is < 80µA
2.0
V (min)
VIL
Shutdown Input Voltage Low
Is > 0.5mA
0.8
V (max)
Crosstalk Channel Seperation
SE Mode, RL = 32Ω; f = 1kHz
3
73
dB
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LM4853
Absolute Maximum Ratings
LM4853
Electrical Characteristics (Notes 2, 8)
The following specifications apply for VDD= 3.3V, TA= 25˚C unless otherwise specified.
Symbol
Parameter
Conditions
LM4853
Typical
(Note 5)
IDD
Supply Current
Limit
(Note 6)
Units
(Limits)
BTL Mode; VIN = 0V; IO = 0A
2.0
mA
SE Mode; VIN = 0V; IO = 0A
2.0
mA
µA
ISD
Shutdown Current
SD Mode; VSHUTDOWN = VDD
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VOS
Output Offset Voltage
BTL Mode; AV = 2
BTL OUT+ to BTL OUT−
5.0
PO
Output Power
BTL Mode; RL = 8Ω
THD+N = 1%
440
mW
SE Mode; RL = 32Ω
THD+N = 1%
40
mW
40
mV
VIH
Shutdown Input Voltage High
Is < 80µA
2.0
V (min)
VIL
Shutdown Input Voltage Low
Is > 0.5mA
0.8
V (max)
Electrical Characteristics (Notes 2, 8)
The following specifications apply for VDD= 2.7V, TA= 25˚C unless otherwise specified.
Symbol
Parameter
Conditions
LM4853
Typical
(Note 5)
IDD
Supply Current
Limit
(Note 6)
Units
(Limits)
BTL Mode; VIN = 0V; IO = 0A
1.8
mA
SE Mode; VIN = 0V; IO = 0A
1.8
mA
µA
ISD
Shutdown Current
SD Mode; VSHUTDOWN = VDD
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VOS
Output Offset Voltage
BTL Mode; AV = 2
BTL OUT+ to BTL OUT−
5.0
PO
Output Power
BTL Mode; RL = 8Ω
THD+N = 1%
300
mW
SE Mode; RL = 32Ω
THD+N = 1%
25
mW
40
mV
VIH
Shutdown Input Voltage High
Is < 80 µA
2.0
V (min)
VIL
Shutdown Input Voltage Low
Is > 0.5mA
0.8
V (max)
Note 2: Absolute Maximum Rating indicate limits beyond which damage to the device may occur.
Note 3: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor.
Note 5: Typical specifications are specified at +25˚C and represent the most likely parametric norm.
Note 6: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 7: Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200pF cap is charged to the specified voltage, then discharged directly into the
IC with no external series resistor (resistance of discharge path must be under 50Ω).
Note 8: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 9: Limits are guaranteed to National’s AOQL ( Average Outgoing Quality Level ).
Note 10: The given θJA is for an LM4853LD with the Exposed-DAP soldered to an exposed 1in2 area of 1oz printed circuit board copper.
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LM4853
External Components Description
See Figure 1.
Components
Functional Description
1.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a
high pass filter with Ci at fc = 1/(2πRiCi).
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifier’s input terminals. Also creates a
highpass filter with Ri at fc = 1/(2πRiCi). Refer to the section, Proper Selection of External Components,
for an explanation of how to determine the value of Ci.
3.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri.
4.
Cs
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
5.
CB
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of
External Components, for information concerning proper placement and selection of CB.
6.
CO
Output coupling capacitor which blocks the DC voltage at the amplifier’s output. Forms a high pass filter
with the single-ended load RL at fO = 1/(2π RLCO).
Typical Performance Characteristics
LD Specific Characteristics
LM4853LD
THD+N vs Frequency
LM4853LD
THD+N vs Frequency
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200334A6
LM4853LD
THD+N vs Output Power
LM4853LD
THD+N vs Output Power
200334A7
200334A8
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LM4853
Typical Performance Characteristics
LD Specific Characteristics (Continued)
LM4853LD
Power Dissipation vs
Output Power
LM4853LD
Power Derating Curve
200334A9
200334B0
Typical Performance Characteristics
THD+N vs Frequency
THD+N vs Frequency
20033463
20033464
THD+N vs Frequency
THD+N vs Frequency
20033465
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20033466
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LM4853
Typical Performance Characteristics
(Continued)
THD+N vs Frequency
THD+N vs Frequency
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20033468
THD+N vs Frequency
THD+N vs Output Power
20033439
20033440
THD+N vs Output Power
THD+N vs Output Power
20033441
20033442
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LM4853
Typical Performance Characteristics
(Continued)
THD+N vs Output Power
THD+N vs Output Power
20033443
20033444
THD+N vs Output Power
THD+N vs Output Power
20033445
20033446
THD+N vs Output Power
Output Power vs Load Resistance
20033448
20033447
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LM4853
Typical Performance Characteristics
(Continued)
Output Power vs Load Resistance
Output Power vs Supply Voltage
20033449
20033469
Output Power vs Supply Voltage
Dropout Voltage vs Supply Voltage
20033471
20033472
Power Dissipation vs Output Power
Power Dissipation vs Output Power
20033455
20033456
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LM4853
Typical Performance Characteristics
(Continued)
Power Derating Curve
Channel Separation
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20033480
Noise Floor
Open Loop Frequency Response
20033459
20033462
Supply Current vs Supply Voltage
Power Supply Rejection Ratio
20033461
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20033460
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LM4853
Typical Performance Characteristics
(Continued)
Power Supply Rejection Ratio
20033474
via diameter should be 0.012in-0.013in with a 1.27mm pitch.
Ensure efficient thermal conductivity by plating through the
vias.
Application Information
BRIDGED AND SINGLE-ENDED OPERATION
As shown in Figure 1, the LM4853 contains three operational
amplifiers (A1-A3). These amplifiers can be configured for
SE or BTL modes.
In the SE mode, the LM4853 operates as a high current
output dual op amp. A1 and A3 are independent amplifiers
with an externally configured gain of AV = - RF/RI. The
outputs of A1 and A3 are used to drive an external set of
headphones plugged into the headphone jack. Amplifier A2
is shut down to a high output impedance state in SE mode.
This prevents any current flow into the mono bridge-tied
load, thereby muting it.
In BTL mode, A3 is shut down to a high impedance state.
The audio signal from the RIGHT IN pin is directed to the
inverting input of A1. As a result, the LEFT IN and RIGHT IN
audio signals, VINL and VINR, are summed together at the
input of A1. A2 is then activated with a closed-loop gain of AV
= -1 fixed by two internal 20kΩ resistors. The outputs of A1
and A2 are then used to drive the mono bridged-tied load.
Best thermal performance is achieved with the largest practical heat sink area. If the heatsink and amplifier share the
same PCB layer, a nominal 2.5in2 area is necessary for 5V
operation with a 4Ω load. Heatsink areas not placed on the
same PCB layer as the LM4853 should be 5in2 (min) for the
same supply voltage and load resistance. The last two area
recommendations apply for 25˚C ambient temperature. Increase the area to compensate for ambient temperatures
above 25˚C. The LM4853’s power de-rating curve in the
Typical Performance Characteristics shows the maximum
power dissipation versus temperature. An example PCB layout for the LD package is shown in the Demonstration
Board Layout section. Further detailed and specific information concerning PCB layout, fabrication, and mounting an
LD (LLP) package is available from National Semiconductor’s Package Engineering Group under application note
AN1187.
BRIDGE CONFIGURATION EXPLANATION
When the LM4853 is in BTL mode, the output of amplifier A1
serves as the input to amplifier A2, which results in both
amplifiers producing signals identical in magnitude, but out
of phase by 180˚. Consequently, the differential gain for the
mono channel is:
EXPOSED-DAP PACKAGE PCB MOUNTING
CONSIDERATION
The LM4853’s exposed-DAP (die attach paddle) package
(LD) provides a low thermal resistance between the die and
the PCB to which the part is mounted and soldered. This
allows rapid heat transfer from the die to the surrounding
PCB copper traces, ground plane, and surrounding air. The
result is a low voltage audio power amplifier that produces
1.7W at ≤ 1% THD+N with a 4Ω load. This high power is
achieved through careful consideration of necessary thermal
design. Failing to optimize thermal design may compromise
the LM4853’s high power performance and activate unwanted, though necessary, thermal shutdown protection.
The LD package must have its DAP soldered to a copper
pad on the PCB. The DAP’s PCB copper pad is connected to
a large plane of continuous unbroken copper. This plane
forms a thermal mass, heat sink, and radiation area. Place
the heat sink area on either outside plane in the case of a
two-sided PCB, or on an inner layer of a board with more
than two layers. Connect the DAP copper pad to the inner
layer or backside copper heat sink area with 4(2x2) vias. The
AVD = VOUT / (VINL + VINR) = 2 x (RF / RI)
(1)
Driving a load differentially through the BTL OUT- and BTL
OUT+ outputs is an amplifier configuration commonly referred to as "bridged mode". Bridged mode operation is
different from the classical single-ended amplifier configuration where one side of its load is connected to ground.
A bridge amplifier design has a few distinct advantages over
the single-ended configuration. It drives a load differentially,
which doubles output swing for a specified supply voltage.
This produces four times the output power as that produced
by a single-ended amplifier under the same conditions. This
increase in attainable output power assumes that the amplifier is not current limited or clipped. In order to choose an
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LM4853
Application Information
POWER SUPPLY BYPASSING
(Continued)
amplifier’s closed-loop gain without causing excessive output signal clipping, please refer to the Audio Power Amplifier Design section.
A bridge configuration, such as the one used in LM4853,
also creates a second advantage over single-ended amplifiers. Since the differential outputs, BTL OUT- and BTL OUT+,
are biased at half-supply, no net DC voltage exists across
the load. This eliminates the need for the output coupling
capacitor that a single supply, single-ended amplifier configuration requires. Eliminating an output coupling capacitor
in a single-ended configuration forces the half-supply bias
voltage across the load. This increases internal IC power
dissipation and may cause permanent loudspeaker damage.
As with any power amplifier, proper supply bypassing is
critical for low noise performance and high power supply
rejection. The capacitor location on both the bypass and
power supply pins should be as close to the device as
possible. The value of the pin bypass capacitor, CB, directly
affects the LM4853’s half-supply voltage stability and PSRR.
The stability and supply rejection increase as the bypass
capacitor’s value increases Typical applications employ a 5V
regulator with a 10µF and a 0.1µF bypass capacitors which
aid in supply filtering. This does not eliminate the need for
bypassing the supply nodes of the LM4853. The selection of
bypass capacitors, especially CB, is thus dependent upon
desired PSRR requirements, click and pop performance,
system cost, and size constraints.
POWER DISSIPATION
SHUTDOWN FUNCTION
Whether the power amplifier is bridged or single-ended,
power dissipation is a major concern when designing the
amplifier. Equation 2 states the maximum power dissipation
point for a single-ended amplifier operating at a given supply
voltage and driving a specified load.
In order to reduce power consumption while not in use, the
LM4853 features amplifier bias circuitry shutdown. This shutdown function is activated by applying a logic high to the
SHUTDOWN pin. The trigger point is 2.0V minimum for a
logic high level, and 0.8V maximum for a logic low level. It is
best to switch between ground and the supply, VDD, to
ensure correct shutdown operation. By switching the SHUTDOWN pin to VDD, the LM4853 supply current draw will be
minimized in idle mode. Whereas the device will be disabled
with shutdown voltages less than VDD, the idle current may
be greater than the typical value of 18µA. In either case, the
SHUTDOWN pin should be tied to a fixed voltage to avoid
unwanted state changes.
PDMAX = (VDD)2/(2π2 RL): Single-Ended
(2)
However, a direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in
internal power dissipation. Equation 3 states the maximum
power dissipation point for a bridge amplifier operating at the
same given conditions.
PDMAX = 4 x (VDD)2/(2π2 RL): Bridge Mode
In many applications, a microcontroller or microprocessor
output is used to control the shutdown circuitry. This provides
a quick, smooth shutdown transition. Another solution is to
use a single-pole, single-throw switch in conjunction with an
external pull-up resistor. When the switch is closed, the
SHUTDOWN pin is connected to ground and enables the
amplifier. If the switch is open, the external pull-up resistor,
RPU2 will disable the LM4853. This scheme guarantees that
the SHUTDOWN pin will not float, thus preventing unwanted
state changes.
(3)
The LM4853 is designed to drive either two single-ended
loads simultaneously or one mono bridged-tied load. In SE
mode, the maximum internal power dissipation is 2 times
that of Equation 2. In BTL mode, the maximum internal
power dissipation is the result of Equation 3. Even with this
substantial increase in power dissipation, the LM4853 does
not require heatsinking. The power dissipation from Equation
3 must not be greater than the power dissipation predicted
by Equation 4:
PDMAX = (TJMAX - TA)/ θJA
HP-IN FUNCTION
The LM4853 features a headphone control pin, HP-IN, that
enables the switching between BTL and SE modes. A logiclow to HP-IN activates the BTL mode, while a logic-high
activates the SE mode.
Figure 2 shows the implementation of the LM4853’s headphone control. The voltage divider formed by RPU1 and RD1
sets the voltage at HP-IN to be approximately 50mV with no
headphones plugged into the system. This logic-low voltage
at the HP-IN pin enables the BTL mode
When a set of headphones is plugged into the system, the
headphone jack’s contact pin is disconnected from the signal
pin. This also interrupts the voltage divider set up by the
resistors RPU1 and RD1. Resistor RPU1 applies VDD to the
HP-IN pin, switching the LM4853 out of BTL mode and into
SE mode. The amplifier then drives the headphones, whose
impedance is in parallel with resistors RD1 and RD2. Resistors RD1 and RD2 have negligible effect on the output drive
capability since the typical impedance of headphones is
32Ω.
(4)
For the package MUB10A, θJA = 194˚C/W. TJMAX = 150˚C
for the LM4853. Depending on the ambient temperature, TA,
of the surroundings, Equation 4 can be used to find the
maximum internal power dissipation supported by the IC
packaging. If the result of Equation 3 is greater than that of
Equation 4, then either the supply voltage must be decreased, the load impedance increased, or the ambient temperature reduced. For the typical application of a 5V power
supply, and an 8Ω bridged load, the maximum ambient
temperature possible without violating the maximum junction
temperature is approximately 27˚C for package MUB10A.
This assumes the device operates at maximum power dissipation and uses surface mount packaging. Internal power
dissipation is a function of output power. If typical operation
is not around the maximum power dissipation point, operation at higher ambient temperatures is possible. Refer to the
Typical Performance Characteristics curves for power dissipation information for different output power levels.
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sized capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers
used in portable systems, whether internal or external, have
little ability to reproduce signals below 150Hz. Thus, large
value input and output capacitors may not increase system
performance.
(Continued)
AUDIO POWER AMPLIFIER DESIGN
Design a 1W / 8Ω Bridged Audio Amplifier
Given:
•
•
•
•
•
Power Output:
Load Impedance
Input Level:
Input Impedance:
Bandwidth:
1WRMS
8Ω
1VRMS
20kΩ
100Hz - 20kHz ± 0.25dB
A designer must first determine the minimum supply voltage
needed to obtain the specified output power. By extrapolating from the Output Power vs Supply Voltage graphs in the
Typical Performance Characteristics section, the supply
rail can be easily found. A second way to determine the
minimum supply rail is to calculate the required VOPEAK
using Equation 5 and add the dropout voltage. This results in
Equation 6, where VODTOP and VODBOT are extrapolated
from the Dropout Voltage vs Supply Voltage curve in the
Typical Performance Characteristics section.
20033450
FIGURE 2. Headphone Control Circuit
Also shown in Figure 2 are the electrical connections for the
headphone jack and plug. A 3-wire plug consists of a Tip,
Ring, and Sleave, where the Tip and Ring are audio signal
conductors and the Sleave is the common ground return.
One control pin for each headphone jack is sufficient to
indicate to the control inputs that a user has inserted a plug
into the jack and that the headphone mode of operation is
desired.
To ensure smooth transition from BTL to SE operation, it is
important to connect HP-IN and RPU1 to the control pin on
the Right Output of the headphone jack. The control pin on
the Left Output of the headphone jack should be left open.
Connecting the node between the HP-IN and RPU1 to the
Left Output control pin may cause unwanted state changes
to the HP-IN pin.
(5)
VDD ≥ (VOPEAK + (VODTOP + VODBOT))
(6)
Using the Output Power vs Supply Voltage graph for an 8Ω
load, the minimum supply rail is 4.7V. But since 5V is a
standard supply voltage in most applications, it is chosen for
the supply rail. Extra supply voltage creates headroom that
allows the LM4853 to reproduce peaks in excess of 1W
without producing audible distortion. However, the designer
must make sure that the chosen power supply voltage and
output load does not violate the conditions explained in the
Power Dissipation section.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equation 7.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical for optimum device
and system performance. While the LM4853 is tolerant to a
variety of external component combinations, consideration
must be given to the external component values that maximize overall system quality.
The LM4853’s unity-gain stability allows a designer to maximize system performance. The LM4853’s gain should be set
no higher than necessary for any given application. A low
gain configuration maximizes signal-to-noise performance
and minimizes THD+N. However, a low gain configuration
also requires large input signals to obtain a given output
power. Input signals equal to or greater than 1VRMS are
available from sources such as audio codecs. Please refer to
the section, Audio Power Amplifier Design, for a more
complete explanation of proper gain selection.
(7)
RF / RI = AVD / 2
Selecting Input and Output Capacitor Values
Besides gain, one of the major considerations is the closedloop bandwidth of the amplifier. To a large extent, the bandwidth is dictated by the choice of external components
shown in Figure 1. The input coupling capacitor CI and
resistor RI form a first order high pass filter that limits low
frequency response. CI’s value should be based on the
desired frequency response weighed against the following:
Large value input and output capacitors are both expensive
and space consuming for portable designs. Clearly a certain
(8)
From Equation 6, the minimum AVD is 2.83; use AVD = 3.
The desired input impedance was 20kΩ, and with an AVD of
3, using Equation 8 results in an allocation of RI = 20kΩ and
RF = 30kΩ.
The final design step is to set the amplifier’s −3dB frequency
bandwidth. To achieve the desired ± 0.25dB pass band
magnitude variation limit, the low frequency response must
extend to at least one−fifth the lower bandwidth limit and the
high frequency response must extend o at least five times
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LM4853
Application Information
LM4853
Application Information
pendant on the interconnect (PCB trace and wire) resistance
between the amplifier output pins and the load’s connections. Residual trace resistance causes a voltage drop,
which results in power dissipated in the trace and not in the
load as desired. For example, 0.1Ω trace resistance reduces
the output power dissipated by a 4Ω load from 2.0W to
1.95W. This problem of decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output voltage
swing, PCB traces that connect the output pins to a load
must be as wide as possible.
(Continued)
the upper bandwidth limit. The variation for both response
limits is 0.17dB, well within the ± 0.25dB desired limit. This
results in:
fL = 100Hz / 5 = 20Hz
fH = 20kHz x 5 = 100kHz
As stated in the External Components section, RI in conjunction with CI create a highpass filter. Find the coupling
capacitor’s value using Equation 9.
CI ≥ 1 / (2πRIfL)
CI ≥ 1 / ( 2π x 20kΩ x 20Hz) = 0.397µF
Poor power supply regulation adversely affects maximum
output power. A poorly regulated supply’s output voltage
decreases with increasing load current. Reduced supply
voltage causes decreased headroom, output signal clipping,
and reduced output power. Even with tightly regulated supplies, trace resistance creates the same effects as poor
supply regulation. Therefore, making the power supply
traces as wide as possible helps maintain full output voltage
swing.
(9)
Use a 0.39µF capacitor, the closest standard value.
The high frequency pole is determined by the product of the
desired high frequency pole, fH, and the differential gain,
AVD. With AVD = 3 and fH = 100kHz, the resulting GBWP =
150kHz which is much smaller than the LM4853 GBWP of
10MHz. This difference indicates that a designer can still use
the LM4853 at higher differential gains without bandwidth
limitations.
PCB LAYOUT AND SUPPLY REGULATION
CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω LOADS
Power dissipated by a load is a function of the voltage swing
across the load and the load’s impedance. As load impedance decreases, load dissipation becomes increasingly de-
Demonstration Board Layout
200334A1
FIGURE 3. Recommended MM PC Board Layout:
Component-Side SilkScreen
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14
LM4853
Demonstration Board Layout
(Continued)
200334A2
FIGURE 4. Recommended MM PC Board Layout:
Component-Side Layout
200334A3
FIGURE 5. Recommended MM PC Board Layout:
Bottom-Side Layout
15
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LM4853
Physical Dimensions
inches (millimeters) unless otherwise noted
10-Lead Mini SOIC, 118 Mil Wide, .5mm Pitch PKG
Order Number LM4853MM
NS Package Number MUB10A
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16
LM4853 Mono 1.5 W / Stereo 300mW Power Amplifier
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead LLP, 118 Mil Wide, .8mm Pitch PKG
Order Number LM4853LD
NS Package Number LDA14A
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
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