3W Audio Power Amplifier with Shutdown Mode
General Description
Key Specifications
The HWD2171 is a mono bridged audio power amplifier capable of delivering 3W of continuous average power into a
3Ω load with less than 10% THD when powered by a 5V
power supply (Note 1). To conserve power in portable applications, the HWD2171’s micropower shutdown mode Q(I =
0.6µA, typ) is activated when VDD is applied to the SHUTDOWN pin.
audio power amplifiers are designed specifically to provide
high power, high fidelity audio output. They require
few external components and operate on low supply voltages from 2.0V to 5.5V. Since the HWD2171 does not require
output coupling capacitors, bootstrap capacitors, or snubber
networks, it is ideally suited for low-power portable systems
that require minimum volume and weight.
Additional HWD2171 features include thermal shutdown protection, unity-gain stability, and external gain set.
PO at 10% THD+N, 1kHz
HWD2171LD: 3Ω , 4Ω load
3W (typ), 2.5W (typ)
All other HWD2171 packages: 8Ω loa
1.5W (typ)
Shutdown current
0.6µA (typ)
Supply voltage range
2.0V to 5.5V
THD at 1kHz at 1W continuous average output power
into 8Ω
0.5% (max)
n No output coupling capacitors, bootstrap capacitors, or
snubber circuits required
n Unity-gain stable
n LLP, MSOP, SO, or DIP packaging
n External gain configuration capability
n Pin compatible with the HWD2161
Note 1: An HWD2171LD that has been properly mounted to a circuit board will
deliver 3W into 3Ω (at 10% THD). The other package options for the HWD2171
will deliver 1.5W into 8Ω (at 10% THD). See the Application Information
sections for further information concerning the HWD2171LD, HWD2171MM, n
HWD2171M, and the HWD2171N.
Portable computers
Desktop computers
n Low voltage audio systems
Typical Application
Connection Diagram
MSOP, Small Outline, and DIP Package
Top View
Order Number HWD2171MM, HWD2171M, or HWD2171N
LLP Package
FIGURE 1. Typical Audio Amplifier Application Circuit
Top View
Order Number HWD2171LD
Absolute Maximum Ratings (Note 2)
θJC (typ) — M08A
θJA (typ) — M08A
θJC (typ) — N08E
θJA (typ) — N08E
θJC (typ) — MUA08A
−65˚C to +150˚C
θJA (typ) — MUA08A
−0.3V to VDD to +0.3V
θJC (typ) — LDC08A
Power Dissipation (Note 4)
Internally Limited
θJA (typ) — LDC08A
56˚C/W (Note 9)
ESD Susceptibility (Note 5)
ESD Susceptibility (Note 6)
Supply Voltage
Supply Temperature
Input Voltage
Junction Temperature
Operating Ratings
Temperature Range
Soldering Information
Small Outline Package
−40˚C ≤ TA ≤ 85˚C
2.0V ≤ VDD ≤ 5.5V
Supply Voltage
Vapor Phase (60 sec.)
Infrared (15 sec.)
See AN-450 ″Surface Mounting and their Effects on
Product Reliability″ for other methods of
soldering surface mount devices.
Electrical Characteristics(Notes 2, 3)
The following specifications apply for VDD = 5V and RL = 8Ω unless otherwise specified. Limits apply for TA = 25˚C.
Supply Voltage
(Note 7)
(Note 8)
(Note 7)
Quiescent Power Supply
VIN = 0V, Io = 0A
Shutdown Current
Output Offset Voltage
VIN = 0V
Output Power
THD = 1%, f = 1kHz
HWD2171LD, LR= 3Ω (Note 10)
HWD2171LD, LR= 4Ω (Note 10)
HWD2171, LR= 8Ω (Note 10)
THD+N = 10%, f = 1kHz
HWD2171LD, LR= 3Ω (Note 10)
HWD2171LD, LR= 4Ω (Note 10)
HWD2171, LR= 8Ω (Note 10)
Total Harmonic
20Hz ≤ f ≤ 20kHz, AVD = 2
HWD2171LD, LR= 4Ω, P O = 1.6W
HWD2171, LR= 8Ω, P O = 1W
Power Supply Rejection
VDD = 4.9V to 5.1V
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature TA. The maximum
allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the HWD2171, TJMAX = 150˚C. For
the θJA’s for different packages, please see the Application Information section or the Absolute Maximum Ratings section.
Note 5: Human body model, 100pF discharged through a 1.5kΩ resistor.
Note 6: Machine Model, 220pF–240pF discharged through all pins.
Note 7: Typicals are specified at 25˚C and represent the parametric norm.
Note 8: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 9: The given θJA is for an HWD2171 packaged in an LDC08A with the Exposed–DAP soldered to an exposed 1in2 area of 1oz printed circuit board copper.
Note 10: When driving 3Ω or 4Ω loads from a 5V supply, the HWD2171LD must be mounted to a circuit board.
External Components Description
(Figure 1)
Functional Description
Inverting input resistance that sets the closed-loop gain in conjunction with Rf. This resistor also forms a
high pass filter with Ci at fC= 1/(2π RiCi).
Input coupling capacitor that blocks the DC voltage at the amplifiers input terminals. Also creates a highpass
filter with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components, for an
explanation of how to determine the value of Ci.
Feedback resistance that sets the closed-loop gain in conjunction with Ri.
Supply bypass capacitor that provides power supply filtering. Refer to the Power Supply Bypassing section
for information concerning proper placement and selection of the supply bypass capacitor.
Bypass pin capacitor that provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
Typical Performance Characteristics
LD Specific Characteristics
THD+N vs Output Power
THD+N vs Output Power
THD+N vs Frequency
Power Dissipation vs Output Power
THD+N vs Frequency
HWD2171LD (Note 11)
Power Derating Curve
Note 11: This curve shows the HWD2171LD’s thermal dissipation ability at different ambient temperatures given the exposed-DAP of the part is soldered to a plane
of 1oz. Cu with an area given in the label of each curve. This label also designates whether the plane exists on the same (top) layer as the chip, on the bottom layer,
or on both layers. Infinite heatsink and unattached (no heatsink) conditions are also shown.
Typical Performance Characteristics
Non-LD Specific Characteristics
THD+N vs Frequency
THD+N vs Frequency
THD+N vs Frequency
THD+N vs Output Power
THD+N vs Output Power
THD+N vs Output Power
Output Power vs
Supply Voltage
Output Power vs
Supply Voltage
Output Power vs
Supply Voltage
Typical Performance Characteristics
Non-LD Specific Characteristics (Continued)
Output Power vs
Load Resistance
Power Dissipation vs
Output Power
Power Derating Curve
Clipping Voltage vs
Supply Voltage
Noise Floor
Frequency Response vs
Input Capacitor Size
Power Supply
Rejection Ratio
Open Loop
Frequency Response
Supply Current vs
Supply Voltage
supply regulation. Therefore, making the power supply
traces as wide as possible helps maintain full output voltage
Application Information
The HWD2171’s exposed-DAP (die attach paddle) package
(LD) provides a low thermal resistance between the die and
the PCB to which the part is mounted and soldered. This
allows rapid heat transfer from the die to the surrounding
PCB copper traces, ground plane, and surrounding air. The
result is a low voltage audio power amplifier that produces
2W at ≤ 1% THD with a 4Ω load. This high power is achieved
through careful consideration of necessary thermal design.
Failing to optimize thermal design may compromise the
HWD2171’s high power performance and activate unwanted,
though necessary, thermal shutdown protection.
The LD package must have its DAP soldered to a copper
pad on the PCB. The DAP’s PCB copper pad is connected to
a large plane of continuous unbroken copper. This plane
forms a thermal mass, heat sink, and radiation area. Place
the heat sink area on either outside plane in the case of a
two-sided PCB, or on an inner layer of a board with more
than two layers. Connect the DAP copper pad to the inner
layer or backside copper heat sink area with 4(2x2) vias. The
via diameter should be 0.012in-0.013in with a 1.27mm pitch.
Ensure efficient thermal conductivity by plating through the
Best thermal performance is achieved with the largest practical heat sink area. If the heatsink and amplifier share the
same PCB layer, a nominal 2.5in2 area is necessary for 5V
operation with a 4Ω load. Heatsink areas not placed on the
same PCB layer as the HWD2171 should be 5in2 (min) for the
same supply voltage and load resistance. The last two area
recommendations apply for 25˚C ambient temperature. Increase the area to compensate for ambient temperatures
above 25˚C. The HWD2171’s power de-rating curve in the
Typical Performance Characteristics shows the maximum
power dissipation versus temperature. An example PCB layout for the LD package is shown in the Demonstration
Board Layout section. Further detailed and specific information concerning PCB layout, fabrication, and mounting an
LD (LLP) package is available from National Semiconductor’s Package Engineering Group under application note
As shown in Figure 1, the HWD2171 has two operational
amplifiers internally, allowing for a few different amplifier
configurations. The first amplifier’s gain is externally configurable; the second amplifier is internally fixed in a unity-gain,
inverting configuration. The closed-loop gain of the first amplifier is set by selecting the ratio of Rf to Ri while the second
amplifier’s gain is fixed by the two internal 40kΩ resistors.
Figure 1 shows that the output of amplifier one serves as the
input to amplifier two, which results in both amplifiers producing signals identical in magnitude, but 180˚ out of phase.
Consequently, the differential gain for the IC is
AVD= 2 *(Rf/Ri)
By driving the load differentially through outputs Vo1 and
Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is
different from the classical single-ended amplifier configuration where one side of its load is connected to ground.
A bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential
drive to the load, thus doubling output swing for a specified
supply voltage. Four times the output power is possible as
compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes
that the amplifier is not current limited or clipped. In order to
choose an amplifier’s closed-loop gain without causing excessive clipping, please refer to the Audio Power Amplifier
Design section.
Another advantage of the differential bridge output is no net
DC voltage across load. This results from biasing VO1 and
VO2 at the same DC voltage, in this case VDD/2 . This
eliminates the coupling capacitor that single supply, singleended amplifiers require. Eliminating an output coupling capacitor in a single-ended configuration forces a single supply
amplifier’s half-supply bias voltage across the load. The
current flow created by the half-supply bias voltage increases internal IC power dissipation and my permanently
damage loads such as speakers.
Power dissipation is a major concern when designing a
successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power
delivered to the load by a bridge amplifier is an increase in
internal power dissipation. Equation 1 states the maximum
power dissipation point for a bridge amplifier operating at a
given supply voltage and driving a specified output load.
PDMAX = 4*(VDD)2/(2π2RL)
Power dissipated by a load is a function of the voltage swing
across the load and the load’s impedance. As load impedance decreases, load dissipation becomes increasingly dependant on the interconnect (PCB trace and wire) resistance
between the amplifier output pins and the load’s connections. Residual trace resistance causes a voltage drop,
which results in power dissipated in the trace and not in the
load as desired. For example, 0.1Ω trace resistance reduces
the output power dissipated by a 4Ω load from 2.0W to
1.95W. This problem of decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output voltage
swing, PCB traces that connect the output pins to a load
must be as wide as possible.
Poor power supply regulation adversely affects maximum
output power. A poorly regulated supply’s output voltage
decreases with increasing load current. Reduced supply
voltage causes decreased headroom, output signal clipping,
and reduced output power. Even with tightly regulated supplies, trace resistance creates the same effects as poor
Since the HWD2171 has two operational amplifiers in one
package, the maximum internal power dissipation is 4 times
that of a single-ended ampifier. Even with this substantial
increase in power dissipation, the HWD2171 does not require
heatsinking under most operating conditions and output
loading. From Equation 1, assuming a 5V power supply and
an 8Ω load, the maximum power dissipation point is
625 mW. The maximum power dissipation point obtained
from Equation 1 must not be greater than the power dissipation that results from Equation 2:
For the SO package, θJA = 140˚C/W, for the DIP package,
θJA = 107˚C/W, and for the MSOP package, θJA = 210˚C/W
Application Information
current may be greater than the typical value of 0.6µA. In
either case, the shutdown pin should be tied to a definite
voltage to avoid unwanted state changes.
assuming free air operation. For the LD package soldered to
a DAP pad that expands to a copper area of 1.0in2 on a
PCB, the HWD2171’sJAθ is 56˚C/W. TJMAX = 150˚C for the
HWD2171. TheJAθ can be decreased by using some form of
heat sinking. The resultant θJA will be the summation of the
θJC, θCS, and θSA. θJC is the junction to case of the package
(or to the exposed DAP, as is the case with the LD package),
θCS is the case to heat sink thermal resistance and θSA is the
heat sink to ambient thermal resistance. By adding additional copper area around the HWD2171, the JAθ can be
reduced from its free air value for the SO and MSOP packages. Increasing the copper area around the LD package
from 1.0in2 to 2.0in2 area results in a θJA decrease to
46˚C/W. Depending on the ambient temperature, TA, and the
θJA, Equation 2 can be used to find the maximum internal
power dissipation supported by the IC packaging. If the
result of Equation 1 is greater than that of Equation 2, then
either the supply voltage must be decreased, the load impedance increased, the θJA decreased, or the ambient temperature reduced. For the typical application of a 5V power
supply, with an 8Ω load, and no additional heatsinking, the
maximum ambient temperature possible without violating the
maximum junction temperature is approximately 61˚C provided that device operation is around the maximum power
dissipation point and assuming surface mount packaging.
For the LD package in a typical application of a 5V power
supply, with a 4Ω load, and 1.0in2 copper area soldered to
the exposed DAP pad, the maximum ambient temperature is
approximately 77˚C providing device operation is around the
maximum power dissipation point. Internal power dissipation
is a function of output power. If typical operation is not
around the maximum power dissipation point, the ambient
temperature can be increased. Refer to the Typical Performance Characteristics curves for power dissipation information for different output powers and output loading.
In many applications, a microcontroller or microprocessor
output is used to control the shutdown circuitry which provides a quick, smooth transition into shutdown. Another solution is to use a single-pole, single-throw switch in conjunction with an external pull-up resistor. When the switch is
closed, the shutdown pin is connected to ground and enables the amplifier. If the switch is open, then the external
pull-up resistor will disable the HWD2171. This scheme guarantees that the shutdown pin will not float thus preventing
unwanted state changes.
Proper selection of external components in applications using integrated power amplifiers is critical to optimize device
and system performance. While the HWD2171 is tolerant of
external component combinations, consideration to component values must be used to maximize overall system quality.
The HWD2171 is unity-gain stable which gives a designer
maximum system flexibility. The HWD2171 should be used in
low gain configurations to minimize THD+N values, and
maximize the signal to noise ratio. Low gain configurations
require large input signals to obtain a given output power.
Input signals equal to or greater than 1 Vrms are available
from sources such as audio codecs. Please refer to the
section, Audio Power Amplifier Design, for a more complete explanation of proper gain selection.
Besides gain, one of the major considerations is the closedloop bandwidth of the amplifier. To a large extent, the bandwidth is dictated by the choice of external components
shown in Figure 1. The input coupling capacitor, Ci, forms a
first order high pass filter which limits low frequency response. This value should be chosen based on needed
frequency response for a few distinct reasons.
As with any amplifier, proper supply bypassing is critical for
low noise performance and high power supply rejection. The
capacitor location on both the bypass and power supply pins
should be as close to the HWD2171 as possible. The capacitor
connected between the bypass pin and ground improves the
internal bias voltage’s stability, producing improved PSRR.
The improvements to PSRR increase as the bypass pin
capacitor increases. Typical applications employ a 5V regulator with 10µF and a 0.1µF bypass capacitors which aid in
supply stability. This does not eliminate the need for bypassing the supply nodes of the HWD2171 with a 1µF tantalum
capacitor. The selection of bypass capacitors, especially CB,
is dependent upon PSRR requirements, click and pop performance as explained in the section, Proper Selection of
External Components, system cost, and size constraints.
Selection Of Input Capacitor Size
Large input capacitors are both expensive and space hungry
for portable designs. Clearly, a certain sized capacitor is
needed to couple in low frequencies without severe attenuation. But in many cases the speakers used in portable
systems, whether internal or external, have little ability to
reproduce signals below 100Hz to 150Hz. Thus, using a
large input capacitor may not increase actual system performance.
In addition to system cost and size, click and pop performance is effected by the size of the input coupling capacitor,
Ci. A larger input coupling capacitor requires more charge to
reach its quiescent DC voltage (nominally 1/2 VDD). This
charge comes from the output via the feedback and is apt to
create pops upon device enable. Thus, by minimizing the
capacitor size based on necessary low frequency response,
turn-on pops can be minimized.
Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value. Bypass
capacitor, CB, is the most critical component to minimize
turn-on pops since it determines how fast the HWD2171 turns
on. The slower the HWD2171’s outputs ramp to their quiescent
DC voltage (nominally 1/2 VDD), the smaller the turn-on pop.
Choosing CB equal to 1.0µF along with a small value of Ci (in
the range of 0.1µF to 0.39µF), should produce a virtually
clickless and popless shutdown function. While the device
will function properly, (no oscillations or motorboating), with
CB equal to 0.1µF, the device will be much more susceptible
In order to reduce power consumption while not in use, the
HWD2171 contains a shutdown pin to externally turn off the
amplifier’s bias circuitry. This shutdown feature turns the
amplifier off when a logic high is placed on the shutdown pin.
The trigger point between a logic low and logic high level is
typically half- supply. It is best to switch between ground and
supply to provide maximum device performance. By switching the shutdown pin to VDD, the HWD2171 supply current
draw will be minimized in idle mode. While the device will be
disabled with shutdown pin voltages less then VDD, the idle
Application Information
design an amplifier with a higher differential gain, the
HWD2171 can still be used without running into bandwidth
to turn-on clicks and pops. Thus, a value of CB equal to
1.0µF is recommended in all but the most cost sensitive
Design a 1W/8Ω Audio Amplifier
Power Output
Load Impedance
Input Level
Input Impedance
1 Wrms
1 Vrms
20 kΩ
100 Hz–20 kHz ± 0.25 dB
A designer must first determine the minimum supply rail to
obtain the specified output power. By extrapolating from the
Output Power vs Supply Voltage graphs in the Typical Performance Characteristics section, the supply rail can be
easily found. A second way to determine the minimum supply rail is to calculate the required Vopeak using Equation 3
and add the output voltage. Using this method, the minimum
supply voltage would be (Vopeak + (VODTOP + VODBOT)), where
VODBOT and VODTOP are extrapolated from the Dropout Voltage vs Supply Voltage curve in the Typical Performance
Characteristics section.
Using the Output Power vs Supply Voltage graph for an 8Ω
load, the minimum supply rail is 4.6V. But since 5V is a
standard voltage in most applications, it is chosen for the
supply rail. Extra supply voltage creates headroom that allows the HWD2171 to reproduce peaks in excess of 1W without producing audible distortion. At this time, the designer
must make sure that the power supply choice along with the
output impedance does not violate the conditions explained
in the Power Dissipation section.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equation 4.
Rf/Ri = AVD/2
From Equation 4, the minimum AVD is 2.83; use AVD = 3.
Since the desired input impedance was 20kΩ, and with a
AVD impedance of 2, a ratio of 1.5:1 of Rf to Ri results in an
allocation of Ri = 20kΩ and Rf = 30kΩ. The final design step
is to address the bandwidth requirements which must be
stated as a pair of −3dB frequency points. Five times away
from a −3dB point is 0.17dB down from passband response
which is better than the required ± 0.25dB specified.
fL = 100Hz/5 = 20Hz
fH = 20kHz * 5 = 100kHz
As stated in the External Components section, Ri in conjunction with Ci create a highpass filter.
Ci ≥ 1/(2π*20kΩ*20Hz) = 0.397µF; use 0.39µF
The high frequency pole is determined by the product of the
desired frequency pole, fH, and the differential gain, AVD.
With a AVD = 3 and fH = 100kHz, the resulting GBWP =
150kHz which is much smaller than the HWD2171 GBWP of
4MHz. This figure displays that if a designer has a need to
Demonstration Board Layout
Recommended LD PC Board Layout:
Component-Side Silkscreen
Recommended LD PC Board Layout:
Component-Side Layout
Recommended LD PC Board Layout:
Bottom-Side Layout
Physical Dimensions
inches (millimeters) unless otherwise noted
Order Number HWD2171LD
Order Number HWD2171M
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Order Number HWD2171MM
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Order Number HWD2171N
Chengdu Sino Microelectronics System Co.,Ltd
Headquarters of CSMSC:
Beijing Office:
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Science & Technology
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