NSC 54F257ADMQB

54F/74F257A
Quad 2-Input Multiplexer with TRI-STATEÉ Outputs
General Description
Features
The ’F257A is a quad 2-input multiplexer with TRI-STATE
outputs. Four bits of data from two sources can be selected
using a Common Data Select input. The four outputs present the selected data in true (non-inverted) form. The outputs may be switched to a high impedance state with a
HIGH on the common Output Enable (OE) input, allowing
the outputs to interface directly with bus-oriented systems.
Y
Commercial
Y
Y
Y
Multiplexer expansion by tying outputs together
Non-inverting TRI-STATE outputs
Input clamp diodes limit high-speed termination effects
Guaranteed 4000V minimum ESD protection
Package
Number
Military
Package Description
N16E
16-Lead (0.300× Wide) Molded Dual-In-Line
J16A
16-Lead Ceramic Dual-In-Line
74F257ASC (Note 1)
M16A
16-Lead (0.150× Wide) Molded Small Outline, JEDEC
74F257ASJ (Note 1)
M16D
16-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F257AFM (Note 2)
W16A
16-Lead Cerpack
54F257ALL (Note 2)
E20A
20-Lead Ceramic Leadless Chip Carrier, Type C
74F257APC
54F257ADM (Note 2)
Note 1: Devices also available in 13× reel. Use suffix e SCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix e DMQB, FMQB and LMQB.
Logic Symbols
Connection Diagrams
Pin Assignment
for DIP, SOIC and Flatpak
Pin Assignment
for LCC
TL/F/9507–3
IEEE/IEC
TL/F/9507 – 1
TL/F/9507 – 2
TL/F/9507–5
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/9507
RRD-B30M75/Printed in U. S. A.
54F/74F257A Quad 2-Input Multiplexer with TRI-STATE Outputs
November 1994
Unit Loading/Fan Out
54F/74F
Pin Names
S
OE
I0a – I0d
I1a – I1d
Za – Zd
Description
U.L.
HIGH/LOW
Input IIH/IIL
Output IOH/IOL
Common Data Select Input
TRI-STATE Output Enable Input (Active LOW)
Data Inputs from Source 0
Data Inputs from Source 1
TRI-STATE Multiplexer Outputs
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
150/40 (33.3)
20 mA/b0.6 mA
20 mA/b0.6 mA
20 mA/b0.6 mA
20 mA/b0.6 mA
b 3 mA/24 mA (20 mA)
Functional Description
Truth Table
The ’F257A is a quad 2-input multiplexer with TRI-STATE
outputs. It selects four bits of data from two sources under
control of a Common Data Select input. When the Select
input is LOW, the I0x inputs are selected and when Select is
HIGH, the I1x inputs are selected. The data on the selected
inputs appears at the outputs in true (non-inverted) form.
The device is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by
the logic levels supplied to the Select input. The logic equation for the outputs is shown below:
Zn e OE # (In # S a Ion # S)
Output
Enable
Select
Input
Data
Inputs
OE
S
I0
I1
Z
H
L
L
L
L
X
H
H
L
L
X
X
X
L
H
X
L
H
X
X
Z
L
H
L
H
Output
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Z e High Impedance
When the Output Enable input (OE) is HIGH, the outputs are
forced to a high impedance OFF state. If the outputs are
tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the
maximum ratings. Designers should ensure the Output Enable signals to TRI-STATE devices whose outputs are tied
together are designed so there is no overlap.
Logic Diagram
TL/F/9507 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
Absolute Maximum Ratings (Note 1)
Recommended Operating
Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature
b 65§ C to a 150§ C
Ambient Temperature under Bias
Junction Temperature under Bias
Plastic
b 55§ C to a 125§ C
Free Air Ambient Temperature
Military
Commercial
b 55§ C to a 125§ C
0§ C to a 70§ C
Supply Voltage
Military
Commercial
b 55§ C to a 175§ C
b 55§ C to a 150§ C
a 4.5V to a 5.5V
a 4.5V to a 5.5V
VCC Pin Potential to
Ground Pin
b 0.5V to a 7.0V
b 0.5V to a 7.0V
Input Voltage (Note 2)
b 30 mA to a 5.0 mA
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with VCC e 0V)
b 0.5V to VCC
Standard Output
b 0.5V to a 5.5V
TRI-STATE Output
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
ESD Last Passing Voltage (Min)
4000V
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
54F/74F
Parameter
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VCD
Input Clamp Diode Voltage
VOH
Output HIGH
Voltage
Typ
Units
Max
2.0
54F 10% VCC
54F 10% VCC
74F 10% VCC
74F 10% VCC
74F 5% VCC
74F 5% VCC
VCC
V
0.8
V
b 1.2
V
2.5
2.4
2.5
2.4
2.7
2.7
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
Min
IIN e b18 mA
V
Min
IOH
IOH
IOH
IOH
IOH
IOH
e
e
e
e
e
e
b 1 mA
b 3 mA
b 1 mA
b 3 mA
b 1 mA
b 3 mA
VOL
Output LOW
Voltage
54F 10% VCC
74F 10% VCC
0.5
0.5
V
Min
IOL e 20 mA
IOL e 24 mA
IIH
Input HIGH
Current
54F
74F
20.0
5.0
mA
Max
VIN e 2.7V
IBVI
Input HIGH Current
Breakdown Test
54F
74F
100
7.0
mA
Max
VIN e 7.0V
ICEX
Output HIGH
Leakage Current
54F
74F
250
50
mA
Max
VOUT e VCC
VID
Input Leakage
Test
74F
V
0.0
IID e 1.9 mA
All Other Pins Grounded
IOD
Output Leakage
Circuit Current
74F
3.75
mA
0.0
VIOD e 150 mV
All Other Pins Grounded
IIL
Input LOW Current
b 0.6
mA
Max
VIN e 0.5V
IOZH
Output Leakage Current
50
mA
Max
VOUT e 2.7V
IOZL
Output Leakage Current
b 50
mA
Max
VOUT e 0.5V
IOS
Output Short-Circuit Current
b 150
mA
Max
VOUT e 0V
IZZ
Bus Drainage Test
500
mA
0.0V
VOUT e 5.25V
ICCH
Power Supply Current
9.0
15
mA
Max
VO e HIGH
ICCL
Power Supply Current
14.5
22
mA
Max
VO e LOW
ICCZ
Power Supply Current
15
23
mA
Max
VO e HIGH Z
4.75
b 60
3
AC Electrical Characteristics
Symbol
Parameter
74F
54F
74F
TA e a 25§ C
VCC e a 5.0V
CL e 50 pF
TA, VCC e Mil
CL e 50 pF
TA, VCC e Com
CL e 50 pF
Units
Min
Typ
Max
Min
Max
Min
Max
tPLH
tPHL
Propagation Delay
In to Zn
2.5
2.0
4.5
4.2
5.5
5.5
2.0
1.5
7.0
7.0
2.0
2.0
6.0
6.0
ns
tPLH
tPHL
Propagation Delay
S to Zn
4.0
2.5
5.0
6.5
9.5
7.0
3.5
2.5
11.5
9.0
3.5
2.5
10.5
8.0
ns
tPZH
tPZL
Output Enable Time
2.0
2.5
5.9
5.5
6.0
7.0
2.0
2.5
8.0
9.0
2.0
2.5
7.0
8.0
tPHZ
tPLZ
Output Disable Time
2.0
2.0
4.3
4.5
6.0
6.0
2.0
2.0
7.0
8.5
2.0
2.0
7.0
7.0
4
ns
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74F
257A
S
Temperature Range Family
74F e Commercial
54F e Military
C
X
Special Variations
X e Devices shipped in 13× reels
QB e Military grade with
environmental and burn-in
processing shipped in tubes
Device Type
Package Code
P e Plastic DIP
D e Ceramic DIP
F e Flatpak
L e Leadless Ceramic Chip Carrier (LCC)
S e Small Outline SOIC JEDEC
SJ e Small Outline SOIC EIAJ
Temperature Range
C e Commercial (0§ C to a 70§ C)
M e Military (b55§ C to a 125§ C)
Physical Dimensions inches (millimeters)
20-Lead Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
5
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J16A
16-Lead (0.150× Wide) Molded Small Outline Package, JEDEC (S)
NS Package Number M16A
6
Physical Dimensions inches (millimeters) (Continued)
16-Lead (0.300× Wide) Molded Small Outline Package, EIAJ (SJ)
NS Package Number M16D
16-Lead (0.300× Wide) Molded Dual-In-Line Package (P)
NS Package Number N16E
7
54F/74F257A Quad 2-Input Multiplexer with TRI-STATE Outputs
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flatpak (F)
NS Package Number W16A
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