NSC 74F545PC

54F/74F545 Octal Bidirectional
Transceiver with TRI-STATEÉ Outputs
General Description
Features
The ’F545 is an 8-bit, TRI-STATE, high-speed transceiver. It
provides bidirectional drive for bus-oriented microprocessor
and digital communications systems. Straight through bidirectional transceivers are featured, with 24 mA (20 mA Mil)
bus drive capability on the A ports and 64 mA (48 mA Mil)
bus drive capability on the B ports.
One input, Transmit/Receive (T/R) determines the direction
of logic signals through the bidirectional transceiver. Transmit enables data from A ports to B ports; Receive enables
data from B ports to A ports. The Output Enable input disables both A and B ports by placing them in a TRI-STATE
condition.
Y
Commercial
Package
Number
Military
74F545PC
54F545DM (Note 2)
74F545SC (Note 1)
Y
Y
Y
Y
Y
Y
Higher drive than 8304
8-bit bidirectional data flow reduces system package
count
TRI-STATE inputs/outputs for interfacing with bus-oriented systems
24 mA (20 mA Mil) and 64 mA (48 mA Mil) bus drive
capability on A and B ports, respectively
Transmit/Receive and Output Enable simplify control
logic
Guaranteed 4000V minimum ESD protection
Pin for Pin compatible with Intel 8286
Package Description
N20A
20-Lead (0.300× Wide) Molded Dual-In-Line
J20A
20-Lead Ceramic Dual-In-Line
M20B
20-Lead (0.300× Wide) Molded Small Outline, JEDEC
M20D
20-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F545FM (Note 2)
W20A
20-Lead Cerpack
54F545LM (Note 2)
E20A
20-Lead Ceramic Leadless Chip Carrier, Type C
74F545SJ (Note 1)
Note 1: Devices also available in 13×
reel. Use suffix e SCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix e DMQB, FMQB and LMQB.
Logic Symbols
TL/F/9556 – 3
IEEE/IEC
TL/F/9556 – 5
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/9556
RRD-B30M105/Printed in U. S. A.
54F/74F545 Octal Bidirectional Transceiver with TRI-STATE Outputs
May 1995
Connection Diagrams
Pin Assignment for
DIP, SOIC and Flatpak
Pin Assignment
for LCC
TL/F/9556 – 2
TL/F/9556–1
Truth Table
Inputs
OE
T/R
L
L
H
L
H
X
Outputs
Bus B Data to Bus A
Bus A Data to Bus B
High Z
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Z e High Impedance
Unit Loading/Fan Out
54F/74F
Pin Names
OE
T/R
A 0 – A7
B0 – B7
Description
U.L.
HIGH/LOW
Input IIH/IIL
Output IOH/IOL
Output Enable Input (Active LOW)
1.0/2.0
20 mA/b1.2 mA
Transmit/Receive Input
1.0/2.0
20 mA/b1.2 mA
Side A TRI-STATE Inputs or
3.5/1.083
70 mA/b650 mA
TRI-STATE Outputs
150/40 (33.3) b3 mA/24 mA (20 mA)
Side B TRI-STATE Inputs or
3.5/1.083
70 mA/b650 mA
TRI-STATE Outputs
600/106.6 (80) b12 mA/64 mA (48 mA)
2
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature
b 65§ C to a 150§ C
Ambient Temperature under Bias
Junction Temperature under Bias
Plastic
b 55§ C to a 125§ C
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Recommended Operating
Conditions
b 55§ C to a 175§ C
b 55§ C to a 150§ C
Free Air Ambient Temperature
Military
Commercial
VCC Pin Potential to
Ground Pin
b 0.5V to a 7.0V
b 0.5V to a 7.0V
Input Voltage (Note 2)
b 30 mA to a 5.0 mA
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with VCC e 0V)
b 0.5V to VCC
Standard Output
b 0.5V to a 5.5V
TRI-STATE Output
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
ESD Last Passing Voltage (Min)
b 55§ C to a 125§ C
0§ C to a 70§ C
Supply Voltage
Military
Commercial
a 4.5V to a 5.5V
a 4.5V to a 5.5V
4000V
DC Electrical Characteristics
Symbol
54F/74F
Parameter
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VCD
Input Clamp Diode Voltage
VOH
Output HIGH
Voltage
VOL
Typ
Units
Max
2.0
54F 10% VCC
54F 10% VCC
54F 10% VCC
74F 10% VCC
74F 10% VCC
74F 10% VCC
74F 5% VCC
74F 5% VCC
VCC
V
0.8
V
b 1.2
V
2.5
2.4
2.0
2.5
2.4
2.0
2.7
2.7
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
Min
IIN e b18 mA (OE, T/R)
V
Min
IOH
IOH
IOH
IOH
IOH
IOH
IOH
IOH
e
e
e
e
e
e
e
e
b 1 mA (An)
b 3 mA (An)
b 12 mA (Bn)
b 1 mA (An)
b 3 mA (An)
b 15 mA (Bn)
b 1 mA (An)
b 3 mA (An)
IOL
IOL
IOL
IOL
e
e
e
e
20 mA (An)
48 mA (Bn)
24 mA (An)
64 mA (Bn)
Output LOW
Voltage
54F 10% VCC
54F 10% VCC
74F 10% VCC
74F 10% VCC
0.5
0.55
0.5
0.55
V
Min
IIH
Input HIGH
Current
54F
74F
20.0
5.0
mA
Max
VIN e 2.7V (OE, T/R)
IBVI
Input HIGH Current
Breakdown Test
54F
74F
100
7.0
mA
Max
VIN e 7.0V (OE, T/R)
IBVIT
Input HIGH Current
Breakdown (I/O)
54F
74F
1.0
0.5
mA
Max
VIN e 5.5V (An, Bn)
ICEX
Output HIGH
Leakage Current
54F
74F
250
50
mA
Max
VOUT e VCC
VID
Input Leakage
Test
74F
V
0.0
IID e 1.9 mA
All Other Pins Grounded
IOD
Output Leakage
Circuit Current
74F
3.75
mA
0.0
VIOD e 150 mV
All Other Pins Grounded
IIL
Input LOW Current
b 1.2
mA
Max
VIN e 0.5V (OE, T/R)
IIH a IOZH
Output Leakage Current
70
mA
Max
VOUT e 2.7V (An, Bn)
IIL a IOZL
Output Leakage Current
b 650
mA
Max
VOUT e 0.5V (An, Bn)
b 150
b 225
mA
Max
VOUT e 0V (An)
VOUT e 0V (Bn)
IOS
Output Short-Circuit Current
4.75
b 60
b 100
3
DC Electrical Characteristics (Continued)
Symbol
54F/74F
Parameter
Min
Typ
Units
VCC
Conditions
Max
IZZ
Bus Drainage Test
500
mA
0.0V
VOUT e 5.25V
ICCH
Power Supply Current
70
90
mA
Max
VO e HIGH
ICCL
Power Supply Current
95
120
mA
Max
VO e LOW
ICCZ
Power Supply Current
85
110
mA
Max
VO e HIGH Z
AC Electrical Characteristics
Symbol
Parameter
74F
54F
74F
TA e a 25§ C
VCC e a 5.0V
CL e 50 pF
TA, VCC e Mil
CL e 50 pF
TA, VCC e Com
CL e 50 pF
Min
Typ
Max
Min
Max
Min
Max
tPLH
tPHL
Propagation Delay
An to Bn or Bn to An
2.5
2.5
4.2
4.6
6.0
6.0
2.0
2.0
7.5
7.5
2.5
2.5
7.0
7.0
tPZH
tPZL
Output Enable Time
3.0
3.5
5.3
6.0
7.0
8.0
2.5
3.0
9.0
10.0
3.0
3.5
8.0
9.0
tPHZ
tPLZ
Output Disable Time
3.0
2.0
5.0
5.0
6.5
6.5
2.5
2.0
9.0
10.0
3.0
2.0
7.5
7.5
Units
ns
ns
Logic Diagram
TL/F/9556 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74F 545 S C X
Temperature Range Family
74F e Commercial
54F e Military
Special Variations
QB e Military grade device with
environmental and burn-in
processing
X e Devices shipped in 13× reel
Device Type
Package Code
P e Plastic DIP
D e Ceramic DIP
F e Flatpak
L e Leadless Chip Carrier (LCC)
S e Small Outline SOIC JEDEC
SJ e Small Outline SOIC EIAJ
Temperature Range
C e Commercial (0§ C to a 70§ C)
M e Military (b55§ C to a 125§ C)
4
Physical Dimensions inches (millimeters)
20-Lead Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J20A
5
Physical Dimensions inches (millimeters) (Continued)
20-Lead (0.300× Wide) Molded Small Outline Package, JEDEC (S)
NS Package Number M20B
20-Lead (0.300× Wide) Molded Small Outline Package, EIAJ
NS Package Number M20D
6
Physical Dimensions inches (millimeters) (Continued)
20-Lead (0.300× Wide) Molded Dual-In-Line Package (P)
NS Package Number N20A
7
54F/74F545 Octal Bidirectional Transceiver with TRI-STATE Outputs
Physical Dimensions inches (millimeters) (Continued)
20-Lead Ceramic Flatpak (F)
NS Package Number W20A
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