54F/74F379 Quad Parallel Register with Enable General Description Features The ’F379 is a 4-bit register with buffered common Enable. This device is similar to the ’F175 but features the common Enable rather than common Master Reset. Y Y Y Y Y Commercial Military 74F379PC 54F379DM (QB) 74F379SC (Note 1) Edge triggered D-type inputs Buffered positive edge-triggered clock Buffered common enable input True and complement outputs Guaranteed 4000V minimum ESD protection Package Number Package Description N16E 16-Lead (0.300× Wide) Molded Dual-In-Line J16A 16-Lead Ceramic Dual-In-Line M16A 16-Lead (0.300× Wide) Molded Small Outline, JEDEC M16D 16-Lead (0.300× Wide) Molded Small Outline, EIAJ 54F379FM (QB) W16A 16-Lead Cerpack 54F379LM (QB) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C 74F379SJ (Note 1) Note 1: Devices also available in 13× reel. Use suffix e SCX and SJX. Logic Symbols Connection Diagrams Pin Assignment DIP, SOIC and Flatpak IEEE/IEC Pin Assignment for LCC TL/F/9527 – 1 TL/F/9527 – 2 TL/F/9527–5 TL/F/9527–3 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/9527 RRD-B30M115/Printed in U. S. A. 54F/74F379 Quad Parallel Register with Enable August 1995 Unit Loading/Fan Out 54F/74F Pin Names E D 0 – D3 CP Q0 – Q3 Q0 – Q3 Description Enable Input (Active LOW) Data Inputs Clock Pulse Input (Active Rising Edge) Flip-Flop Outputs Complement Outputs U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL 1.0/1.0 1.0/1.0 1.0/1.0 50/33.3 50/33.3 20 mA/b0.6 mA 20 mA/b0.6 mA 20 mA/b0.6 mA b 1 mA/20 mA b 1 mA/20 mA Functional Description Truth Table The ’F379 consists of four edge-triggered D-Type flip-flops with individual D inputs and Q and Q outputs. The Clock (CP) and Enable (E) inputs are common to all flip-flops. When the E is input HIGH, the register will retain the present data independent of the CP input. The Dn and E inputs can change when the clock is in either state, provided that the recommended setup and hold times are observed. Inputs Outputs E CP Dn Qn Qn H L L L L L X H L NC H L NC L H H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial L e LOW-to-HIGH Transition NC e No Change Logic Diagram TL/F/9527 – 4 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 2 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Storage Temperature b 65§ C to a 150§ C Ambient Temperature under Bias Junction Temperature under Bias Plastic b 55§ C to a 125§ C Free Air Ambient Temperature Military Commercial b 55§ C to a 125§ C 0§ C to a 70§ C Supply Voltage Military Commercial b 55§ C to a 175§ C b 55§ C to a 150§ C a 4.5V to a 5.5V a 4.5V to a 5.5V VCC Pin Potential to Ground Pin b 0.5V to a 7.0V b 0.5V to a 7.0V Input Voltage (Note 2) b 30 mA to a 5.0 mA Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) b 0.5V to VCC Standard Output b 0.5V to a 5.5V TRI-STATEÉ Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) ESD Last Passing Voltge (Min) 4000V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol 54F/74F Parameter Min VIH Input HIGH Voltage VIL Input LOW Voltage VCD Input Clamp Diode Voltage VOH Output HIGH Voltage 54F 10% VCC 74F 10% VCC 74F 5% VCC VOL Output LOW Voltage 54F 10% VCC 74F 10% VCC IIH Input HIGH Current IBVI Typ Units VCC Conditions Max 2.0 V Recognized as a HIGH Signal 0.8 V b 1.2 V Min IIN e b18 mA V Min IOH e b1 mA IOH e b1 mA IOH e b1 mA 0.5 0.5 V Min IOL e 20 mA IOL e 20 mA 54F 74F 20.0 5.0 mA Max VIN e 2.7V Input HIGH Current Breakdown Test 54F 74F 100 7.0 mA Max VIN e 7.0V ICEX Output HIGH Leakage Current 54F 74F 250 50 mA Max VOUT e VCC VID Input Leakage Test 74F V 0.0 IID e 1.9 mA All Other Pins Grounded IOD Output Leakage Circuit Current 74F 3.75 mA 0.0 VIOD e 150 mV All Other Pins Grounded IIL Input LOW Current IOS Output Short-Circuit Current ICCL Power Supply Current 2.5 2.5 2.7 4.75 b 60 28 3 Recognized as a LOW Signal b 0.6 mA Max VIN e 0.5V b 150 mA Max VOUT e 0V 40 mA Max VO e LOW AC Electrical Characteristics Symbol Parameter 74F 54F 74F TA e a 25§ C VCC e a 5.0V CL e 50 pF TA, VCC e Mil CL e 50 pF TA, VCC e Com CL e 50 pF Min Typ fmax Maximum Clock Frequency 100 140 tPLH tPHL Propagation Delay CP to Qn, Qn 3.5 5.0 5.0 6.5 Max Min Max 75 6.5 8.5 Min Max 100 3.0 4.0 8.5 10.0 Units MHz 3.5 5.0 7.5 9.5 ns AC Operating Requirements Symbol Parameter 74F 54F 74F TA e a 25§ C VCC e a 5.0V TA, VCC e Mil TA, VCC e Com Min Min Min Max Max Units Max ts(H) ts(L) Setup Time, HIGH or LOW Dn to CP 3.0 3.0 4.0 4.0 3.0 3.0 th(H) th(L) Hold Time, HIGH or LOW Dn to CP 1.0 1.0 2.0 2.0 1.0 1.0 ts(H) ts(L) Setup Time, HIGH or LOW E to CP 6.0 6.0 8.0 8.0 6.0 6.0 th(H) th(L) Hold Time, HIGH or LOW E to CP 0 0 0 0 0 0 tw(H) tw(L) CP Pulse Width HIGH or LOW 4.0 5.0 5.0 7.0 4.0 5.0 ns ns ns Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74F 379 S Temperature Range Family 74F e Commercial 54F e Military C X Special Variations QB e Military grade device with environmental and burn-in processing X e Devices shipped in 13× reel Device Type Package Code P e Plastic DIP D e Ceramic DIP F e Flatpak L e Leadless Chip Carrier (LCC) S e Small Outline SOIC JEDEC SJ e Small Outline SOIC EIAJ Temperature Range C e Commercial (0§ C to a 70§ C) M e Military (b55§ C to a 125§ C) 4 Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (L) NS Package Number E20A 16-Lead Ceramic Dual-In-Line Package (D) NS Package Number J16A 5 Physical Dimensions inches (millimeters) (Continued) 16-Lead (0.150× Wide) Molded Small Outline Integrated Circuit (S) NS Package Number M16A 16-Lead (0.300× Wide) Molded Small Outline Package, EIAJ (SJ) NS Package Number M16D 6 Physical Dimensions inches (millimeters) (Continued) 16-Lead (0.300× Wide) Molded Dual-In-Line Package (P) NS Package Number N16E 7 54F/74F379 Quad Parallel Register with Enable Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Flatpak (F) NS Package Number W16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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