54AC253 • 54ACT253 Dual 4-Input Multiplexer with TRI-STATE ® Outputs General Description The ’AC/’ACT253 is a dual 4-input multiplexer with TRI-STATE outputs. It can select two bits of data from four sources using common select inputs. The outputs may be individually switched to a high impedance state with a HIGH on the respective Output Enable (OE) inputs, allowing the outputs to interface directly with bus oriented systems. n n n n n Multifunction capability Noninverting TRI-STATE outputs Outputs source/sink 24 mA ’ACT253 has TTL-compatible inputs Standard Military Drawing (SMD) — ’AC253: 5962-87693 — ’ACT253: 5962-87761 Features n ICC and IOZ reduced by 50% Logic Diagrams IEEE/IEC DS100285-1 DS100285-2 Pin Names Description I0a–I3a Side A Data Inputs I0b–I3b Side B Data Inputs S0, S1 Common Select Inputs OEa Side A Output Enable Input OEb Side B Output Enable Input Za, Zb TRI-STATE Outputs TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT ® is a registered trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100285 www.national.com 54AC253 • 54ACT253 Dual 4-Input Multiplexer with TRI-STATE Outputs August 1998 Connection Diagrams Pin Assignment for DIP and Flatpak Pin Assignment for LCC DS100285-3 DS100285-4 Functional Description I2a • S1 • S0 + I3a • S1 • S0) Zb = OEb • (I0b • S1 • S0 + I1b • S1 • S0 + I2b • S1 • S0 + I3b • S1 • S0) If the outputs of TRI-STATE devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure that Output Enable signals to TRI-STATE devices whose outputs are tied together are designed so that there is no overlap. The ’AC/’ACT253 contains two identical 4-input multiplexers with TRI-STATE outputs. They select two bits from four sources selected by common Select inputs (S0, S1). The 4-input multiplexers have individual Output Enable (OEa, OEb) inputs which, when HIGH, force the outputs to a high impedance (High Z) state. This device is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels supplied to the two select inputs. The logic equations for the outputs are shown: Za = OEa • (I0a • S1 • S0 + I1a • S1 • S0 + Truth Table Select Data Inputs Output Inputs Outputs Enable S0 S1 I0 I1 I2 I3 OE Z X X X X X X H Z L L L X X X L L L L H X X X L H H L X L X X L L H L X H X X L H L H X X L X L L L H X X H X L H H H X X X L L L H H X X X H L H Address Inputs S0 and S1 are common to both sections. H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance www.national.com 2 Logic Diagram DS100285-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.national.com Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) CDIP Supply Voltage (VCC) ’AC ’ACT Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) 54AC/ACT Minimum Input Edge Rate (∆V/∆t) ’AC Devices VIN from 30% to 70% of VCC VCC @ 3.3V, 4.5V, 5.5V Minimum Input Edge Rate (∆V/∆t) ’ACT Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ± 50 mA ± 50 mA −65˚C to +150˚C 2.0V to 6.0V 4.5V to 5.5V 0V to VCC 0V to VCC −55˚C to +125˚C 125 mV/ns 125 mV/ns Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT ® circuits outside databook specifications. 175˚C DC Characteristics for ’AC Family Devices Symbol Parameter VCC 54AC TA = (V) −55˚C to +125˚C Units Conditions Guaranteed Limits VIH VIL VOH VOL IIN Minimum High Level 3.0 2.1 Input Voltage 4.5 3.15 5.5 3.85 Maximum Low Level 3.0 0.9 Input Voltage 4.5 1.35 5.5 1.65 Minimum High Level 3.0 2.9 Output Voltage 4.5 4.4 5.5 5.4 3.0 2.4 4.5 3.7 5.5 4.7 Maximum Low Level 3.0 0.1 Output Voltage 4.5 0.1 5.5 0.1 Maximum Input VOUT = 0.1V V or VCC − 0.1V V or VCC − 0.1V VOUT = 0.1V IOUT = −50 µA V V (Note 2) VIN = VIL or VIH IOH = −12 mA IOH = −24 mA IOH = −24 mA IOUT = 50 µA V (Note 2) VIN = VIL or VIH IOL = 12 mA 3.0 0.50 4.5 0.50 5.5 0.50 5.5 ± 1.0 µA 5.5 ± 5.0 µA V IOL = 24 mA IOL = 24 mA VI = VCC, GND Leakage Current IOZ Maximum TRI-STATE Current www.national.com 4 VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND DC Characteristics for ’AC Family Devices Symbol Parameter (Continued) VCC 54AC TA = (V) −55˚C to +125˚C Units Conditions Guaranteed Limits (Note 3) IOLD Minimum Dynamic 5.5 50 mA IOHD Output Current 5.5 −50 mA VOLD = 1.65V Max VOHD = 3.85V Min ICC Maximum Quiescent 5.5 80.0 µA VIN = VCC Supply Current or GND Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. ICC for 54AC @ 25˚C is identical to 74AC @ 25˚C. DC Characteristics for ’ACT Family Devices Symbol Parameter VCC 54ACT TA = (V) −55˚C to +125˚C Units Conditions Guaranteed Limits VIH VIL VOH VOL IIN Minimum High Level 4.5 2.0 Input Voltage 5.5 2.0 Maximum Low Level 4.5 0.8 Input Voltage 5.5 0.8 Minimum High Level 4.5 4.4 Output Voltage 5.5 5.4 4.5 3.70 5.5 4.70 Maximum Low Level 4.5 0.1 Output Voltage 5.5 0.1 Maximum Input V VOUT = 0.1V V or VCC − 0.1V VOUT = 0.1V V or VCC − 0.1V IOUT = −50 µA V (Note 5) VIN = VIL or VIH IOH = −24 mA V IOH = −24 mA IOUT = 50 µA V (Note 5) VIN = VIL or VIH IOL = 24 mA IOL = 24 mA VI = VCC, GND 4.5 0.50 5.5 0.50 5.5 ± 1.0 µA 5.5 ± 5.0 µA 5.5 1.6 mA Leakage Current IOZ Maximum TRI-STATE Current ICCT Maximum VI = VIL, VIH VO = VCC, GND VI = VCC − 2.1V ICC/Input (Note 6) IOLD Minimum Dynamic 5.5 50 mA IOHD Output Current 5.5 −50 mA VOLD = 1.65V Max VOHD = 3.85V Min ICC Maximum Quiescent 5.5 80.0 µA VIN = VCC Supply Current or GND Note 5: All outputs loaded; thresholds on input associated with output under test. Note 6: Maximum test duration 2.0 ms, one output loaded at a time. Note 7: ICC for 54ACT @ 25˚C is identical to 74ACT @ 25˚C. 5 www.national.com AC Electrical Characteristics 54AC TA = −55˚C VCC Symbol Parameter (V) (Note 8) Min tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Fig. to +125˚C CL = 50 pF Units Max Propagation Delay 3.3 1.0 18.0 Sn to Zn 5.0 1.0 12.5 Propagation Delay 3.3 1.0 18.5 Sn to Zn 5.0 1.0 13.5 Propagation Delay 3.3 1.0 17.0 In to Zn 5.0 1.0 11.5 Propagation Delay 3.3 1.0 15.0 In to Zn 5.0 1.0 11.5 Output Enable Time 3.3 1.0 9.0 5.0 1.0 7.0 3.3 1.0 9.5 5.0 1.0 8.0 3.3 1.0 10.5 5.0 1.0 9.0 3.3 1.0 9.5 5.0 1.0 8.0 Output Enable Time Output Disable Time Output Disable Time No. ns ns ns ns ns ns ns ns Note 8: Voltage Range 3.3 is 3.3V ± 0.3V Voltage Range 5.0 is 5.0V ± 0.5V AC Electrical Characteristics 54ACT TA = −55˚C VCC Symbol Parameter (V) (Note 9) tPLH Propagation Delay Fig. to +125˚C CL = 50 pF Units Min Max 5.0 1.0 14.5 ns 5.0 1.0 16.0 ns 5.0 1.0 12.0 ns 5.0 1.0 13.5 ns ns Sn to Zn tPHL Propagation Delay Sn to Zn tPLH Propagation Delay In to Zn tPHL Propagation Delay In to Zn tPZH Output Enable Time 5.0 1.0 9.5 tPZL Output Enable Time 5.0 1.0 9.5 ns tPHZ Output Disable Time 5.0 1.0 11.0 ns tPLZ Output Disable Time 5.0 1.0 9.0 ns Note 9: Voltage Range 5.0 is 5.0V ± 0.5V Capacitance Symbol CIN CPD Typ Units Input Capacitance Parameter 4.5 pF Power Dissipation 50.0 pF Capacitance www.national.com 6 Conditions VCC = OPEN VCC = 5.0V No. Physical Dimensions inches (millimeters) unless otherwise noted 20 Terminal Ceramic Leadless Chip Carrier (L) NS Package Number E20A 16 Lead Ceramic Dual-In-Line Package (D) NS Package Number J16A 7 www.national.com 54AC253 • 54ACT253 Dual 4-Input Multiplexer with TRI-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16 Lead Ceramic Flatpak (F) NS Package Number W16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: [email protected] www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: [email protected] National Semiconductor Japan Ltd. Tel: 81-3-5620-6175 Fax: 81-3-5620-6179 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.