HI-8592, HI-8593, HI-8594 July, 2013 Single-Rail ARINC 429 Differential Line Driver GENERAL DESCRIPTION PIN CONFIGURATION (TOP VIEW) The HI-8592 bus interface product is a silicon gate CMOS device designed as a line driver in accordance with the ARINC 429 bus specifications. The part includes a negative voltage converter allowing it to operate from a single +5V supply using only two external capacitors. The part also features high-impedance outputs (tri-state) when both data inputs are taken high, allowing multiple line drivers to be connected to a common bus. 14 AMPB V+ 1 13 TXBOUT SLP 2 TX0IN 3 12 AMPA TX1IN 4 11 TXAOUT 10 V- GND 5 The HI-8593 and HI-8594 are reduced pin count versions of HI-8592 which do not incorporate the negative voltage converter. These devices are compatible with Holt’s existing HI-8570 and HI-8571 respectively, with the added advantage of the tri-state outputs. For even smaller board footprint, versions are also available in leadless, surface mount QFN-style packages. CAP+ 6 9 GND CAP- 7 8 V+ HI-8592PS 14-PIN PLASTIC SMALL OUTLINE (ESOIC) NB SLP 1 Logic inputs feature built-in 2,000V minimum ESD input protection as well as 5V or 3.3V logic level compatibility. 8 V+ TX0IN 2 7 TXBOUT TX1IN 3 6 TXAOUT GND 4 5 V- HI-8593PS 8-PIN PLASTIC SMALL OUTLINE (ESOIC) NB Products with 5 Ohm or 37.5 Ohm resistors in series with each ARINC output are available to allow the use of external resistors for lightning protection. SLP 1 The HI-859x series of line drivers are intended for use where logic signals must be converted to ARINC 429 levels such as when using an FPGA or the HI-3584 ARINC 429 Serial Transmitter/Dual Receiver. 8 V+ TX0IN 2 7 AMPB TX1IN 3 6 AMPA GND 4 5 V- HI-8594PS 8-PIN PLASTIC SMALL OUTLINE (ESOIC) NB o The family of parts are available in Industrial -40 C to o o o +85 C, or Extended, -55 C to +125 C temperature ranges. Optional burn-in is available on the extended temperature range. (See page 10 for additional package pin configurations) FEATURES Table 1. Function Table • Single +5V supply • Negative voltage generated on-chip (HI-8592) • Digitally selectable rise and fall times TX1IN TX0IN SLP TXAOUT TXBOUT SLOPE 0 0 X 0V 0V N/A 0 1 0 -5V 5V 10μs • Tri-state Outputs 0 1 1 -5V 5V 1.5μs • Plastic 8 & 14-pin thermally enhanced SOIC packages available 1 0 0 5V -5V 10μs 1 0 1 5V -5V 1.5μs • 5 Ohm or 37.5 Ohm output resistance 1 1 X Hi-Z Hi-Z N/A • Industrial and Extended temperature ranges • Burn-in available DS8592 Rev. E HOLT INTEGRATED CIRCUITS www.holtic.com 1 07/13 HI-8592, HI-8593, HI-8594 BLOCK DIAGRAM V+ CSUPPLY 5V AMPA SLP TX0IN 5V ONE ESD PROTECTION & VOLTAGE TRANSLATION CURRENT CONTROL NULL “A” SIDE TXAOUT 5Ω 32.5Ω ZERO TX1IN CONTROL LOGIC -5V AMPB 5V ONE CURRENT CONTROL NULL GND “B” SIDE 5Ω ZERO CONTROL LOGIC TXBOUT 32.5Ω -5V V+ CAP+ CFLY CAP- -5V Switched Capacitor DC-DC Inverter VCOUT Clock Generation Figure 1. HI-8592 Block Diagram HOLT INTEGRATED CIRCUITS 2 HI-8592, HI-8593, HI-8594 PIN DESCRIPTIONS Table 2. Pin Descriptions Pin Function Description V+ POWER +5V power supply SLP INPUT Output slew rate control. High selects ARINC 429 high-speed. Low selects ARINC 429 low-speed. TX0IN INPUT Data input zero TX1IN INPUT Data input one GND POWER Ground supply CAP+ ANALOG Positive connection for external capacitor, CFLY. See Table 4 for recommended capacitor type. CAP- ANALOG Negative connection for external capacitor, CFLY. See Table 4 for recommended capacitor type. V- POWER -5V supply, may be connected to supply or used with on-chip negative supply converter. See Table 4 for recommended value of COUT. TXAOUT OUTPUT ARINC high output with 37.5 Ohms series resistance AMPA OUTPUT ARINC high output with 5 Ohms series resistance TXBOUT OUTPUT ARINC low output with 37.5 Ohms series resistance AMPB OUTPUT ARINC low output with 5 Ohms series resistance V+ = 5V CSUPPLY = 68µF HI-3584A SLP TX0IN TXAOUT TX1IN TXBOUT AMPA ARINC 429 Bus AMPB HI-8592 CAP+ CFLY = 4.7µF CAP- GND -5V COUT = 47µF Figure 2. Application Example HOLT INTEGRATED CIRCUITS 3 HI-8592, HI-8593, HI-8594 FUNCTIONAL DESCRIPTION Figure 1 is a block diagram of the line driver. The chip requires a positive 5V supply at V+. The negative 5V supply at V- may be from an external source or may be provided using the on-chip negative rail generator by connecting the two external capacitors, CFLY and COUT. See Table 4 for recommended capacitor type. Currents for slope control are set by on-chip resistors. The TX0IN and TX1IN inputs receive logic signals from a control transmitter chip such as the HI-3584. TXAOUT and TXBOUT hold each side of the ARINC bus at Ground until one of the inputs becomes a One. If for example TX1IN goes high, a charging path is enabled to 5V on an “A” side internal capacitor while the “B” side is enabled to -5V. The charging current is selected by the SLP pin. If the SLP pin is high, the capacitor is nominally charged from 10% to 90% in 1.5μs. If SLP is low, the rise and fall times are 10μs. The reduced pin-count HI-8593 and HI-8594 require an external -5V supply. ABSOLUTE MAXIMUM RATINGS A unity gain buffer receives the internally generated slopes and differentially drives the ARINC line. Current is limited by the series output resistors at each pin. There are no fuses at the outputs of the HI-859x family. The HI-8593 has 37.5 ohms in series with each TXOUT output and the HI-8594 has 5 ohms in series with each AMP output. The AMP outputs are for applications where external series resistance is required, typically for lightning protection devices. Both output types are available on the HI-8592. Holt Application Note AN-300 describes suitable lightning protection schemes. All devices feature tri-stateable outputs to allow multiple line drivers to be connected to the same ARINC 429 bus. Setting TX1IN and TX0IN both to a logic “1” puts the outputs in the high-impedance state. The HI-8592 family of line drivers are built using highspeed CMOS technology. Care should be taken to ensure the V+ and V- supplies are locally decoupled to reduce noise. An application example is shown in Figure 2. RECOMMENDED OPERATING CONDITIONS Supply Voltages V+ ........................................................... +7V Supply Voltages V- ........................................................... -7V V+ ................................... +4.85V to +5.25V DC Current per input pin ................................... +10mA V- ................................... -5.25V to -4.85V o Power Dissipation at 25 C Temperature Range o plastic SOIC ........... 1.0W, derate 10mW/ C o ceramic DIP ......... 0.5W, derate 7mW/ C o Solder Temperature (reflow) .............................. 260 C o o Storage Temperature ....................... -65 C to +150 C o o Industrial ............................... -40 C to +85 C o o Extended ............................. -55 C to +125 C NOTE: Stresses above absolute maximum ratings or outside recommended operating conditions may cause permanent damage to the device. These are stress ratings only. Operation at the limits is not recommended. Note: The HI-8592 family of drivers are available in smallfootprint, thermally enhanced SOIC and QFN (chip-scale) packages. These packages include a metal heat sink located on the bottom surface of the device. This heat sink should be soldered down to the printed circuit board for optimum thermal dissipation. The heat sink is electrically isolated from the chip and can be soldered to any ground or power plane. HOLT INTEGRATED CIRCUITS 4 HI-8592, HI-8593, HI-8594 ELECTRICAL CHARACTERISTICS Table 3. DC Electrical Characteristics V+ = +5V, V- = -5V (HI-8593/4 only), TA = Operating Temperature Range (unless otherwise stated) Parameters Symbol Test Conditions Min Typ Max Units Input Voltage (TX1IN, TX0IN, SLP) High VIH 2.1 - V+ V Low VIL - - 0.5 V Input Current (TX1IN, TX0IN, SLP) Source IIH VIN = 0V - - 0.1 μA Sink IIL VIN = 5V - - 0.1 μA one VDIFF1 no load; TXAOUT - TXBOUT 9 10 11 V zero VDIFF0 no load; TXAOUT - TXBOUT -11 -10 -9 V null VDIFFN no load; TXAOUT - TXBOUT -0.5 0 0.5 V one or zero VDOUT no load & magnitude at pin 4.5 5.0 5.5 V null VNOUT no load -0.25 0 0.25 V ARINC Output Voltage (Differential) ARINC Output Voltage (Ref. to GND) Operating Supply Current SLP = V+ V+ IDD TX1IN & TX0IN = 0V: no load - 22 28 mA GND IGND TX1IN & TX0IN = 0V: no load - 10 16 mA V- IEE TX1IN & TX0IN = 0V: no load -16 -10 - mA ARINC Outputs Shorted IDDS See Note 1 - 165 - mA ARINC Output Impedance ZOUT TXOUT pins 37.5 Ohms AMP pins 5 Ohms ARINC Output Tri-State Current IOZ V- < VOUT < V+, TA = 125oC TX0IN = TX1IN = V+ -1.0 0 +1.0 μA Note 1: TXAOUT and/or TXBOUT shorted to each other or ground. AMPA and/or AMPB shorted to each other or ground (assumes external resistors are connected to AMPA and AMPB to comply with ARINC 429 37.5 Ohm output resistance requirement). HOLT INTEGRATED CIRCUITS 5 HI-8592, HI-8593, HI-8594 Table 4. Converter Characteristics V+ = +5V, V- = -5V (HI-8593/4 only), TA = Operating Temperature Range (unless otherwise stated) Parameters Symbol Start-up transient (V+, V-) Operating Switching Frequency Min Typ Max Units tSTART - - 10 ms fsw 425 550 670 kHz 2.2 4.7 - μF 22 47 - μF 47 68 - μF CFLY Recommended Capacitors X7R dielectric, low ESR, 200mΩ max. Test Conditions COUT / CFLY >= 10 COUT CSUPPLY CSUPPLY >= COUT (connect from V+ to GND) Table 5. AC Electrical Characteristics V+ = +5V, V- = -5V (HI-8593/4 only), TA = Operating Temperature Range (unless otherwise stated) Parameters Symbol Line Driver Propogation Delay Test Conditions Min Typ Max Units defined in Figure 2, no load Output high to low tphlx - 500 - ns Output low to high tplhx - 500 - ns Line Driver Transition Times High Speed SLP = V+ Output high to low tfx pin 1 = logic 1 1.0 1.5 2.0 μs Output low to high trx pin 1 = logic 1 1.0 1.5 2.0 μs Low Speed SLP = V+ Output high to low tfx pin 1 = logic 0 5.0 10.0 15.0 μs Output low to high trx pin 1 = logic 0 5.0 10.0 15.0 μs - - 10 pF - - 1.5 pF Input Capacitance (Logic)1 Output Capacitance (Tri-state)1 CIN COUT TX0IN = TX1IN = V+ Notes: 1. Guaranteed but not tested HOLT INTEGRATED CIRCUITS 6 HI-8592, HI-8593, HI-8594 5V TX1IN 0V tphlx tplhx tplhx 5V TX0IN 0V tphlx trx trx VDIFF (TXAOUT - TXBOUT) 10% 10V 90% 0V 10% 90% -10V 10% tfx Figure 3. Line Driver Timing HOLT INTEGRATED CIRCUITS 7 tfx HI-8592, HI-8593, HI-8594 PACKAGE THERMAL CHARACTERISTICS Maximum ARINC LOAD Package Style 1 14-Lead Plastic ESOIC5 ARINC 429 Data Rate Junction Temp, Tj (oC) Supply Current (mA)2 TA = 25oC TA = 85oC TA = 125oC TA = 25oC TA = 85oC TA = 125oC Low Speed3 44 45 45 31 91 131 High Speed4 58 57 55 33 93 132 TXAOUT and TXBOUT Shorted to Ground6,7,8 Package Style 1 14-Lead Plastic ESOIC5 ARINC 429 Data Rate Junction Temp, Tj (oC) Supply Current (mA)2 TA = 25oC TA = 85oC TA = 125oC TA = 25oC TA = 85oC TA = 125oC Low Speed3 118 108 98 44 102 140 High Speed4 120 106 92 44 102 140 Maximum ARINC LOAD Package Style1 8-Lead Plastic ESOIC5 ARINC 429 Data Rate Junction Temp, Tj (oC) Supply Current (mA)2 TA = 25oC TA = 85oC TA = 125oC TA = 25oC TA = 85oC TA = 125oC Low Speed3 26 27 28 42 103 144 High Speed4 34 35 35 50 111 151 TXAOUT and TXBOUT Shorted to Ground6,7,8 Package Style1 8-Lead Plastic ESOIC5 ARINC 429 Data Rate Junction Temp, Tj (oC) Supply Current (mA)2 TA = 25oC TA = 85oC TA = 125oC TA = 25oC TA = 85oC TA = 125oC Low Speed3 64 62 60 79 137 176 High Speed4 68 66 64 83 141 179 Notes: 1. All data taken in still air. 2. At 100% duty cycle, 5V power supplies. 3. Low Speed: Data Rate = 12.5 Kbps, Load: R = 400 Ohms, C = 30 nF. 4. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30 nF as this is considered unrealistic for high speed operation. 5. 14 Lead Plastic ESOIC (Thermally enhanced SOIC with built in heat sink). Heat sink not soldered. 6. Similar results would be obtained with TXAOUT shorted to TXBOUT. 7. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended. 8. Data will vary depending on air flow and the method of heat sinking employed. HOLT INTEGRATED CIRCUITS 8 HI-8592, HI-8593, HI-8594 ORDERING INFORMATION HI - 8592xx x x PART NUMBER LEAD FINISH Blank Tin / Lead (Sn / Pb) Solder F Pb-free, RoHS compliant PART NUMBER TEMPERATURE RANGE o o FLOW BURN IN I -40 C to +85 C I No T -55oC to +125oC T No M Yes M PART NUMBER o o -55 C to +125 C PACKAGE DESCRIPTION PS 14 PIN PLASTIC SMALL OUTLINE - NB ESOIC (14HNE) PC 24 PIN PLASTIC QFN (24PCS) CR 14 PIN CERDIP (14D). NOTE: Not Available Pb-Free HI - 859x xx x x PART NUMBER Blank Tin / Lead (Sn / Pb) Solder F 100% Matte Tin (Pb-free, RoHS compliant) PART NUMBER I -40oC to +85oC o o FLOW BURN IN I No -55 C to +125 C T No M -55oC to +125oC M Yes PACKAGE DESCRIPTION PS 8 PIN PLASTIC SMALL OUTLINE - NB ESOIC (8HNE) CR 8 PIN CERDIP (8D). NOTE: Not Available Pb-Free PART NUMBER - - TEMPERATURE RANGE T PART NUMBER Legend: ESOIC NB LEAD FINISH OUTPUT RESISTANCE 8593 37.5 Ohms 8594 5 Ohms Thermally enhanced Small Outline Package (SOIC with built-in heat sink) Narrow Body HOLT INTEGRATED CIRCUITS 9 HI-8592, HI-8593, HI-8594 ADDITIONAL PIN CONFIGURATIONS NOTE: All power and ground pins must be connected. 14 AMPB V+ 1 SLP 1 8 V+ 13 TXBOUT TX0IN 2 7 TXBOUT TX0IN 3 12 AMPA TX1IN 3 6 TXAOUT TX1IN 4 11 TXAOUT GND 4 10 V- CAP+ 6 9 GND CAP- 7 8 V+ 5 V- HI-8593CR 8-PIN CERDIP GND 4 5 V- HI-8594CR 8-PIN CERDIP 20 - 22 V+ 16 TXAOUT GND 4 15 V- GND 5 14 V- CAP+ 6 13 GND V+ 11 6 AMPA V+ 10 TX1IN 3 17 AMPA TX1IN 3 CAP- 9 7 AMPB 21 V+ 24 TX0IN 2 18 TXBOUT - 1 TX0IN 2 - 7 8 V+ - 8 SLP 1 23 SLP HI-8592CR 14-PIN CERDIP 19 AMPB GND 5 GND 12 SLP 2 HI-8592PC 24-LEAD 5mm x 5mm QFN HOLT INTEGRATED CIRCUITS 10 HI-8592, HI-8593, HI-8594 REVISION HISTORY Revision DS8592, Date Description of Change Rev. NEW 6/21/10 Initial Release Rev. A 7/1/10 Corrected typo in features (no “fixed” rise and fall time) Rev. B 10/28/10 Rev. A had incorrect package drawing (SOIC-8). Replaced with correct ESOIC-8. Rev. C 02/03/11 Updated Package Thermal Characteristics Data for 14-Lead Plastic ESOIC. Added Package Thermal Characteristics Data for 8-Lead Plastic ESOIC. Rev. D 11/28/12 Updated Solder Temperature (reflow) to 260 C. Added operating supply current for shorted ARINC outputs. Updated ESOIC-14, ESOIC-8 and QFN-24 package dimensions. Rev. E 7/3/13 Updated Table 4 with recommended capacitor types. o HOLT INTEGRATED CIRCUITS 11 HI-8592, HI-8593, HI-8594 PACKAGE DIMENSIONS inches (millimeters) 14-PIN PLASTIC SMALL OUTLINE (ESOIC) - NB (Narrow Body, Thermally Enhanced) .007 ± .003 (.175 ± .075) .340 BSC (8.65) .236 BSC (6.00) Top View Package TYPE: 14HNE .153 BSC (3.90) .215 ± .02 (5.46 ± .39) Bottom View .09 ± .02 (2.16 ± .39) See Detail A .016 ± .004 (.41 ± .10) .069 Max. (1.75) .050 BSC (1.27) Electrically isolated heat sink pad on bottom of package. .007 ± .003 (.175 ± .075) 0o to 8o BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) .033 ± .017 (.835 ± .44) Detail A 8-PIN PLASTIC SMALL OUTLINE (ESOIC) - NB (Narrow Body, Thermally Enhanced) Top View .236 BSC (6.00) PIN 1 Package Type: 8HNE Bottom View .007 ± .003 (.175 ± .075) .193 BSC (4.90) inches (millimeters) .154 BSC (3.90) .016 ± .004 (.41 ± .10) .154 ± .04 (3.90 ± 1.10) .119 ± .04 (3.02 ± .97) See Detail A .056 ± .006 (1.413 ± .163) Electrically isolated heat sink pad on bottom of package. 0o to 8o BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) .050 BSC (1.27) .033 ± .017 (.835 ± .435) .0025 ± .002 (.064 ± .038) Detail A HOLT INTEGRATED CIRCUITS 12 HI-8592, HI-8593, HI-8594 14-PIN CERDIP inches (millimeters) Package Type: 14D .050 max (1.27 max) .767 max (19.48 max) .005 min (.127 min) .288 + .003 (7.32 + .08) .056 typ (1.422 typ) .100 BSC (2.54) .200 max (5.080 max) .310 + .010 (7.874 + .254) .180 max (4.572 max) .015 min (.381 min) .018 + .003 (.457 + .760) .125 min (3.175 min) 0o to 15o .010 + .002 (.254 + .051) 8-PIN CERDIP Package Type: 8D .380 ± .004 (9.652 ± .102) .005 MIN. (.127 MIN.) .248 ± .003 (6.299 ± .076) .039 ± .006 (.991 ± .154) .100 ± .008 (2.540 ± .203) .015 MIN. (.381 MIN.) .200 MAX. (5.080 MAX.) .314 ± .003 (7.976 ± .076) Base Plane .010 ± .006 (.254 ± .152) Seating Plane .163 ± .037 (4.140 ± .940) .056 ± .006 (1.422 ± .152) .018 ± .006 (.457 ± .152) HOLT INTEGRATED CIRCUITS 13 .350 ± .030 (8.890 ± .762) HI-8592, HI-8593, HI-8594 24-PIN PLASTIC CHIP-SCALE PACKAGE (QFN) millimeters Package Type: 24PCS Electrically isolated heat sink pad on bottom of package. 5.00 + .10 3.40 + .05 0.65 BSC 5.00 + .10 Top View Bottom View 3.40 + .05 0.25 typ. 0.40 typ. 0.95 max 0.05 max BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HOLT INTEGRATED CIRCUITS 14