HOLTIC HI

HI-8783, HI-8784, HI-8785
February 2009
ARINC 429 & 561 INTERFACE DEVICE
8 Bit Parallel Data In / ARINC Serial Data Out
PIN CONFIGURATIONS
DESCRIPTION
The HI-8783, HI-8784, and HI-8785 are system components for interfacing 8 bit parallel data to an ARINC 429
bus. The HI-8783 is a logic device only and requires a separate line driver circuit, such as the HI-3182 or HI-8585.
The HI-8784 and HI-8785 combine logic and line driver on
one chip. The HI-8784 has an output resistance of 37.5
ohms, and the HI-8785 has an output resistance of 10
ohms to facilitate external lightning protection cicuitry. The
technology is analog/digital CMOS.
VCC
1
20
561 DATA
561 SYNC
2
19
DATA ZERO
D0
3
18
DATA ONE
D1
4
17
PARITY ENB
D2
5
16
XMT READY
D3
6
15
XMIT CLK
D4
7
14
RESET
D5
8
13
WRITE
D6
9
12
A0
D7
10
11
GND
The HI-8783 is available in a 22 pin DIP format as a second
source replacement for the Micrel / California Devices
DLS-111BV.
The products offer high speed data bus data transactions
to a buffer register. After loading 4 bytes, data is automatically transferred and transmitted. The data rate is equal to
the clock rate. Parity can be enabled in the 32nd bit. Reset
is used to initialize the logic upon startup. Word gaps are
transmitted automatically.
HI-8783PSI
&
HI-8783PST
20-Pin Plastic SOIC - WB package
The HI-8784 and HI-8785 require +/- 10 volt supplies in addition to the 5 volt supply.
FEATURES
l
Automatically converts 8 bit parallel data
to ARINC 429 or 561 serial data
l
High speed data bus interface
l
On-chip line driver option
l
SOIC packages available
l
Industrial and extended temperature
ranges
VCC
1
24
V+
561 SYNC
2
23
561 DATA
D0
3
22
TXBOUT
D1
4
21
TXAOUT
D2
5
20
V-
D3
6
19
PARITY ENB
D4
7
18
XMT READY
D5
8
17
XMIT CLK
D6
9
16
RESET
NC
10
15
WRITE
D7
11
14
SLP1.5
GND
12
13
A0
HI-8784PSI
HI-8784PST
HI-8785PSI
&
HI-8785PST
24-Pin Plastic SOIC - WB package
(See page 7 for additional pin configurations)
(DS8783 Rev. K)
HOLT INTEGRATED CIRCUITS
www.holtic.com
02/09
HI-8783, HI-8784, HI-8785
PIN DESCRIPTIONS
PIN
PIN
PIN
HI-8783 HI-8783 HI-8784
(20-pin) (22-pin) HI-8785
SYMBOL
FUNCTION
DESCRIPTION
1
22
1
VCC
2
1
2
561 SYNC
digital output
ARINC 561 Sync signal
3-10
2-8,10
3-9,11
Dn
digital inputs
Parallel 8 bit Data Input
11
11
12
GND
12
12
13
A0
power supply +5 volt rail,
power supply Ground
digital input
Byte address, A0=1 for 1st byte, A0=0 for 2nd, 3rd & 4th bytes
-
-
14
SLP1.5
digital input
Selects the slope of the line driver. High = 1.5us
13
14
15
WRITE
digital input
Write strobe, loads data on rising edge
14
15
16
RESET
digital input
Registers and sequencing logic initialized when low
15
16
17
XMIT CLK
digital input
Clock input for the transmitter
16
17
18
XMT RDY
digital output
Goes high if the buffer register is empty
17
18
19
-
-
20
18
19
-
19
20
-
-
-
21
PARITY ENB digital input
V-
When high the 32nd bit output is odd parity
power supply -10 volt rail
DATA ONE
digital output
DATA ZERO digital output
TXAOUT
Goes high for each ARINC bit output that is a “one”
Goes high for each ARINC bit output that is a “zero”
analog output Line driver ouptut - A side
-
-
22
TXBOUT
analog output Line driver output - B side
20
21
23
561 DATA
digital output
-
-
24
V+
Serial output for ARINC 561 data
power supply +10 volt rail
FUNCTIONAL DESCRIPTION
The HI-8783 is a parallel to serial converter, which when
loaded with four eight bit parallel bytes, outputs the data as a
32 bit serial word. Timing circuitry inserts a 4 bit gap at the
end of each 32 bit word. An input buffer register allows load
operations to take place while the previously loaded word is
being transmitted.
If the PARITY ENB pin is high, the 32nd bit will be a parity bit,
inserted so as to make the 32 bit word have odd parity. If the
PARITY ENB pin is low, the 32nd bit will be the D7 bit of the
4th byte.
Outputs are provided for both ARINC 429/575 (DATA ONE
and DATA ZERO pins) and ARINC 561 (561 DATA and 561
SYNC pins) type data.
A low signal applied to the RESET pin resets the HI-8783’s
internal logic so that spurious transmission does not take
place during power-up. The registers are cleared so that a
continuous gap will be transmitted until the first word is
loaded into the transmitter.
Input data can be loaded when the XMT RDY signal is high,
which indicates the input buffer register is empty. The first 8
bit byte is the label byte and is loaded with the A0 input high,
which initializes the internal byte counter. The remaining
three bytes are loaded with A0 in the low state. Once A0 is
set low, it must not go high until after the fourth byte is loaded.
Each 8 bit byte is loaded into the input buffer register by a low
pulse on the WRITE input. After the fourth byte is loaded, the
XMT RDY output goes low.
The contents of the input buffer register are transferred to the
output register during the fourth bit period of the gap. If the
fourth gap bit period of the previous word has already been
transmitted, the contents of the input buffer register will be
transferred to the output shift register during the first bit period after the loading of the fourth byte, and the XMT RDY output goes high.
After the output shift register is loaded, the data is shifted out
to the output logic in the order shown in figure 2.
The 561 SYNC output pulses low when the XMT CLK is low
during the 8th bit of the ARINC transmission.
The XMIT CLK is the same as the data rate.
HOLT INTEGRATED CIRCUITS
2
HI-8783, HI-8784, HI-8785
XMIT CLK
WRITE
XMT RDY
status &
control
logic
byte
counter
A0
SLP1.5
TXAOUT
line
driver
TXBOUT
word gap
counter
HI-8784, HI8785
DATA
BUS
8 to 32 bit
mux
8
32
32 bit
buffer
register
32
32 bit
shift
register
DATA ONE
DATA ZERO
bit
counter
output
logic
HI-8783
561 SYNC
561 DATA
PARITY ENB
Figure 1. Block Diagram
FUNCTIONAL DESCRIPTION (Cont.)
The HI-8784 and HI-8785 have the same digital logic function as the HI-8783, but include an on-chip line driver designed to directly drive the ARINC 429 bus. The two ARINC
outputs (TXAOUT and TXBOUT) provide a differential voltage to produce a +10 volt One, a -10 volt Zero, and a 0 volt
Null. The slope of the ARINC outputs is controlled by the
SLP1.5 pin. If SLP1.5 is high, the output rise and fall time is
nominally 1.5us. If SLP1.5 is set low, the rise and fall times
are 10us. DATA ONE and DATA ZERO outputs are not provided for the HI-8784 and HI-8785.
The HI-8784 has 37.5 ohms in series with each line driver output. The HI-8785 has 10.0 ohms in series. The HI-8785 is for
applications where external series resistance is needed, typically for lightning protection devices.
A0
Byte
Data Bus
ARINC Bits
1
Byte 1
D0 - D7
ARINC 1 - ARINC 8
0
Byte 2
D0 - D7
ARINC 9 - ARINC 16
0
Byte 3
D0 - D7
ARINC 17 - ARINC 24
0
Byte 4
D0 - D7
ARINC 25 - ARINC 32
Figure 2. Order of transmitted bytes
POWER SUPPLY SEQUENCING (HI-8784 & HI-8785 Only)
The power supplies must be controlled to prevent large
currents during supply turn-on and turn-off. The required
sequence is V+ followed by VCC, always ensuring that V+ is
the most positive supply. The V- supply is not critical and can
be asserted at any time.
HOLT INTEGRATED CIRCUITS
3
HI-8783, HI-8784, HI-8785
TIMING DIAGRAMS
DATA TRANSMISSION - EXAMPLE PATTERN
GAP
32
33
34
GAP
35
36
1
2
3
4
31
32
33
34
35
36
XMIT CLK
WRITE
XMT RDY
DATA ONE (HI-8783 only)
DATA ZERO (HI-8783 only)
ARINC 429 DATA (HI-8784 & HI-8785 only)
(TXAOUT-TXBOUT)
561 DATA
561 SYNC
LOW DURING CLK 8
TRANSMITTER OPERATION
BYTE 2 VALID
BYTE 1 VALID
DATA BUS
tSET
BYTE 4 VALID
tHLD
WRITE
tWPW
t WPD
A0
tASW
tAH
tASW
XMT RDY
HOLT INTEGRATED CIRCUITS
4
t XD
1
2
HI-8783, HI-8784, HI-8785
LINE DRIVER OUTPUTS
XMT CLK
t phlx
t plhx
t plhx
5V
0V
DATA ONE
t phlx
5V
0V
DATA ZERO
t rx
t rx
10V
0V
-10V
90%
DIFFERENTIAL VOLTAGE
TXAOUT - TXBOUT
10%
10%
90%
10%
t fx
t fx
RECOMMENDED OPERATING CONDITIONS
ABSOLUTE MAXIMUM RATINGS
Voltages referenced to Ground
Supply Voltages
V+ ..................................... +10V... ±5%
V- ....................................... -10V... ±5%
VCC ...................................... 5V... ±5%
Supply voltages
V+.................................................12.5V
V-.................................................-12.5V
VCC.................................................. 7V
Temperature Range
Industrial ...................... -40°C to +85°C
Extended ................... -55°C to +125°C
DC current per input pin................ +10ma
Power dissipation at 25°
plastic DIL............1.0W, derate 10mW/°C
ceramic DIL..........0.5W, derate 7mW/°C
NOTE:
Stresses above absolute maximum
ratings or outside recommended operating
conditions may cause permanent damage to the
device. These are stress ratings only. Operation at
the limits is not recommended.
Solder Temperature ........275°C for 10 sec
Storage Temperature........-65°C to +150°C
DC ELECTRICAL CHARACTERISTICS (HI-8783, HI-8784 and HI-8785)
VCC = 5.0V, VSS = 0V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
Operating Voltage
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
VCC
4.75
5
5.25
V
2.0
1.4
Min. Input Voltage
(HI)
VIH
Max. Input Voltage
(LO)
VIL
Min. Input Current
(HI)
IIH
VIH = 4.9V
Max. Input Current
(LO)
IIL
VIL = 0.1V
-1
µA
Min. Output Voltage
(HI)
VOH
IOUT = -1.6mA
2.7
V
Max. Output Voltage
(LO)
1.4
VIH
IOUT = 1.6mA
Operating Current Drain
ICC
f = 100khz
Input Capacitance
CIN
Not tested
HOLT INTEGRATED CIRCUITS
5
0.8
V
0.8
V
1
µA
0.4
V
2.8
mA
20
pF
HI-8783, HI-8784, HI-8785
DC ELECTRICAL CHARACTERISTICS (HI-8784 and HI-8785 only)
VCC = 5.0V, VSS = 0V, V+ = 10V, V- = -10V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
Operating Voltage
V+
9.5
10
10.5
V
Operating Voltage
V-
-9.5
-10
10.5
V
Operating Current Drain (V+)
IDD
no load, f = 100khz
6
20
mA
Operating Current Drain (V-)
IEE
no load, f = 100khz
-20
-6
mA
Line Driver Output Levels (Ref. To GND)
ONE
no load, VCC = 5.0V
4.5
5.0
5.5
V
NULL
“
-0.25
0
0.25
V
ZERO
“
-5.55
-5.0
-4.5
V
ONE
no load, VCC = 5.0V
9.0
10.0
11.0
V
NULL
“
-0.5
0
0.5
V
ZERO
“
-11.0
-10.0
-9.0
V
momentary magnitude
80
Line Driver Output Levels (Differential)
Minimum Short Circuit Sink or Source Current
IOUT
mA
AC ELECTRICAL CHARACTERISTICS (HI-8783, HI-8784 and HI-8785)
VCC = 5.0V, VSS = 0V, TA =Operating Temperature Range (unless otherwise specified).
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
tSET
tHLD
tAH
tWPW
tWPD
tASW
tXD
20
ns
30
ns
DATA BUS TIMING
Setup Data Bus to WRITE
Hold WRITE to Data Bus
Hold A0 to WRITE
Pulse width WRITE
Delay between WRITE
Setup A0 to WRITE
Delay last WRITE to XMT RDY
0
ns
40
1 CLK
ns
40
ns
20
ns
80
ns
AC ELECTRICAL CHARACTERISTICS (HI-8784 and HI-8785 only)
V+ = 10V, V- = -10V, TA = Operating Temperature Range (unless otherwise stated)
PARAMETERS
Line Driver propagation delay
Output high to low
Output low to high
Line Driver transition times
Output high to low
Output low to high
Output high to low
Output low to high
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNITS
-
500
500
-
ns
ns
SLP1.5 = logic 1
SLP1.5 = logic 1
1.0
1.0
1.5
1.5
2.0
2.0
us
us
SLP1.5 = logic 0
SLP1.5 = logic 0
5
5
10
10
15
15
us
us
no load
t phlx
t plhx
t fx
t rx
t fx
t rx
HOLT INTEGRATED CIRCUITS
6
HI-8783, HI-8784, HI-8785
ADDITIONAL HI-8783 PIN CONFIGURATION
561 SYNC
1
22
VCC
D0
2
21
561 DATA
D1
3
20
DATA ZERO
D2
4
19
DATA ONE
D3
5
18
PARITY ENB
D4
6
17
XMT READY
D5
7
16
XMIT CLK
D6
8
15
RESET
NC
9
14
WRITE
D7
10
13
NC
GND
11
12
A0
HI-8783PDI
&
HI-8783PDT
22 Pin Plastic DIP package
(See page 1 for additional pin configurations)
ORDERING INFORMATION
HI - 87XX xx x x
PART
NUMBER
LEAD
FINISH
Tin / Lead (Sn / Pb) Solder
Blank
100% Matte Tin (Pb-free, RoHS compliant)
F
PART
NUMBER
TEMPERATURE
RANGE
FLOW
BURN
IN
I
-40°C TO +85°C
I
No
T
-55°C TO +125°C
T
No
PART
NUMBER
PACKAGE
DESCRIPTION
22 PIN PLASTIC DIP (22P) (8783 ONLY)
PD
20 PIN PLASTIC WIDE SOIC (20HW) (8783 ONLY)
PS
24 PIN PLASTIC WIDE SOIC (24HW) (8784 / 8785 ONLY)
PART
NUMBER
INCLUDES
LINE DRIVER
OUTPUT SERIES RESISTANCE
BUILT-IN
REQUIRED EXTERNALLY
8783
No
External Line Driver Required
8784
Yes
37.5 Ohms
0
8785
Yes
10 Ohms
27.5 Ohms
HOLT INTEGRATED CIRCUITS
7
HI-8783, HI-8784, HI-8785
REVISION HISTORY
Revision
Date
Description of Change
DS8783, Rev. K
02/04/09
Clarified the extended temperature ranges and the power supply nomenclatures in the
power sequencing description.
HOLT INTEGRATED CIRCUITS
8
HI-8783, HI-8784, HI-8785 PACKAGE DIMENSIONS
20-PIN PLASTIC SMALL OUTLINE (SOIC) - WB
(Wide Body)
inches (millimeters)
Package Type: 20HW
.5035 ± .0075
(12.789 ± .191)
.0105 ± .0015
(.2667 ± .0381)
.4065 ± .0125
(10.325 ± .318)
.295 ± .002
(7.493 ± .051)
See Detail A
.018
typ
(.457)
.090 ± .010
(2.286 ± .254)
0° to 8°
.050
BSC
(1.27)
.0075 ± .0035
(.191 ± .089)
.033 ± .017
(.838 ± .432)
Detail A
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
22-PIN PLASTIC DIP
inches (millimeters)
Package Type: 22P
1.105 ± .015
(28.067 ± .381)
.350 ± .010
(8.89 ± .254)
.400 ± .010
(10.160 ± .254)
.135 ± .015
(3.429 ± .381)
.025 ± .010
(.635 ± .254)
.1375 ± .0125
(3.4925 ± .3175)
.100
BSC
(2.54)
.019 ± .004
(.483 ± .102)
.053 ± .013
(1.346 ± .330)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
HOLT INTEGRATED CIRCUITS
9
.435 ± .035
(11.049 ± .889)
HI-8783, HI-8784, HI-8785 PACKAGE DIMENSIONS
24-PIN PLASTIC SMALL OUTLINE (SOIC) - WB
(Wide Body)
inches (millimeters)
Package Type: 24HW
.606 ± .004
(15.392 ± .102)
.0105 ± .0015
(.2667 ± .038)
.294 ± .002
(7.468 ± .051)
.407 ± .013
(10.325 ± .32)
See Detail A
.0165 ± .0035
(.419 ± .089)
.095 ± .005
(2.413 ± .127)
.050
BSC
(1.27)
0° to 8°
.033 ± .017
(.838 ± .43)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
.0075 ± .0035
(.191 ± .089)
Detail A
HOLT INTEGRATED CIRCUITS
10